1 /* 2 * Copyright (C) 2012 ARM Ltd. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 * 13 * You should have received a copy of the GNU General Public License 14 * along with this program. If not, see <http://www.gnu.org/licenses/>. 15 */ 16 #ifndef __ASM_FUTEX_H 17 #define __ASM_FUTEX_H 18 19 #ifdef __KERNEL__ 20 21 #include <linux/futex.h> 22 #include <linux/uaccess.h> 23 #include <asm/errno.h> 24 25 #define __futex_atomic_op(insn, ret, oldval, uaddr, tmp, oparg) \ 26 asm volatile( \ 27 "1: ldaxr %w1, %2\n" \ 28 insn "\n" \ 29 "2: stlxr %w3, %w0, %2\n" \ 30 " cbnz %w3, 1b\n" \ 31 "3:\n" \ 32 " .pushsection .fixup,\"ax\"\n" \ 33 "4: mov %w0, %w5\n" \ 34 " b 3b\n" \ 35 " .popsection\n" \ 36 " .pushsection __ex_table,\"a\"\n" \ 37 " .align 3\n" \ 38 " .quad 1b, 4b, 2b, 4b\n" \ 39 " .popsection\n" \ 40 : "=&r" (ret), "=&r" (oldval), "+Q" (*uaddr), "=&r" (tmp) \ 41 : "r" (oparg), "Ir" (-EFAULT) \ 42 : "cc") 43 44 static inline int 45 futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr) 46 { 47 int op = (encoded_op >> 28) & 7; 48 int cmp = (encoded_op >> 24) & 15; 49 int oparg = (encoded_op << 8) >> 20; 50 int cmparg = (encoded_op << 20) >> 20; 51 int oldval = 0, ret, tmp; 52 53 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) 54 oparg = 1 << oparg; 55 56 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32))) 57 return -EFAULT; 58 59 pagefault_disable(); /* implies preempt_disable() */ 60 61 switch (op) { 62 case FUTEX_OP_SET: 63 __futex_atomic_op("mov %w0, %w4", 64 ret, oldval, uaddr, tmp, oparg); 65 break; 66 case FUTEX_OP_ADD: 67 __futex_atomic_op("add %w0, %w1, %w4", 68 ret, oldval, uaddr, tmp, oparg); 69 break; 70 case FUTEX_OP_OR: 71 __futex_atomic_op("orr %w0, %w1, %w4", 72 ret, oldval, uaddr, tmp, oparg); 73 break; 74 case FUTEX_OP_ANDN: 75 __futex_atomic_op("and %w0, %w1, %w4", 76 ret, oldval, uaddr, tmp, ~oparg); 77 break; 78 case FUTEX_OP_XOR: 79 __futex_atomic_op("eor %w0, %w1, %w4", 80 ret, oldval, uaddr, tmp, oparg); 81 break; 82 default: 83 ret = -ENOSYS; 84 } 85 86 pagefault_enable(); /* subsumes preempt_enable() */ 87 88 if (!ret) { 89 switch (cmp) { 90 case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break; 91 case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break; 92 case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break; 93 case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break; 94 case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break; 95 case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break; 96 default: ret = -ENOSYS; 97 } 98 } 99 return ret; 100 } 101 102 static inline int 103 futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, 104 u32 oldval, u32 newval) 105 { 106 int ret = 0; 107 u32 val, tmp; 108 109 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32))) 110 return -EFAULT; 111 112 asm volatile("// futex_atomic_cmpxchg_inatomic\n" 113 "1: ldaxr %w1, %2\n" 114 " sub %w3, %w1, %w4\n" 115 " cbnz %w3, 3f\n" 116 "2: stlxr %w3, %w5, %2\n" 117 " cbnz %w3, 1b\n" 118 "3:\n" 119 " .pushsection .fixup,\"ax\"\n" 120 "4: mov %w0, %w6\n" 121 " b 3b\n" 122 " .popsection\n" 123 " .pushsection __ex_table,\"a\"\n" 124 " .align 3\n" 125 " .quad 1b, 4b, 2b, 4b\n" 126 " .popsection\n" 127 : "+r" (ret), "=&r" (val), "+Q" (*uaddr), "=&r" (tmp) 128 : "r" (oldval), "r" (newval), "Ir" (-EFAULT) 129 : "cc", "memory"); 130 131 *uval = val; 132 return ret; 133 } 134 135 #endif /* __KERNEL__ */ 136 #endif /* __ASM_FUTEX_H */ 137