xref: /openbmc/linux/arch/arm64/include/asm/dcc.h (revision e2c75e76)
1 /* Copyright (c) 2014-2015 The Linux Foundation. All rights reserved.
2  *
3  * This program is free software; you can redistribute it and/or modify
4  * it under the terms of the GNU General Public License version 2 and
5  * only version 2 as published by the Free Software Foundation.
6  *
7  * This program is distributed in the hope that it will be useful,
8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
10  * GNU General Public License for more details.
11  *
12  * A call to __dcc_getchar() or __dcc_putchar() is typically followed by
13  * a call to __dcc_getstatus().  We want to make sure that the CPU does
14  * not speculative read the DCC status before executing the read or write
15  * instruction.  That's what the ISBs are for.
16  *
17  * The 'volatile' ensures that the compiler does not cache the status bits,
18  * and instead reads the DCC register every time.
19  */
20 #ifndef __ASM_DCC_H
21 #define __ASM_DCC_H
22 
23 #include <asm/barrier.h>
24 #include <asm/sysreg.h>
25 
26 static inline u32 __dcc_getstatus(void)
27 {
28 	return read_sysreg(mdccsr_el0);
29 }
30 
31 static inline char __dcc_getchar(void)
32 {
33 	char c = read_sysreg(dbgdtrrx_el0);
34 	isb();
35 
36 	return c;
37 }
38 
39 static inline void __dcc_putchar(char c)
40 {
41 	/*
42 	 * The typecast is to make absolutely certain that 'c' is
43 	 * zero-extended.
44 	 */
45 	write_sysreg((unsigned char)c, dbgdtrtx_el0);
46 	isb();
47 }
48 
49 #endif
50