xref: /openbmc/linux/arch/arm64/include/asm/dcc.h (revision 7f6964c5)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (c) 2014-2015 The Linux Foundation. All rights reserved.
3  *
4  * A call to __dcc_getchar() or __dcc_putchar() is typically followed by
5  * a call to __dcc_getstatus().  We want to make sure that the CPU does
6  * not speculative read the DCC status before executing the read or write
7  * instruction.  That's what the ISBs are for.
8  *
9  * The 'volatile' ensures that the compiler does not cache the status bits,
10  * and instead reads the DCC register every time.
11  */
12 #ifndef __ASM_DCC_H
13 #define __ASM_DCC_H
14 
15 #include <asm/barrier.h>
16 #include <asm/sysreg.h>
17 
18 static inline u32 __dcc_getstatus(void)
19 {
20 	return read_sysreg(mdccsr_el0);
21 }
22 
23 static inline char __dcc_getchar(void)
24 {
25 	char c = read_sysreg(dbgdtrrx_el0);
26 	isb();
27 
28 	return c;
29 }
30 
31 static inline void __dcc_putchar(char c)
32 {
33 	/*
34 	 * The typecast is to make absolutely certain that 'c' is
35 	 * zero-extended.
36 	 */
37 	write_sysreg((unsigned char)c, dbgdtrtx_el0);
38 	isb();
39 }
40 
41 #endif
42