1 /* 2 * Copyright (C) 2014 Linaro Ltd. <ard.biesheuvel@linaro.org> 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8 9 #ifndef __ASM_CPUFEATURE_H 10 #define __ASM_CPUFEATURE_H 11 12 #include <asm/hwcap.h> 13 #include <asm/sysreg.h> 14 15 /* 16 * In the arm64 world (as in the ARM world), elf_hwcap is used both internally 17 * in the kernel and for user space to keep track of which optional features 18 * are supported by the current system. So let's map feature 'x' to HWCAP_x. 19 * Note that HWCAP_x constants are bit fields so we need to take the log. 20 */ 21 22 #define MAX_CPU_FEATURES (8 * sizeof(elf_hwcap)) 23 #define cpu_feature(x) ilog2(HWCAP_ ## x) 24 25 #define ARM64_WORKAROUND_CLEAN_CACHE 0 26 #define ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE 1 27 #define ARM64_WORKAROUND_845719 2 28 #define ARM64_HAS_SYSREG_GIC_CPUIF 3 29 #define ARM64_HAS_PAN 4 30 #define ARM64_HAS_LSE_ATOMICS 5 31 #define ARM64_WORKAROUND_CAVIUM_23154 6 32 #define ARM64_WORKAROUND_834220 7 33 34 #define ARM64_NCAPS 8 35 36 #ifndef __ASSEMBLY__ 37 38 #include <linux/kernel.h> 39 40 /* CPU feature register tracking */ 41 enum ftr_type { 42 FTR_EXACT, /* Use a predefined safe value */ 43 FTR_LOWER_SAFE, /* Smaller value is safe */ 44 FTR_HIGHER_SAFE,/* Bigger value is safe */ 45 }; 46 47 #define FTR_STRICT true /* SANITY check strict matching required */ 48 #define FTR_NONSTRICT false /* SANITY check ignored */ 49 50 #define FTR_SIGNED true /* Value should be treated as signed */ 51 #define FTR_UNSIGNED false /* Value should be treated as unsigned */ 52 53 struct arm64_ftr_bits { 54 bool sign; /* Value is signed ? */ 55 bool strict; /* CPU Sanity check: strict matching required ? */ 56 enum ftr_type type; 57 u8 shift; 58 u8 width; 59 s64 safe_val; /* safe value for discrete features */ 60 }; 61 62 /* 63 * @arm64_ftr_reg - Feature register 64 * @strict_mask Bits which should match across all CPUs for sanity. 65 * @sys_val Safe value across the CPUs (system view) 66 */ 67 struct arm64_ftr_reg { 68 u32 sys_id; 69 const char *name; 70 u64 strict_mask; 71 u64 sys_val; 72 struct arm64_ftr_bits *ftr_bits; 73 }; 74 75 struct arm64_cpu_capabilities { 76 const char *desc; 77 u16 capability; 78 bool (*matches)(const struct arm64_cpu_capabilities *); 79 void (*enable)(void *); /* Called on all active CPUs */ 80 union { 81 struct { /* To be used for erratum handling only */ 82 u32 midr_model; 83 u32 midr_range_min, midr_range_max; 84 }; 85 86 struct { /* Feature register checking */ 87 u32 sys_reg; 88 int field_pos; 89 int min_field_value; 90 int hwcap_type; 91 unsigned long hwcap; 92 }; 93 }; 94 }; 95 96 extern DECLARE_BITMAP(cpu_hwcaps, ARM64_NCAPS); 97 98 static inline bool cpu_have_feature(unsigned int num) 99 { 100 return elf_hwcap & (1UL << num); 101 } 102 103 static inline bool cpus_have_cap(unsigned int num) 104 { 105 if (num >= ARM64_NCAPS) 106 return false; 107 return test_bit(num, cpu_hwcaps); 108 } 109 110 static inline void cpus_set_cap(unsigned int num) 111 { 112 if (num >= ARM64_NCAPS) 113 pr_warn("Attempt to set an illegal CPU capability (%d >= %d)\n", 114 num, ARM64_NCAPS); 115 else 116 __set_bit(num, cpu_hwcaps); 117 } 118 119 static inline int __attribute_const__ 120 cpuid_feature_extract_field_width(u64 features, int field, int width) 121 { 122 return (s64)(features << (64 - width - field)) >> (64 - width); 123 } 124 125 static inline int __attribute_const__ 126 cpuid_feature_extract_field(u64 features, int field) 127 { 128 return cpuid_feature_extract_field_width(features, field, 4); 129 } 130 131 static inline unsigned int __attribute_const__ 132 cpuid_feature_extract_unsigned_field_width(u64 features, int field, int width) 133 { 134 return (u64)(features << (64 - width - field)) >> (64 - width); 135 } 136 137 static inline unsigned int __attribute_const__ 138 cpuid_feature_extract_unsigned_field(u64 features, int field) 139 { 140 return cpuid_feature_extract_unsigned_field_width(features, field, 4); 141 } 142 143 static inline u64 arm64_ftr_mask(struct arm64_ftr_bits *ftrp) 144 { 145 return (u64)GENMASK(ftrp->shift + ftrp->width - 1, ftrp->shift); 146 } 147 148 static inline s64 arm64_ftr_value(struct arm64_ftr_bits *ftrp, u64 val) 149 { 150 return ftrp->sign ? 151 cpuid_feature_extract_field_width(val, ftrp->shift, ftrp->width) : 152 cpuid_feature_extract_unsigned_field_width(val, ftrp->shift, ftrp->width); 153 } 154 155 static inline bool id_aa64mmfr0_mixed_endian_el0(u64 mmfr0) 156 { 157 return cpuid_feature_extract_field(mmfr0, ID_AA64MMFR0_BIGENDEL_SHIFT) == 0x1 || 158 cpuid_feature_extract_field(mmfr0, ID_AA64MMFR0_BIGENDEL0_SHIFT) == 0x1; 159 } 160 161 void __init setup_cpu_features(void); 162 163 void update_cpu_capabilities(const struct arm64_cpu_capabilities *caps, 164 const char *info); 165 void check_local_cpu_errata(void); 166 167 #ifdef CONFIG_HOTPLUG_CPU 168 void verify_local_cpu_capabilities(void); 169 #else 170 static inline void verify_local_cpu_capabilities(void) 171 { 172 } 173 #endif 174 175 u64 read_system_reg(u32 id); 176 177 static inline bool cpu_supports_mixed_endian_el0(void) 178 { 179 return id_aa64mmfr0_mixed_endian_el0(read_cpuid(ID_AA64MMFR0_EL1)); 180 } 181 182 static inline bool system_supports_mixed_endian_el0(void) 183 { 184 return id_aa64mmfr0_mixed_endian_el0(read_system_reg(SYS_ID_AA64MMFR0_EL1)); 185 } 186 187 #endif /* __ASSEMBLY__ */ 188 189 #endif 190