1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2014 ARM Ltd. 4 */ 5 #ifndef __ASM_CPU_H 6 #define __ASM_CPU_H 7 8 #include <linux/cpu.h> 9 #include <linux/init.h> 10 #include <linux/percpu.h> 11 12 /* 13 * Records attributes of an individual CPU. 14 */ 15 struct cpuinfo_32bit { 16 u32 reg_id_dfr0; 17 u32 reg_id_dfr1; 18 u32 reg_id_isar0; 19 u32 reg_id_isar1; 20 u32 reg_id_isar2; 21 u32 reg_id_isar3; 22 u32 reg_id_isar4; 23 u32 reg_id_isar5; 24 u32 reg_id_isar6; 25 u32 reg_id_mmfr0; 26 u32 reg_id_mmfr1; 27 u32 reg_id_mmfr2; 28 u32 reg_id_mmfr3; 29 u32 reg_id_mmfr4; 30 u32 reg_id_mmfr5; 31 u32 reg_id_pfr0; 32 u32 reg_id_pfr1; 33 u32 reg_id_pfr2; 34 35 u32 reg_mvfr0; 36 u32 reg_mvfr1; 37 u32 reg_mvfr2; 38 }; 39 40 struct cpuinfo_arm64 { 41 struct cpu cpu; 42 struct kobject kobj; 43 u64 reg_ctr; 44 u64 reg_cntfrq; 45 u64 reg_dczid; 46 u64 reg_midr; 47 u64 reg_revidr; 48 u64 reg_gmid; 49 u64 reg_smidr; 50 51 u64 reg_id_aa64dfr0; 52 u64 reg_id_aa64dfr1; 53 u64 reg_id_aa64isar0; 54 u64 reg_id_aa64isar1; 55 u64 reg_id_aa64isar2; 56 u64 reg_id_aa64mmfr0; 57 u64 reg_id_aa64mmfr1; 58 u64 reg_id_aa64mmfr2; 59 u64 reg_id_aa64mmfr3; 60 u64 reg_id_aa64pfr0; 61 u64 reg_id_aa64pfr1; 62 u64 reg_id_aa64zfr0; 63 u64 reg_id_aa64smfr0; 64 65 struct cpuinfo_32bit aarch32; 66 67 /* pseudo-ZCR for recording maximum ZCR_EL1 LEN value: */ 68 u64 reg_zcr; 69 70 /* pseudo-SMCR for recording maximum SMCR_EL1 LEN value: */ 71 u64 reg_smcr; 72 }; 73 74 DECLARE_PER_CPU(struct cpuinfo_arm64, cpu_data); 75 76 void cpuinfo_store_cpu(void); 77 void __init cpuinfo_store_boot_cpu(void); 78 79 void __init init_cpu_features(struct cpuinfo_arm64 *info); 80 void update_cpu_features(int cpu, struct cpuinfo_arm64 *info, 81 struct cpuinfo_arm64 *boot); 82 83 #endif /* __ASM_CPU_H */ 84