1caab277bSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2df857416SMark Rutland /* 3df857416SMark Rutland * Copyright (C) 2014 ARM Ltd. 4df857416SMark Rutland */ 5df857416SMark Rutland #ifndef __ASM_CPU_H 6df857416SMark Rutland #define __ASM_CPU_H 7df857416SMark Rutland 8df857416SMark Rutland #include <linux/cpu.h> 9df857416SMark Rutland #include <linux/init.h> 10df857416SMark Rutland #include <linux/percpu.h> 11df857416SMark Rutland 12df857416SMark Rutland /* 13df857416SMark Rutland * Records attributes of an individual CPU. 14df857416SMark Rutland */ 15930a58b4SWill Deacon struct cpuinfo_32bit { 1680639d4aSMark Rutland u32 reg_id_dfr0; 17dd35ec07SAnshuman Khandual u32 reg_id_dfr1; 18df857416SMark Rutland u32 reg_id_isar0; 19df857416SMark Rutland u32 reg_id_isar1; 20df857416SMark Rutland u32 reg_id_isar2; 21df857416SMark Rutland u32 reg_id_isar3; 22df857416SMark Rutland u32 reg_id_isar4; 23df857416SMark Rutland u32 reg_id_isar5; 248e3747beSAnshuman Khandual u32 reg_id_isar6; 25df857416SMark Rutland u32 reg_id_mmfr0; 26df857416SMark Rutland u32 reg_id_mmfr1; 27df857416SMark Rutland u32 reg_id_mmfr2; 28df857416SMark Rutland u32 reg_id_mmfr3; 29858b8a80SAnshuman Khandual u32 reg_id_mmfr4; 30152accf8SAnshuman Khandual u32 reg_id_mmfr5; 31df857416SMark Rutland u32 reg_id_pfr0; 32df857416SMark Rutland u32 reg_id_pfr1; 3316824085SAnshuman Khandual u32 reg_id_pfr2; 3480639d4aSMark Rutland 3580639d4aSMark Rutland u32 reg_mvfr0; 3680639d4aSMark Rutland u32 reg_mvfr1; 3780639d4aSMark Rutland u32 reg_mvfr2; 38930a58b4SWill Deacon }; 39930a58b4SWill Deacon 40930a58b4SWill Deacon struct cpuinfo_arm64 { 41930a58b4SWill Deacon struct cpu cpu; 42930a58b4SWill Deacon struct kobject kobj; 43930a58b4SWill Deacon u64 reg_ctr; 44930a58b4SWill Deacon u64 reg_cntfrq; 45930a58b4SWill Deacon u64 reg_dczid; 46930a58b4SWill Deacon u64 reg_midr; 47930a58b4SWill Deacon u64 reg_revidr; 48930a58b4SWill Deacon u64 reg_gmid; 49d69d5649SMark Brown u64 reg_smidr; 50930a58b4SWill Deacon 51930a58b4SWill Deacon u64 reg_id_aa64dfr0; 52930a58b4SWill Deacon u64 reg_id_aa64dfr1; 53930a58b4SWill Deacon u64 reg_id_aa64isar0; 54930a58b4SWill Deacon u64 reg_id_aa64isar1; 559e45365fSJoey Gouly u64 reg_id_aa64isar2; 56930a58b4SWill Deacon u64 reg_id_aa64mmfr0; 57930a58b4SWill Deacon u64 reg_id_aa64mmfr1; 58930a58b4SWill Deacon u64 reg_id_aa64mmfr2; 59*edc25898SJoey Gouly u64 reg_id_aa64mmfr3; 60930a58b4SWill Deacon u64 reg_id_aa64pfr0; 61930a58b4SWill Deacon u64 reg_id_aa64pfr1; 62930a58b4SWill Deacon u64 reg_id_aa64zfr0; 635e64b862SMark Brown u64 reg_id_aa64smfr0; 64930a58b4SWill Deacon 65930a58b4SWill Deacon struct cpuinfo_32bit aarch32; 662e0f2478SDave Martin 672e0f2478SDave Martin /* pseudo-ZCR for recording maximum ZCR_EL1 LEN value: */ 682e0f2478SDave Martin u64 reg_zcr; 69b42990d3SMark Brown 70b42990d3SMark Brown /* pseudo-SMCR for recording maximum SMCR_EL1 LEN value: */ 71b42990d3SMark Brown u64 reg_smcr; 72df857416SMark Rutland }; 73df857416SMark Rutland 74df857416SMark Rutland DECLARE_PER_CPU(struct cpuinfo_arm64, cpu_data); 75df857416SMark Rutland 76df857416SMark Rutland void cpuinfo_store_cpu(void); 77df857416SMark Rutland void __init cpuinfo_store_boot_cpu(void); 78df857416SMark Rutland 793c739b57SSuzuki K. Poulose void __init init_cpu_features(struct cpuinfo_arm64 *info); 803086d391SSuzuki K. Poulose void update_cpu_features(int cpu, struct cpuinfo_arm64 *info, 813086d391SSuzuki K. Poulose struct cpuinfo_arm64 *boot); 82cdcf817bSSuzuki K. Poulose 83df857416SMark Rutland #endif /* __ASM_CPU_H */ 84