1 /* 2 * Based on arch/arm/include/asm/barrier.h 3 * 4 * Copyright (C) 2012 ARM Ltd. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program. If not, see <http://www.gnu.org/licenses/>. 17 */ 18 #ifndef __ASM_BARRIER_H 19 #define __ASM_BARRIER_H 20 21 #ifndef __ASSEMBLY__ 22 23 #define __nops(n) ".rept " #n "\nnop\n.endr\n" 24 #define nops(n) asm volatile(__nops(n)) 25 26 #define sev() asm volatile("sev" : : : "memory") 27 #define wfe() asm volatile("wfe" : : : "memory") 28 #define wfi() asm volatile("wfi" : : : "memory") 29 30 #define isb() asm volatile("isb" : : : "memory") 31 #define dmb(opt) asm volatile("dmb " #opt : : : "memory") 32 #define dsb(opt) asm volatile("dsb " #opt : : : "memory") 33 34 #define mb() dsb(sy) 35 #define rmb() dsb(ld) 36 #define wmb() dsb(st) 37 38 #define dma_rmb() dmb(oshld) 39 #define dma_wmb() dmb(oshst) 40 41 #define __smp_mb() dmb(ish) 42 #define __smp_rmb() dmb(ishld) 43 #define __smp_wmb() dmb(ishst) 44 45 #define __smp_store_release(p, v) \ 46 do { \ 47 union { typeof(*p) __val; char __c[1]; } __u = \ 48 { .__val = (__force typeof(*p)) (v) }; \ 49 compiletime_assert_atomic_type(*p); \ 50 switch (sizeof(*p)) { \ 51 case 1: \ 52 asm volatile ("stlrb %w1, %0" \ 53 : "=Q" (*p) \ 54 : "r" (*(__u8 *)__u.__c) \ 55 : "memory"); \ 56 break; \ 57 case 2: \ 58 asm volatile ("stlrh %w1, %0" \ 59 : "=Q" (*p) \ 60 : "r" (*(__u16 *)__u.__c) \ 61 : "memory"); \ 62 break; \ 63 case 4: \ 64 asm volatile ("stlr %w1, %0" \ 65 : "=Q" (*p) \ 66 : "r" (*(__u32 *)__u.__c) \ 67 : "memory"); \ 68 break; \ 69 case 8: \ 70 asm volatile ("stlr %1, %0" \ 71 : "=Q" (*p) \ 72 : "r" (*(__u64 *)__u.__c) \ 73 : "memory"); \ 74 break; \ 75 } \ 76 } while (0) 77 78 #define __smp_load_acquire(p) \ 79 ({ \ 80 union { typeof(*p) __val; char __c[1]; } __u; \ 81 compiletime_assert_atomic_type(*p); \ 82 switch (sizeof(*p)) { \ 83 case 1: \ 84 asm volatile ("ldarb %w0, %1" \ 85 : "=r" (*(__u8 *)__u.__c) \ 86 : "Q" (*p) : "memory"); \ 87 break; \ 88 case 2: \ 89 asm volatile ("ldarh %w0, %1" \ 90 : "=r" (*(__u16 *)__u.__c) \ 91 : "Q" (*p) : "memory"); \ 92 break; \ 93 case 4: \ 94 asm volatile ("ldar %w0, %1" \ 95 : "=r" (*(__u32 *)__u.__c) \ 96 : "Q" (*p) : "memory"); \ 97 break; \ 98 case 8: \ 99 asm volatile ("ldar %0, %1" \ 100 : "=r" (*(__u64 *)__u.__c) \ 101 : "Q" (*p) : "memory"); \ 102 break; \ 103 } \ 104 __u.__val; \ 105 }) 106 107 #define smp_cond_load_acquire(ptr, cond_expr) \ 108 ({ \ 109 typeof(ptr) __PTR = (ptr); \ 110 typeof(*ptr) VAL; \ 111 for (;;) { \ 112 VAL = smp_load_acquire(__PTR); \ 113 if (cond_expr) \ 114 break; \ 115 __cmpwait_relaxed(__PTR, VAL); \ 116 } \ 117 VAL; \ 118 }) 119 120 #include <asm-generic/barrier.h> 121 122 #endif /* __ASSEMBLY__ */ 123 124 #endif /* __ASM_BARRIER_H */ 125