1 /* 2 * arch/arm64/include/asm/arch_timer.h 3 * 4 * Copyright (C) 2012 ARM Ltd. 5 * Author: Marc Zyngier <marc.zyngier@arm.com> 6 * 7 * This program is free software: you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program. If not, see <http://www.gnu.org/licenses/>. 18 */ 19 #ifndef __ASM_ARCH_TIMER_H 20 #define __ASM_ARCH_TIMER_H 21 22 #include <asm/barrier.h> 23 #include <asm/sysreg.h> 24 25 #include <linux/bug.h> 26 #include <linux/init.h> 27 #include <linux/jump_label.h> 28 #include <linux/types.h> 29 30 #include <clocksource/arm_arch_timer.h> 31 32 #if IS_ENABLED(CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND) 33 extern struct static_key_false arch_timer_read_ool_enabled; 34 #define needs_unstable_timer_counter_workaround() \ 35 static_branch_unlikely(&arch_timer_read_ool_enabled) 36 #else 37 #define needs_unstable_timer_counter_workaround() false 38 #endif 39 40 41 struct arch_timer_erratum_workaround { 42 const char *id; /* Indicate the Erratum ID */ 43 u32 (*read_cntp_tval_el0)(void); 44 u32 (*read_cntv_tval_el0)(void); 45 u64 (*read_cntvct_el0)(void); 46 }; 47 48 extern const struct arch_timer_erratum_workaround *timer_unstable_counter_workaround; 49 50 #define arch_timer_reg_read_stable(reg) \ 51 ({ \ 52 u64 _val; \ 53 if (needs_unstable_timer_counter_workaround()) \ 54 _val = timer_unstable_counter_workaround->read_##reg();\ 55 else \ 56 _val = read_sysreg(reg); \ 57 _val; \ 58 }) 59 60 /* 61 * These register accessors are marked inline so the compiler can 62 * nicely work out which register we want, and chuck away the rest of 63 * the code. 64 */ 65 static __always_inline 66 void arch_timer_reg_write_cp15(int access, enum arch_timer_reg reg, u32 val) 67 { 68 if (access == ARCH_TIMER_PHYS_ACCESS) { 69 switch (reg) { 70 case ARCH_TIMER_REG_CTRL: 71 write_sysreg(val, cntp_ctl_el0); 72 break; 73 case ARCH_TIMER_REG_TVAL: 74 write_sysreg(val, cntp_tval_el0); 75 break; 76 } 77 } else if (access == ARCH_TIMER_VIRT_ACCESS) { 78 switch (reg) { 79 case ARCH_TIMER_REG_CTRL: 80 write_sysreg(val, cntv_ctl_el0); 81 break; 82 case ARCH_TIMER_REG_TVAL: 83 write_sysreg(val, cntv_tval_el0); 84 break; 85 } 86 } 87 88 isb(); 89 } 90 91 static __always_inline 92 u32 arch_timer_reg_read_cp15(int access, enum arch_timer_reg reg) 93 { 94 if (access == ARCH_TIMER_PHYS_ACCESS) { 95 switch (reg) { 96 case ARCH_TIMER_REG_CTRL: 97 return read_sysreg(cntp_ctl_el0); 98 case ARCH_TIMER_REG_TVAL: 99 return arch_timer_reg_read_stable(cntp_tval_el0); 100 } 101 } else if (access == ARCH_TIMER_VIRT_ACCESS) { 102 switch (reg) { 103 case ARCH_TIMER_REG_CTRL: 104 return read_sysreg(cntv_ctl_el0); 105 case ARCH_TIMER_REG_TVAL: 106 return arch_timer_reg_read_stable(cntv_tval_el0); 107 } 108 } 109 110 BUG(); 111 } 112 113 static inline u32 arch_timer_get_cntfrq(void) 114 { 115 return read_sysreg(cntfrq_el0); 116 } 117 118 static inline u32 arch_timer_get_cntkctl(void) 119 { 120 return read_sysreg(cntkctl_el1); 121 } 122 123 static inline void arch_timer_set_cntkctl(u32 cntkctl) 124 { 125 write_sysreg(cntkctl, cntkctl_el1); 126 } 127 128 static inline u64 arch_counter_get_cntpct(void) 129 { 130 /* 131 * AArch64 kernel and user space mandate the use of CNTVCT. 132 */ 133 BUG(); 134 return 0; 135 } 136 137 static inline u64 arch_counter_get_cntvct(void) 138 { 139 isb(); 140 return arch_timer_reg_read_stable(cntvct_el0); 141 } 142 143 static inline int arch_timer_arch_init(void) 144 { 145 return 0; 146 } 147 148 #endif 149