xref: /openbmc/linux/arch/arm64/include/asm/acpi.h (revision 4f6cce39)
1 /*
2  *  Copyright (C) 2013-2014, Linaro Ltd.
3  *	Author: Al Stone <al.stone@linaro.org>
4  *	Author: Graeme Gregory <graeme.gregory@linaro.org>
5  *	Author: Hanjun Guo <hanjun.guo@linaro.org>
6  *
7  *  This program is free software; you can redistribute it and/or modify
8  *  it under the terms of the GNU General Public License version 2 as
9  *  published by the Free Software Foundation;
10  */
11 
12 #ifndef _ASM_ACPI_H
13 #define _ASM_ACPI_H
14 
15 #include <linux/memblock.h>
16 #include <linux/psci.h>
17 
18 #include <asm/cputype.h>
19 #include <asm/smp_plat.h>
20 #include <asm/tlbflush.h>
21 
22 /* Macros for consistency checks of the GICC subtable of MADT */
23 #define ACPI_MADT_GICC_LENGTH	\
24 	(acpi_gbl_FADT.header.revision < 6 ? 76 : 80)
25 
26 #define BAD_MADT_GICC_ENTRY(entry, end)						\
27 	(!(entry) || (unsigned long)(entry) + sizeof(*(entry)) > (end) ||	\
28 	 (entry)->header.length != ACPI_MADT_GICC_LENGTH)
29 
30 /* Basic configuration for ACPI */
31 #ifdef	CONFIG_ACPI
32 /* ACPI table mapping after acpi_permanent_mmap is set */
33 static inline void __iomem *acpi_os_ioremap(acpi_physical_address phys,
34 					    acpi_size size)
35 {
36 	/*
37 	 * EFI's reserve_regions() call adds memory with the WB attribute
38 	 * to memblock via early_init_dt_add_memory_arch().
39 	 */
40 	if (!memblock_is_memory(phys))
41 		return ioremap(phys, size);
42 
43 	return ioremap_cache(phys, size);
44 }
45 #define acpi_os_ioremap acpi_os_ioremap
46 
47 typedef u64 phys_cpuid_t;
48 #define PHYS_CPUID_INVALID INVALID_HWID
49 
50 #define acpi_strict 1	/* No out-of-spec workarounds on ARM64 */
51 extern int acpi_disabled;
52 extern int acpi_noirq;
53 extern int acpi_pci_disabled;
54 
55 static inline void disable_acpi(void)
56 {
57 	acpi_disabled = 1;
58 	acpi_pci_disabled = 1;
59 	acpi_noirq = 1;
60 }
61 
62 static inline void enable_acpi(void)
63 {
64 	acpi_disabled = 0;
65 	acpi_pci_disabled = 0;
66 	acpi_noirq = 0;
67 }
68 
69 /*
70  * The ACPI processor driver for ACPI core code needs this macro
71  * to find out this cpu was already mapped (mapping from CPU hardware
72  * ID to CPU logical ID) or not.
73  */
74 #define cpu_physical_id(cpu) cpu_logical_map(cpu)
75 
76 /*
77  * It's used from ACPI core in kdump to boot UP system with SMP kernel,
78  * with this check the ACPI core will not override the CPU index
79  * obtained from GICC with 0 and not print some error message as well.
80  * Since MADT must provide at least one GICC structure for GIC
81  * initialization, CPU will be always available in MADT on ARM64.
82  */
83 static inline bool acpi_has_cpu_in_madt(void)
84 {
85 	return true;
86 }
87 
88 static inline void arch_fix_phys_package_id(int num, u32 slot) { }
89 void __init acpi_init_cpus(void);
90 
91 #else
92 static inline void acpi_init_cpus(void) { }
93 #endif /* CONFIG_ACPI */
94 
95 #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
96 bool acpi_parking_protocol_valid(int cpu);
97 void __init
98 acpi_set_mailbox_entry(int cpu, struct acpi_madt_generic_interrupt *processor);
99 #else
100 static inline bool acpi_parking_protocol_valid(int cpu) { return false; }
101 static inline void
102 acpi_set_mailbox_entry(int cpu, struct acpi_madt_generic_interrupt *processor)
103 {}
104 #endif
105 
106 static inline const char *acpi_get_enable_method(int cpu)
107 {
108 	if (acpi_psci_present())
109 		return "psci";
110 
111 	if (acpi_parking_protocol_valid(cpu))
112 		return "parking-protocol";
113 
114 	return NULL;
115 }
116 
117 #ifdef	CONFIG_ACPI_APEI
118 /*
119  * acpi_disable_cmcff is used in drivers/acpi/apei/hest.c for disabling
120  * IA-32 Architecture Corrected Machine Check (CMC) Firmware-First mode
121  * with a kernel command line parameter "acpi=nocmcoff". But we don't
122  * have this IA-32 specific feature on ARM64, this definition is only
123  * for compatibility.
124  */
125 #define acpi_disable_cmcff 1
126 pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr);
127 
128 /*
129  * Despite its name, this function must still broadcast the TLB
130  * invalidation in order to ensure other CPUs don't end up with junk
131  * entries as a result of speculation. Unusually, its also called in
132  * IRQ context (ghes_iounmap_irq) so if we ever need to use IPIs for
133  * TLB broadcasting, then we're in trouble here.
134  */
135 static inline void arch_apei_flush_tlb_one(unsigned long addr)
136 {
137 	flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
138 }
139 #endif /* CONFIG_ACPI_APEI */
140 
141 #ifdef CONFIG_ACPI_NUMA
142 int arm64_acpi_numa_init(void);
143 int acpi_numa_get_nid(unsigned int cpu, u64 hwid);
144 #else
145 static inline int arm64_acpi_numa_init(void) { return -ENOSYS; }
146 static inline int acpi_numa_get_nid(unsigned int cpu, u64 hwid) { return NUMA_NO_NODE; }
147 #endif /* CONFIG_ACPI_NUMA */
148 
149 #define ACPI_TABLE_UPGRADE_MAX_PHYS MEMBLOCK_ALLOC_ACCESSIBLE
150 
151 #endif /*_ASM_ACPI_H*/
152