1#! /usr/bin/env perl 2# SPDX-License-Identifier: GPL-2.0 3 4# This code is taken from the OpenSSL project but the author (Andy Polyakov) 5# has relicensed it under the GPLv2. Therefore this program is free software; 6# you can redistribute it and/or modify it under the terms of the GNU General 7# Public License version 2 as published by the Free Software Foundation. 8# 9# The original headers, including the original license headers, are 10# included below for completeness. 11 12# Copyright 2014-2016 The OpenSSL Project Authors. All Rights Reserved. 13# 14# Licensed under the OpenSSL license (the "License"). You may not use 15# this file except in compliance with the License. You can obtain a copy 16# in the file LICENSE in the source distribution or at 17# https://www.openssl.org/source/license.html 18 19# ==================================================================== 20# Written by Andy Polyakov <appro@openssl.org> for the OpenSSL 21# project. The module is, however, dual licensed under OpenSSL and 22# CRYPTOGAMS licenses depending on where you obtain it. For further 23# details see http://www.openssl.org/~appro/cryptogams/. 24# ==================================================================== 25# 26# SHA256/512 for ARMv8. 27# 28# Performance in cycles per processed byte and improvement coefficient 29# over code generated with "default" compiler: 30# 31# SHA256-hw SHA256(*) SHA512 32# Apple A7 1.97 10.5 (+33%) 6.73 (-1%(**)) 33# Cortex-A53 2.38 15.5 (+115%) 10.0 (+150%(***)) 34# Cortex-A57 2.31 11.6 (+86%) 7.51 (+260%(***)) 35# Denver 2.01 10.5 (+26%) 6.70 (+8%) 36# X-Gene 20.0 (+100%) 12.8 (+300%(***)) 37# Mongoose 2.36 13.0 (+50%) 8.36 (+33%) 38# 39# (*) Software SHA256 results are of lesser relevance, presented 40# mostly for informational purposes. 41# (**) The result is a trade-off: it's possible to improve it by 42# 10% (or by 1 cycle per round), but at the cost of 20% loss 43# on Cortex-A53 (or by 4 cycles per round). 44# (***) Super-impressive coefficients over gcc-generated code are 45# indication of some compiler "pathology", most notably code 46# generated with -mgeneral-regs-only is significanty faster 47# and the gap is only 40-90%. 48# 49# October 2016. 50# 51# Originally it was reckoned that it makes no sense to implement NEON 52# version of SHA256 for 64-bit processors. This is because performance 53# improvement on most wide-spread Cortex-A5x processors was observed 54# to be marginal, same on Cortex-A53 and ~10% on A57. But then it was 55# observed that 32-bit NEON SHA256 performs significantly better than 56# 64-bit scalar version on *some* of the more recent processors. As 57# result 64-bit NEON version of SHA256 was added to provide best 58# all-round performance. For example it executes ~30% faster on X-Gene 59# and Mongoose. [For reference, NEON version of SHA512 is bound to 60# deliver much less improvement, likely *negative* on Cortex-A5x. 61# Which is why NEON support is limited to SHA256.] 62 63$output=pop; 64$flavour=pop; 65 66if ($flavour && $flavour ne "void") { 67 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1; 68 ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or 69 ( $xlate="${dir}../../perlasm/arm-xlate.pl" and -f $xlate) or 70 die "can't locate arm-xlate.pl"; 71 72 open OUT,"| \"$^X\" $xlate $flavour $output"; 73 *STDOUT=*OUT; 74} else { 75 open STDOUT,">$output"; 76} 77 78if ($output =~ /512/) { 79 $BITS=512; 80 $SZ=8; 81 @Sigma0=(28,34,39); 82 @Sigma1=(14,18,41); 83 @sigma0=(1, 8, 7); 84 @sigma1=(19,61, 6); 85 $rounds=80; 86 $reg_t="x"; 87} else { 88 $BITS=256; 89 $SZ=4; 90 @Sigma0=( 2,13,22); 91 @Sigma1=( 6,11,25); 92 @sigma0=( 7,18, 3); 93 @sigma1=(17,19,10); 94 $rounds=64; 95 $reg_t="w"; 96} 97 98$func="sha${BITS}_block_data_order"; 99 100($ctx,$inp,$num,$Ktbl)=map("x$_",(0..2,30)); 101 102@X=map("$reg_t$_",(3..15,0..2)); 103@V=($A,$B,$C,$D,$E,$F,$G,$H)=map("$reg_t$_",(20..27)); 104($t0,$t1,$t2,$t3)=map("$reg_t$_",(16,17,19,28)); 105 106sub BODY_00_xx { 107my ($i,$a,$b,$c,$d,$e,$f,$g,$h)=@_; 108my $j=($i+1)&15; 109my ($T0,$T1,$T2)=(@X[($i-8)&15],@X[($i-9)&15],@X[($i-10)&15]); 110 $T0=@X[$i+3] if ($i<11); 111 112$code.=<<___ if ($i<16); 113#ifndef __AARCH64EB__ 114 rev @X[$i],@X[$i] // $i 115#endif 116___ 117$code.=<<___ if ($i<13 && ($i&1)); 118 ldp @X[$i+1],@X[$i+2],[$inp],#2*$SZ 119___ 120$code.=<<___ if ($i==13); 121 ldp @X[14],@X[15],[$inp] 122___ 123$code.=<<___ if ($i>=14); 124 ldr @X[($i-11)&15],[sp,#`$SZ*(($i-11)%4)`] 125___ 126$code.=<<___ if ($i>0 && $i<16); 127 add $a,$a,$t1 // h+=Sigma0(a) 128___ 129$code.=<<___ if ($i>=11); 130 str @X[($i-8)&15],[sp,#`$SZ*(($i-8)%4)`] 131___ 132# While ARMv8 specifies merged rotate-n-logical operation such as 133# 'eor x,y,z,ror#n', it was found to negatively affect performance 134# on Apple A7. The reason seems to be that it requires even 'y' to 135# be available earlier. This means that such merged instruction is 136# not necessarily best choice on critical path... On the other hand 137# Cortex-A5x handles merged instructions much better than disjoint 138# rotate and logical... See (**) footnote above. 139$code.=<<___ if ($i<15); 140 ror $t0,$e,#$Sigma1[0] 141 add $h,$h,$t2 // h+=K[i] 142 eor $T0,$e,$e,ror#`$Sigma1[2]-$Sigma1[1]` 143 and $t1,$f,$e 144 bic $t2,$g,$e 145 add $h,$h,@X[$i&15] // h+=X[i] 146 orr $t1,$t1,$t2 // Ch(e,f,g) 147 eor $t2,$a,$b // a^b, b^c in next round 148 eor $t0,$t0,$T0,ror#$Sigma1[1] // Sigma1(e) 149 ror $T0,$a,#$Sigma0[0] 150 add $h,$h,$t1 // h+=Ch(e,f,g) 151 eor $t1,$a,$a,ror#`$Sigma0[2]-$Sigma0[1]` 152 add $h,$h,$t0 // h+=Sigma1(e) 153 and $t3,$t3,$t2 // (b^c)&=(a^b) 154 add $d,$d,$h // d+=h 155 eor $t3,$t3,$b // Maj(a,b,c) 156 eor $t1,$T0,$t1,ror#$Sigma0[1] // Sigma0(a) 157 add $h,$h,$t3 // h+=Maj(a,b,c) 158 ldr $t3,[$Ktbl],#$SZ // *K++, $t2 in next round 159 //add $h,$h,$t1 // h+=Sigma0(a) 160___ 161$code.=<<___ if ($i>=15); 162 ror $t0,$e,#$Sigma1[0] 163 add $h,$h,$t2 // h+=K[i] 164 ror $T1,@X[($j+1)&15],#$sigma0[0] 165 and $t1,$f,$e 166 ror $T2,@X[($j+14)&15],#$sigma1[0] 167 bic $t2,$g,$e 168 ror $T0,$a,#$Sigma0[0] 169 add $h,$h,@X[$i&15] // h+=X[i] 170 eor $t0,$t0,$e,ror#$Sigma1[1] 171 eor $T1,$T1,@X[($j+1)&15],ror#$sigma0[1] 172 orr $t1,$t1,$t2 // Ch(e,f,g) 173 eor $t2,$a,$b // a^b, b^c in next round 174 eor $t0,$t0,$e,ror#$Sigma1[2] // Sigma1(e) 175 eor $T0,$T0,$a,ror#$Sigma0[1] 176 add $h,$h,$t1 // h+=Ch(e,f,g) 177 and $t3,$t3,$t2 // (b^c)&=(a^b) 178 eor $T2,$T2,@X[($j+14)&15],ror#$sigma1[1] 179 eor $T1,$T1,@X[($j+1)&15],lsr#$sigma0[2] // sigma0(X[i+1]) 180 add $h,$h,$t0 // h+=Sigma1(e) 181 eor $t3,$t3,$b // Maj(a,b,c) 182 eor $t1,$T0,$a,ror#$Sigma0[2] // Sigma0(a) 183 eor $T2,$T2,@X[($j+14)&15],lsr#$sigma1[2] // sigma1(X[i+14]) 184 add @X[$j],@X[$j],@X[($j+9)&15] 185 add $d,$d,$h // d+=h 186 add $h,$h,$t3 // h+=Maj(a,b,c) 187 ldr $t3,[$Ktbl],#$SZ // *K++, $t2 in next round 188 add @X[$j],@X[$j],$T1 189 add $h,$h,$t1 // h+=Sigma0(a) 190 add @X[$j],@X[$j],$T2 191___ 192 ($t2,$t3)=($t3,$t2); 193} 194 195$code.=<<___; 196#ifndef __KERNEL__ 197# include "arm_arch.h" 198#endif 199 200.text 201 202.extern OPENSSL_armcap_P 203.globl $func 204.type $func,%function 205.align 6 206$func: 207___ 208$code.=<<___ if ($SZ==4); 209#ifndef __KERNEL__ 210# ifdef __ILP32__ 211 ldrsw x16,.LOPENSSL_armcap_P 212# else 213 ldr x16,.LOPENSSL_armcap_P 214# endif 215 adr x17,.LOPENSSL_armcap_P 216 add x16,x16,x17 217 ldr w16,[x16] 218 tst w16,#ARMV8_SHA256 219 b.ne .Lv8_entry 220 tst w16,#ARMV7_NEON 221 b.ne .Lneon_entry 222#endif 223___ 224$code.=<<___; 225 stp x29,x30,[sp,#-128]! 226 add x29,sp,#0 227 228 stp x19,x20,[sp,#16] 229 stp x21,x22,[sp,#32] 230 stp x23,x24,[sp,#48] 231 stp x25,x26,[sp,#64] 232 stp x27,x28,[sp,#80] 233 sub sp,sp,#4*$SZ 234 235 ldp $A,$B,[$ctx] // load context 236 ldp $C,$D,[$ctx,#2*$SZ] 237 ldp $E,$F,[$ctx,#4*$SZ] 238 add $num,$inp,$num,lsl#`log(16*$SZ)/log(2)` // end of input 239 ldp $G,$H,[$ctx,#6*$SZ] 240 adr $Ktbl,.LK$BITS 241 stp $ctx,$num,[x29,#96] 242 243.Loop: 244 ldp @X[0],@X[1],[$inp],#2*$SZ 245 ldr $t2,[$Ktbl],#$SZ // *K++ 246 eor $t3,$B,$C // magic seed 247 str $inp,[x29,#112] 248___ 249for ($i=0;$i<16;$i++) { &BODY_00_xx($i,@V); unshift(@V,pop(@V)); } 250$code.=".Loop_16_xx:\n"; 251for (;$i<32;$i++) { &BODY_00_xx($i,@V); unshift(@V,pop(@V)); } 252$code.=<<___; 253 cbnz $t2,.Loop_16_xx 254 255 ldp $ctx,$num,[x29,#96] 256 ldr $inp,[x29,#112] 257 sub $Ktbl,$Ktbl,#`$SZ*($rounds+1)` // rewind 258 259 ldp @X[0],@X[1],[$ctx] 260 ldp @X[2],@X[3],[$ctx,#2*$SZ] 261 add $inp,$inp,#14*$SZ // advance input pointer 262 ldp @X[4],@X[5],[$ctx,#4*$SZ] 263 add $A,$A,@X[0] 264 ldp @X[6],@X[7],[$ctx,#6*$SZ] 265 add $B,$B,@X[1] 266 add $C,$C,@X[2] 267 add $D,$D,@X[3] 268 stp $A,$B,[$ctx] 269 add $E,$E,@X[4] 270 add $F,$F,@X[5] 271 stp $C,$D,[$ctx,#2*$SZ] 272 add $G,$G,@X[6] 273 add $H,$H,@X[7] 274 cmp $inp,$num 275 stp $E,$F,[$ctx,#4*$SZ] 276 stp $G,$H,[$ctx,#6*$SZ] 277 b.ne .Loop 278 279 ldp x19,x20,[x29,#16] 280 add sp,sp,#4*$SZ 281 ldp x21,x22,[x29,#32] 282 ldp x23,x24,[x29,#48] 283 ldp x25,x26,[x29,#64] 284 ldp x27,x28,[x29,#80] 285 ldp x29,x30,[sp],#128 286 ret 287.size $func,.-$func 288 289.align 6 290.type .LK$BITS,%object 291.LK$BITS: 292___ 293$code.=<<___ if ($SZ==8); 294 .quad 0x428a2f98d728ae22,0x7137449123ef65cd 295 .quad 0xb5c0fbcfec4d3b2f,0xe9b5dba58189dbbc 296 .quad 0x3956c25bf348b538,0x59f111f1b605d019 297 .quad 0x923f82a4af194f9b,0xab1c5ed5da6d8118 298 .quad 0xd807aa98a3030242,0x12835b0145706fbe 299 .quad 0x243185be4ee4b28c,0x550c7dc3d5ffb4e2 300 .quad 0x72be5d74f27b896f,0x80deb1fe3b1696b1 301 .quad 0x9bdc06a725c71235,0xc19bf174cf692694 302 .quad 0xe49b69c19ef14ad2,0xefbe4786384f25e3 303 .quad 0x0fc19dc68b8cd5b5,0x240ca1cc77ac9c65 304 .quad 0x2de92c6f592b0275,0x4a7484aa6ea6e483 305 .quad 0x5cb0a9dcbd41fbd4,0x76f988da831153b5 306 .quad 0x983e5152ee66dfab,0xa831c66d2db43210 307 .quad 0xb00327c898fb213f,0xbf597fc7beef0ee4 308 .quad 0xc6e00bf33da88fc2,0xd5a79147930aa725 309 .quad 0x06ca6351e003826f,0x142929670a0e6e70 310 .quad 0x27b70a8546d22ffc,0x2e1b21385c26c926 311 .quad 0x4d2c6dfc5ac42aed,0x53380d139d95b3df 312 .quad 0x650a73548baf63de,0x766a0abb3c77b2a8 313 .quad 0x81c2c92e47edaee6,0x92722c851482353b 314 .quad 0xa2bfe8a14cf10364,0xa81a664bbc423001 315 .quad 0xc24b8b70d0f89791,0xc76c51a30654be30 316 .quad 0xd192e819d6ef5218,0xd69906245565a910 317 .quad 0xf40e35855771202a,0x106aa07032bbd1b8 318 .quad 0x19a4c116b8d2d0c8,0x1e376c085141ab53 319 .quad 0x2748774cdf8eeb99,0x34b0bcb5e19b48a8 320 .quad 0x391c0cb3c5c95a63,0x4ed8aa4ae3418acb 321 .quad 0x5b9cca4f7763e373,0x682e6ff3d6b2b8a3 322 .quad 0x748f82ee5defb2fc,0x78a5636f43172f60 323 .quad 0x84c87814a1f0ab72,0x8cc702081a6439ec 324 .quad 0x90befffa23631e28,0xa4506cebde82bde9 325 .quad 0xbef9a3f7b2c67915,0xc67178f2e372532b 326 .quad 0xca273eceea26619c,0xd186b8c721c0c207 327 .quad 0xeada7dd6cde0eb1e,0xf57d4f7fee6ed178 328 .quad 0x06f067aa72176fba,0x0a637dc5a2c898a6 329 .quad 0x113f9804bef90dae,0x1b710b35131c471b 330 .quad 0x28db77f523047d84,0x32caab7b40c72493 331 .quad 0x3c9ebe0a15c9bebc,0x431d67c49c100d4c 332 .quad 0x4cc5d4becb3e42b6,0x597f299cfc657e2a 333 .quad 0x5fcb6fab3ad6faec,0x6c44198c4a475817 334 .quad 0 // terminator 335___ 336$code.=<<___ if ($SZ==4); 337 .long 0x428a2f98,0x71374491,0xb5c0fbcf,0xe9b5dba5 338 .long 0x3956c25b,0x59f111f1,0x923f82a4,0xab1c5ed5 339 .long 0xd807aa98,0x12835b01,0x243185be,0x550c7dc3 340 .long 0x72be5d74,0x80deb1fe,0x9bdc06a7,0xc19bf174 341 .long 0xe49b69c1,0xefbe4786,0x0fc19dc6,0x240ca1cc 342 .long 0x2de92c6f,0x4a7484aa,0x5cb0a9dc,0x76f988da 343 .long 0x983e5152,0xa831c66d,0xb00327c8,0xbf597fc7 344 .long 0xc6e00bf3,0xd5a79147,0x06ca6351,0x14292967 345 .long 0x27b70a85,0x2e1b2138,0x4d2c6dfc,0x53380d13 346 .long 0x650a7354,0x766a0abb,0x81c2c92e,0x92722c85 347 .long 0xa2bfe8a1,0xa81a664b,0xc24b8b70,0xc76c51a3 348 .long 0xd192e819,0xd6990624,0xf40e3585,0x106aa070 349 .long 0x19a4c116,0x1e376c08,0x2748774c,0x34b0bcb5 350 .long 0x391c0cb3,0x4ed8aa4a,0x5b9cca4f,0x682e6ff3 351 .long 0x748f82ee,0x78a5636f,0x84c87814,0x8cc70208 352 .long 0x90befffa,0xa4506ceb,0xbef9a3f7,0xc67178f2 353 .long 0 //terminator 354___ 355$code.=<<___; 356.size .LK$BITS,.-.LK$BITS 357#ifndef __KERNEL__ 358.align 3 359.LOPENSSL_armcap_P: 360# ifdef __ILP32__ 361 .long OPENSSL_armcap_P-. 362# else 363 .quad OPENSSL_armcap_P-. 364# endif 365#endif 366.asciz "SHA$BITS block transform for ARMv8, CRYPTOGAMS by <appro\@openssl.org>" 367.align 2 368___ 369 370if ($SZ==4) { 371my $Ktbl="x3"; 372 373my ($ABCD,$EFGH,$abcd)=map("v$_.16b",(0..2)); 374my @MSG=map("v$_.16b",(4..7)); 375my ($W0,$W1)=("v16.4s","v17.4s"); 376my ($ABCD_SAVE,$EFGH_SAVE)=("v18.16b","v19.16b"); 377 378$code.=<<___; 379#ifndef __KERNEL__ 380.type sha256_block_armv8,%function 381.align 6 382sha256_block_armv8: 383.Lv8_entry: 384 stp x29,x30,[sp,#-16]! 385 add x29,sp,#0 386 387 ld1.32 {$ABCD,$EFGH},[$ctx] 388 adr $Ktbl,.LK256 389 390.Loop_hw: 391 ld1 {@MSG[0]-@MSG[3]},[$inp],#64 392 sub $num,$num,#1 393 ld1.32 {$W0},[$Ktbl],#16 394 rev32 @MSG[0],@MSG[0] 395 rev32 @MSG[1],@MSG[1] 396 rev32 @MSG[2],@MSG[2] 397 rev32 @MSG[3],@MSG[3] 398 orr $ABCD_SAVE,$ABCD,$ABCD // offload 399 orr $EFGH_SAVE,$EFGH,$EFGH 400___ 401for($i=0;$i<12;$i++) { 402$code.=<<___; 403 ld1.32 {$W1},[$Ktbl],#16 404 add.i32 $W0,$W0,@MSG[0] 405 sha256su0 @MSG[0],@MSG[1] 406 orr $abcd,$ABCD,$ABCD 407 sha256h $ABCD,$EFGH,$W0 408 sha256h2 $EFGH,$abcd,$W0 409 sha256su1 @MSG[0],@MSG[2],@MSG[3] 410___ 411 ($W0,$W1)=($W1,$W0); push(@MSG,shift(@MSG)); 412} 413$code.=<<___; 414 ld1.32 {$W1},[$Ktbl],#16 415 add.i32 $W0,$W0,@MSG[0] 416 orr $abcd,$ABCD,$ABCD 417 sha256h $ABCD,$EFGH,$W0 418 sha256h2 $EFGH,$abcd,$W0 419 420 ld1.32 {$W0},[$Ktbl],#16 421 add.i32 $W1,$W1,@MSG[1] 422 orr $abcd,$ABCD,$ABCD 423 sha256h $ABCD,$EFGH,$W1 424 sha256h2 $EFGH,$abcd,$W1 425 426 ld1.32 {$W1},[$Ktbl] 427 add.i32 $W0,$W0,@MSG[2] 428 sub $Ktbl,$Ktbl,#$rounds*$SZ-16 // rewind 429 orr $abcd,$ABCD,$ABCD 430 sha256h $ABCD,$EFGH,$W0 431 sha256h2 $EFGH,$abcd,$W0 432 433 add.i32 $W1,$W1,@MSG[3] 434 orr $abcd,$ABCD,$ABCD 435 sha256h $ABCD,$EFGH,$W1 436 sha256h2 $EFGH,$abcd,$W1 437 438 add.i32 $ABCD,$ABCD,$ABCD_SAVE 439 add.i32 $EFGH,$EFGH,$EFGH_SAVE 440 441 cbnz $num,.Loop_hw 442 443 st1.32 {$ABCD,$EFGH},[$ctx] 444 445 ldr x29,[sp],#16 446 ret 447.size sha256_block_armv8,.-sha256_block_armv8 448#endif 449___ 450} 451 452if ($SZ==4) { ######################################### NEON stuff # 453# You'll surely note a lot of similarities with sha256-armv4 module, 454# and of course it's not a coincidence. sha256-armv4 was used as 455# initial template, but was adapted for ARMv8 instruction set and 456# extensively re-tuned for all-round performance. 457 458my @V = ($A,$B,$C,$D,$E,$F,$G,$H) = map("w$_",(3..10)); 459my ($t0,$t1,$t2,$t3,$t4) = map("w$_",(11..15)); 460my $Ktbl="x16"; 461my $Xfer="x17"; 462my @X = map("q$_",(0..3)); 463my ($T0,$T1,$T2,$T3,$T4,$T5,$T6,$T7) = map("q$_",(4..7,16..19)); 464my $j=0; 465 466sub AUTOLOAD() # thunk [simplified] x86-style perlasm 467{ my $opcode = $AUTOLOAD; $opcode =~ s/.*:://; $opcode =~ s/_/\./; 468 my $arg = pop; 469 $arg = "#$arg" if ($arg*1 eq $arg); 470 $code .= "\t$opcode\t".join(',',@_,$arg)."\n"; 471} 472 473sub Dscalar { shift =~ m|[qv]([0-9]+)|?"d$1":""; } 474sub Dlo { shift =~ m|[qv]([0-9]+)|?"v$1.d[0]":""; } 475sub Dhi { shift =~ m|[qv]([0-9]+)|?"v$1.d[1]":""; } 476 477sub Xupdate() 478{ use integer; 479 my $body = shift; 480 my @insns = (&$body,&$body,&$body,&$body); 481 my ($a,$b,$c,$d,$e,$f,$g,$h); 482 483 &ext_8 ($T0,@X[0],@X[1],4); # X[1..4] 484 eval(shift(@insns)); 485 eval(shift(@insns)); 486 eval(shift(@insns)); 487 &ext_8 ($T3,@X[2],@X[3],4); # X[9..12] 488 eval(shift(@insns)); 489 eval(shift(@insns)); 490 &mov (&Dscalar($T7),&Dhi(@X[3])); # X[14..15] 491 eval(shift(@insns)); 492 eval(shift(@insns)); 493 &ushr_32 ($T2,$T0,$sigma0[0]); 494 eval(shift(@insns)); 495 &ushr_32 ($T1,$T0,$sigma0[2]); 496 eval(shift(@insns)); 497 &add_32 (@X[0],@X[0],$T3); # X[0..3] += X[9..12] 498 eval(shift(@insns)); 499 &sli_32 ($T2,$T0,32-$sigma0[0]); 500 eval(shift(@insns)); 501 eval(shift(@insns)); 502 &ushr_32 ($T3,$T0,$sigma0[1]); 503 eval(shift(@insns)); 504 eval(shift(@insns)); 505 &eor_8 ($T1,$T1,$T2); 506 eval(shift(@insns)); 507 eval(shift(@insns)); 508 &sli_32 ($T3,$T0,32-$sigma0[1]); 509 eval(shift(@insns)); 510 eval(shift(@insns)); 511 &ushr_32 ($T4,$T7,$sigma1[0]); 512 eval(shift(@insns)); 513 eval(shift(@insns)); 514 &eor_8 ($T1,$T1,$T3); # sigma0(X[1..4]) 515 eval(shift(@insns)); 516 eval(shift(@insns)); 517 &sli_32 ($T4,$T7,32-$sigma1[0]); 518 eval(shift(@insns)); 519 eval(shift(@insns)); 520 &ushr_32 ($T5,$T7,$sigma1[2]); 521 eval(shift(@insns)); 522 eval(shift(@insns)); 523 &ushr_32 ($T3,$T7,$sigma1[1]); 524 eval(shift(@insns)); 525 eval(shift(@insns)); 526 &add_32 (@X[0],@X[0],$T1); # X[0..3] += sigma0(X[1..4]) 527 eval(shift(@insns)); 528 eval(shift(@insns)); 529 &sli_u32 ($T3,$T7,32-$sigma1[1]); 530 eval(shift(@insns)); 531 eval(shift(@insns)); 532 &eor_8 ($T5,$T5,$T4); 533 eval(shift(@insns)); 534 eval(shift(@insns)); 535 eval(shift(@insns)); 536 &eor_8 ($T5,$T5,$T3); # sigma1(X[14..15]) 537 eval(shift(@insns)); 538 eval(shift(@insns)); 539 eval(shift(@insns)); 540 &add_32 (@X[0],@X[0],$T5); # X[0..1] += sigma1(X[14..15]) 541 eval(shift(@insns)); 542 eval(shift(@insns)); 543 eval(shift(@insns)); 544 &ushr_32 ($T6,@X[0],$sigma1[0]); 545 eval(shift(@insns)); 546 &ushr_32 ($T7,@X[0],$sigma1[2]); 547 eval(shift(@insns)); 548 eval(shift(@insns)); 549 &sli_32 ($T6,@X[0],32-$sigma1[0]); 550 eval(shift(@insns)); 551 &ushr_32 ($T5,@X[0],$sigma1[1]); 552 eval(shift(@insns)); 553 eval(shift(@insns)); 554 &eor_8 ($T7,$T7,$T6); 555 eval(shift(@insns)); 556 eval(shift(@insns)); 557 &sli_32 ($T5,@X[0],32-$sigma1[1]); 558 eval(shift(@insns)); 559 eval(shift(@insns)); 560 &ld1_32 ("{$T0}","[$Ktbl], #16"); 561 eval(shift(@insns)); 562 &eor_8 ($T7,$T7,$T5); # sigma1(X[16..17]) 563 eval(shift(@insns)); 564 eval(shift(@insns)); 565 &eor_8 ($T5,$T5,$T5); 566 eval(shift(@insns)); 567 eval(shift(@insns)); 568 &mov (&Dhi($T5), &Dlo($T7)); 569 eval(shift(@insns)); 570 eval(shift(@insns)); 571 eval(shift(@insns)); 572 &add_32 (@X[0],@X[0],$T5); # X[2..3] += sigma1(X[16..17]) 573 eval(shift(@insns)); 574 eval(shift(@insns)); 575 eval(shift(@insns)); 576 &add_32 ($T0,$T0,@X[0]); 577 while($#insns>=1) { eval(shift(@insns)); } 578 &st1_32 ("{$T0}","[$Xfer], #16"); 579 eval(shift(@insns)); 580 581 push(@X,shift(@X)); # "rotate" X[] 582} 583 584sub Xpreload() 585{ use integer; 586 my $body = shift; 587 my @insns = (&$body,&$body,&$body,&$body); 588 my ($a,$b,$c,$d,$e,$f,$g,$h); 589 590 eval(shift(@insns)); 591 eval(shift(@insns)); 592 &ld1_8 ("{@X[0]}","[$inp],#16"); 593 eval(shift(@insns)); 594 eval(shift(@insns)); 595 &ld1_32 ("{$T0}","[$Ktbl],#16"); 596 eval(shift(@insns)); 597 eval(shift(@insns)); 598 eval(shift(@insns)); 599 eval(shift(@insns)); 600 &rev32 (@X[0],@X[0]); 601 eval(shift(@insns)); 602 eval(shift(@insns)); 603 eval(shift(@insns)); 604 eval(shift(@insns)); 605 &add_32 ($T0,$T0,@X[0]); 606 foreach (@insns) { eval; } # remaining instructions 607 &st1_32 ("{$T0}","[$Xfer], #16"); 608 609 push(@X,shift(@X)); # "rotate" X[] 610} 611 612sub body_00_15 () { 613 ( 614 '($a,$b,$c,$d,$e,$f,$g,$h)=@V;'. 615 '&add ($h,$h,$t1)', # h+=X[i]+K[i] 616 '&add ($a,$a,$t4);'. # h+=Sigma0(a) from the past 617 '&and ($t1,$f,$e)', 618 '&bic ($t4,$g,$e)', 619 '&eor ($t0,$e,$e,"ror#".($Sigma1[1]-$Sigma1[0]))', 620 '&add ($a,$a,$t2)', # h+=Maj(a,b,c) from the past 621 '&orr ($t1,$t1,$t4)', # Ch(e,f,g) 622 '&eor ($t0,$t0,$e,"ror#".($Sigma1[2]-$Sigma1[0]))', # Sigma1(e) 623 '&eor ($t4,$a,$a,"ror#".($Sigma0[1]-$Sigma0[0]))', 624 '&add ($h,$h,$t1)', # h+=Ch(e,f,g) 625 '&ror ($t0,$t0,"#$Sigma1[0]")', 626 '&eor ($t2,$a,$b)', # a^b, b^c in next round 627 '&eor ($t4,$t4,$a,"ror#".($Sigma0[2]-$Sigma0[0]))', # Sigma0(a) 628 '&add ($h,$h,$t0)', # h+=Sigma1(e) 629 '&ldr ($t1,sprintf "[sp,#%d]",4*(($j+1)&15)) if (($j&15)!=15);'. 630 '&ldr ($t1,"[$Ktbl]") if ($j==15);'. 631 '&and ($t3,$t3,$t2)', # (b^c)&=(a^b) 632 '&ror ($t4,$t4,"#$Sigma0[0]")', 633 '&add ($d,$d,$h)', # d+=h 634 '&eor ($t3,$t3,$b)', # Maj(a,b,c) 635 '$j++; unshift(@V,pop(@V)); ($t2,$t3)=($t3,$t2);' 636 ) 637} 638 639$code.=<<___; 640#ifdef __KERNEL__ 641.globl sha256_block_neon 642#endif 643.type sha256_block_neon,%function 644.align 4 645sha256_block_neon: 646.Lneon_entry: 647 stp x29, x30, [sp, #-16]! 648 mov x29, sp 649 sub sp,sp,#16*4 650 651 adr $Ktbl,.LK256 652 add $num,$inp,$num,lsl#6 // len to point at the end of inp 653 654 ld1.8 {@X[0]},[$inp], #16 655 ld1.8 {@X[1]},[$inp], #16 656 ld1.8 {@X[2]},[$inp], #16 657 ld1.8 {@X[3]},[$inp], #16 658 ld1.32 {$T0},[$Ktbl], #16 659 ld1.32 {$T1},[$Ktbl], #16 660 ld1.32 {$T2},[$Ktbl], #16 661 ld1.32 {$T3},[$Ktbl], #16 662 rev32 @X[0],@X[0] // yes, even on 663 rev32 @X[1],@X[1] // big-endian 664 rev32 @X[2],@X[2] 665 rev32 @X[3],@X[3] 666 mov $Xfer,sp 667 add.32 $T0,$T0,@X[0] 668 add.32 $T1,$T1,@X[1] 669 add.32 $T2,$T2,@X[2] 670 st1.32 {$T0-$T1},[$Xfer], #32 671 add.32 $T3,$T3,@X[3] 672 st1.32 {$T2-$T3},[$Xfer] 673 sub $Xfer,$Xfer,#32 674 675 ldp $A,$B,[$ctx] 676 ldp $C,$D,[$ctx,#8] 677 ldp $E,$F,[$ctx,#16] 678 ldp $G,$H,[$ctx,#24] 679 ldr $t1,[sp,#0] 680 mov $t2,wzr 681 eor $t3,$B,$C 682 mov $t4,wzr 683 b .L_00_48 684 685.align 4 686.L_00_48: 687___ 688 &Xupdate(\&body_00_15); 689 &Xupdate(\&body_00_15); 690 &Xupdate(\&body_00_15); 691 &Xupdate(\&body_00_15); 692$code.=<<___; 693 cmp $t1,#0 // check for K256 terminator 694 ldr $t1,[sp,#0] 695 sub $Xfer,$Xfer,#64 696 bne .L_00_48 697 698 sub $Ktbl,$Ktbl,#256 // rewind $Ktbl 699 cmp $inp,$num 700 mov $Xfer, #64 701 csel $Xfer, $Xfer, xzr, eq 702 sub $inp,$inp,$Xfer // avoid SEGV 703 mov $Xfer,sp 704___ 705 &Xpreload(\&body_00_15); 706 &Xpreload(\&body_00_15); 707 &Xpreload(\&body_00_15); 708 &Xpreload(\&body_00_15); 709$code.=<<___; 710 add $A,$A,$t4 // h+=Sigma0(a) from the past 711 ldp $t0,$t1,[$ctx,#0] 712 add $A,$A,$t2 // h+=Maj(a,b,c) from the past 713 ldp $t2,$t3,[$ctx,#8] 714 add $A,$A,$t0 // accumulate 715 add $B,$B,$t1 716 ldp $t0,$t1,[$ctx,#16] 717 add $C,$C,$t2 718 add $D,$D,$t3 719 ldp $t2,$t3,[$ctx,#24] 720 add $E,$E,$t0 721 add $F,$F,$t1 722 ldr $t1,[sp,#0] 723 stp $A,$B,[$ctx,#0] 724 add $G,$G,$t2 725 mov $t2,wzr 726 stp $C,$D,[$ctx,#8] 727 add $H,$H,$t3 728 stp $E,$F,[$ctx,#16] 729 eor $t3,$B,$C 730 stp $G,$H,[$ctx,#24] 731 mov $t4,wzr 732 mov $Xfer,sp 733 b.ne .L_00_48 734 735 ldr x29,[x29] 736 add sp,sp,#16*4+16 737 ret 738.size sha256_block_neon,.-sha256_block_neon 739___ 740} 741 742$code.=<<___; 743#ifndef __KERNEL__ 744.comm OPENSSL_armcap_P,4,4 745#endif 746___ 747 748{ my %opcode = ( 749 "sha256h" => 0x5e004000, "sha256h2" => 0x5e005000, 750 "sha256su0" => 0x5e282800, "sha256su1" => 0x5e006000 ); 751 752 sub unsha256 { 753 my ($mnemonic,$arg)=@_; 754 755 $arg =~ m/[qv]([0-9]+)[^,]*,\s*[qv]([0-9]+)[^,]*(?:,\s*[qv]([0-9]+))?/o 756 && 757 sprintf ".inst\t0x%08x\t//%s %s", 758 $opcode{$mnemonic}|$1|($2<<5)|($3<<16), 759 $mnemonic,$arg; 760 } 761} 762 763open SELF,$0; 764while(<SELF>) { 765 next if (/^#!/); 766 last if (!s/^#/\/\// and !/^$/); 767 print; 768} 769close SELF; 770 771foreach(split("\n",$code)) { 772 773 s/\`([^\`]*)\`/eval($1)/ge; 774 775 s/\b(sha256\w+)\s+([qv].*)/unsha256($1,$2)/ge; 776 777 s/\bq([0-9]+)\b/v$1.16b/g; # old->new registers 778 779 s/\.[ui]?8(\s)/$1/; 780 s/\.\w?32\b// and s/\.16b/\.4s/g; 781 m/(ld|st)1[^\[]+\[0\]/ and s/\.4s/\.s/g; 782 783 print $_,"\n"; 784} 785 786close STDOUT; 787