148dea9a7SNobuhiro Iwamatsu// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 248dea9a7SNobuhiro Iwamatsu/* 348dea9a7SNobuhiro Iwamatsu * Device Tree File for TMPV7708 RM main board 448dea9a7SNobuhiro Iwamatsu * 548dea9a7SNobuhiro Iwamatsu * (C) Copyright 2020, Toshiba Corporation. 648dea9a7SNobuhiro Iwamatsu * (C) Copyright 2020, Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> 748dea9a7SNobuhiro Iwamatsu */ 848dea9a7SNobuhiro Iwamatsu 948dea9a7SNobuhiro Iwamatsu/dts-v1/; 1048dea9a7SNobuhiro Iwamatsu 1148dea9a7SNobuhiro Iwamatsu#include "tmpv7708.dtsi" 1248dea9a7SNobuhiro Iwamatsu 1348dea9a7SNobuhiro Iwamatsu/ { 1448dea9a7SNobuhiro Iwamatsu model = "Toshiba TMPV7708 RM main board"; 1548dea9a7SNobuhiro Iwamatsu compatible = "toshiba,tmpv7708-rm-mbrc", "toshiba,tmpv7708"; 1648dea9a7SNobuhiro Iwamatsu 1748dea9a7SNobuhiro Iwamatsu aliases { 1848dea9a7SNobuhiro Iwamatsu serial0 = &uart0; 1948dea9a7SNobuhiro Iwamatsu serial1 = &uart1; 2048dea9a7SNobuhiro Iwamatsu }; 2148dea9a7SNobuhiro Iwamatsu 2248dea9a7SNobuhiro Iwamatsu chosen { 2348dea9a7SNobuhiro Iwamatsu stdout-path = "serial0:115200n8"; 2448dea9a7SNobuhiro Iwamatsu }; 2548dea9a7SNobuhiro Iwamatsu 2648dea9a7SNobuhiro Iwamatsu /* 768MB memory */ 2748dea9a7SNobuhiro Iwamatsu memory@80000000 { 2848dea9a7SNobuhiro Iwamatsu device_type = "memory"; 2948dea9a7SNobuhiro Iwamatsu reg = <0x0 0x80000000 0x0 0x30000000>; 3048dea9a7SNobuhiro Iwamatsu }; 3148dea9a7SNobuhiro Iwamatsu}; 3248dea9a7SNobuhiro Iwamatsu 3348dea9a7SNobuhiro Iwamatsu&uart0 { 3448dea9a7SNobuhiro Iwamatsu status = "okay"; 3548dea9a7SNobuhiro Iwamatsu clocks = <&uart_clk>; 3648dea9a7SNobuhiro Iwamatsu clock-names = "apb_pclk"; 3748dea9a7SNobuhiro Iwamatsu}; 3848dea9a7SNobuhiro Iwamatsu 3948dea9a7SNobuhiro Iwamatsu&uart1 { 4048dea9a7SNobuhiro Iwamatsu status = "okay"; 4148dea9a7SNobuhiro Iwamatsu clocks = <&uart_clk>; 4248dea9a7SNobuhiro Iwamatsu clock-names = "apb_pclk"; 4348dea9a7SNobuhiro Iwamatsu}; 44ec8a42e7SNobuhiro Iwamatsu 45ec8a42e7SNobuhiro Iwamatsu&piether { 46ec8a42e7SNobuhiro Iwamatsu status = "okay"; 47ec8a42e7SNobuhiro Iwamatsu phy-handle = <&phy0>; 48ec8a42e7SNobuhiro Iwamatsu phy-mode = "rgmii-id"; 49ec8a42e7SNobuhiro Iwamatsu clocks = <&clk300mhz>, <&clk125mhz>; 50ec8a42e7SNobuhiro Iwamatsu clock-names = "stmmaceth", "phy_ref_clk"; 51ec8a42e7SNobuhiro Iwamatsu 52ec8a42e7SNobuhiro Iwamatsu mdio0 { 53ec8a42e7SNobuhiro Iwamatsu #address-cells = <1>; 54ec8a42e7SNobuhiro Iwamatsu #size-cells = <0>; 55ec8a42e7SNobuhiro Iwamatsu compatible = "snps,dwmac-mdio"; 56ec8a42e7SNobuhiro Iwamatsu phy0: ethernet-phy@1 { 57ec8a42e7SNobuhiro Iwamatsu device_type = "ethernet-phy"; 58ec8a42e7SNobuhiro Iwamatsu reg = <0x1>; 59ec8a42e7SNobuhiro Iwamatsu }; 60ec8a42e7SNobuhiro Iwamatsu }; 61ec8a42e7SNobuhiro Iwamatsu}; 6282851fceSLinus Torvalds 634fd18fc3SNobuhiro Iwamatsu&wdt { 644fd18fc3SNobuhiro Iwamatsu status = "okay"; 654fd18fc3SNobuhiro Iwamatsu clocks = <&wdt_clk>; 664fd18fc3SNobuhiro Iwamatsu}; 670109a175SNobuhiro Iwamatsu 680109a175SNobuhiro Iwamatsu&gpio { 690109a175SNobuhiro Iwamatsu status = "okay"; 700109a175SNobuhiro Iwamatsu}; 71172cdcaeSNobuhiro Iwamatsu 72172cdcaeSNobuhiro Iwamatsu&pwm_mux { 73172cdcaeSNobuhiro Iwamatsu groups = "pwm0_gpio16_grp", "pwm1_gpio17_grp", "pwm2_gpio18_grp", "pwm3_gpio19_grp"; 74172cdcaeSNobuhiro Iwamatsu}; 75172cdcaeSNobuhiro Iwamatsu 76172cdcaeSNobuhiro Iwamatsu&pwm { 77172cdcaeSNobuhiro Iwamatsu status = "okay"; 78172cdcaeSNobuhiro Iwamatsu}; 79*6beeaf48SNobuhiro Iwamatsu 80*6beeaf48SNobuhiro Iwamatsu&pcie { 81*6beeaf48SNobuhiro Iwamatsu status = "okay"; 82*6beeaf48SNobuhiro Iwamatsu clocks = <&extclk100mhz>, <&clk600mhz>, <&clk25mhz>; 83*6beeaf48SNobuhiro Iwamatsu clock-names = "ref", "core", "aux"; 84*6beeaf48SNobuhiro Iwamatsu}; 85