1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for J721E SoC Family Main Domain peripherals 4 * 5 * Copyright (C) 2016-2019 Texas Instruments Incorporated - http://www.ti.com/ 6 */ 7 8&cbass_main { 9 msmc_ram: sram@70000000 { 10 compatible = "mmio-sram"; 11 reg = <0x0 0x70000000 0x0 0x800000>; 12 #address-cells = <1>; 13 #size-cells = <1>; 14 ranges = <0x0 0x0 0x70000000 0x800000>; 15 16 atf-sram@0 { 17 reg = <0x0 0x20000>; 18 }; 19 }; 20 21 gic500: interrupt-controller@1800000 { 22 compatible = "arm,gic-v3"; 23 #address-cells = <2>; 24 #size-cells = <2>; 25 ranges; 26 #interrupt-cells = <3>; 27 interrupt-controller; 28 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */ 29 <0x00 0x01900000 0x00 0x100000>; /* GICR */ 30 31 /* vcpumntirq: virtual CPU interface maintenance interrupt */ 32 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 33 34 gic_its: gic-its@18200000 { 35 compatible = "arm,gic-v3-its"; 36 reg = <0x00 0x01820000 0x00 0x10000>; 37 socionext,synquacer-pre-its = <0x1000000 0x400000>; 38 msi-controller; 39 #msi-cells = <1>; 40 }; 41 }; 42 43 smmu0: smmu@36600000 { 44 compatible = "arm,smmu-v3"; 45 reg = <0x0 0x36600000 0x0 0x100000>; 46 interrupt-parent = <&gic500>; 47 interrupts = <GIC_SPI 772 IRQ_TYPE_EDGE_RISING>, 48 <GIC_SPI 768 IRQ_TYPE_EDGE_RISING>; 49 interrupt-names = "eventq", "gerror"; 50 #iommu-cells = <1>; 51 }; 52 53 main_gpio_intr: interrupt-controller0 { 54 compatible = "ti,sci-intr"; 55 ti,intr-trigger-type = <1>; 56 interrupt-controller; 57 interrupt-parent = <&gic500>; 58 #interrupt-cells = <2>; 59 ti,sci = <&dmsc>; 60 ti,sci-dst-id = <14>; 61 ti,sci-rm-range-girq = <0x1>; 62 }; 63 64 cbass_main_navss: interconnect0 { 65 compatible = "simple-bus"; 66 #address-cells = <2>; 67 #size-cells = <2>; 68 ranges; 69 70 main_navss_intr: interrupt-controller1 { 71 compatible = "ti,sci-intr"; 72 ti,intr-trigger-type = <4>; 73 interrupt-controller; 74 interrupt-parent = <&gic500>; 75 #interrupt-cells = <2>; 76 ti,sci = <&dmsc>; 77 ti,sci-dst-id = <14>; 78 ti,sci-rm-range-girq = <0>, <2>; 79 }; 80 81 main_udmass_inta: interrupt-controller@33d00000 { 82 compatible = "ti,sci-inta"; 83 reg = <0x0 0x33d00000 0x0 0x100000>; 84 interrupt-controller; 85 interrupt-parent = <&main_navss_intr>; 86 msi-controller; 87 ti,sci = <&dmsc>; 88 ti,sci-dev-id = <209>; 89 ti,sci-rm-range-vint = <0xa>; 90 ti,sci-rm-range-global-event = <0xd>; 91 }; 92 }; 93 94 secure_proxy_main: mailbox@32c00000 { 95 compatible = "ti,am654-secure-proxy"; 96 #mbox-cells = <1>; 97 reg-names = "target_data", "rt", "scfg"; 98 reg = <0x00 0x32c00000 0x00 0x100000>, 99 <0x00 0x32400000 0x00 0x100000>, 100 <0x00 0x32800000 0x00 0x100000>; 101 interrupt-names = "rx_011"; 102 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 103 }; 104 105 main_pmx0: pinmux@11c000 { 106 compatible = "pinctrl-single"; 107 /* Proxy 0 addressing */ 108 reg = <0x0 0x11c000 0x0 0x2b4>; 109 #pinctrl-cells = <1>; 110 pinctrl-single,register-width = <32>; 111 pinctrl-single,function-mask = <0xffffffff>; 112 }; 113 114 main_uart0: serial@2800000 { 115 compatible = "ti,j721e-uart", "ti,am654-uart"; 116 reg = <0x00 0x02800000 0x00 0x100>; 117 reg-shift = <2>; 118 reg-io-width = <4>; 119 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; 120 clock-frequency = <48000000>; 121 current-speed = <115200>; 122 power-domains = <&k3_pds 146>; 123 clocks = <&k3_clks 146 0>; 124 clock-names = "fclk"; 125 }; 126 127 main_uart1: serial@2810000 { 128 compatible = "ti,j721e-uart", "ti,am654-uart"; 129 reg = <0x00 0x02810000 0x00 0x100>; 130 reg-shift = <2>; 131 reg-io-width = <4>; 132 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; 133 clock-frequency = <48000000>; 134 current-speed = <115200>; 135 power-domains = <&k3_pds 278>; 136 clocks = <&k3_clks 278 0>; 137 clock-names = "fclk"; 138 }; 139 140 main_uart2: serial@2820000 { 141 compatible = "ti,j721e-uart", "ti,am654-uart"; 142 reg = <0x00 0x02820000 0x00 0x100>; 143 reg-shift = <2>; 144 reg-io-width = <4>; 145 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>; 146 clock-frequency = <48000000>; 147 current-speed = <115200>; 148 power-domains = <&k3_pds 279>; 149 clocks = <&k3_clks 279 0>; 150 clock-names = "fclk"; 151 }; 152 153 main_uart3: serial@2830000 { 154 compatible = "ti,j721e-uart", "ti,am654-uart"; 155 reg = <0x00 0x02830000 0x00 0x100>; 156 reg-shift = <2>; 157 reg-io-width = <4>; 158 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>; 159 clock-frequency = <48000000>; 160 current-speed = <115200>; 161 power-domains = <&k3_pds 280>; 162 clocks = <&k3_clks 280 0>; 163 clock-names = "fclk"; 164 }; 165 166 main_uart4: serial@2840000 { 167 compatible = "ti,j721e-uart", "ti,am654-uart"; 168 reg = <0x00 0x02840000 0x00 0x100>; 169 reg-shift = <2>; 170 reg-io-width = <4>; 171 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>; 172 clock-frequency = <48000000>; 173 current-speed = <115200>; 174 power-domains = <&k3_pds 281>; 175 clocks = <&k3_clks 281 0>; 176 clock-names = "fclk"; 177 }; 178 179 main_uart5: serial@2850000 { 180 compatible = "ti,j721e-uart", "ti,am654-uart"; 181 reg = <0x00 0x02850000 0x00 0x100>; 182 reg-shift = <2>; 183 reg-io-width = <4>; 184 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 185 clock-frequency = <48000000>; 186 current-speed = <115200>; 187 power-domains = <&k3_pds 282>; 188 clocks = <&k3_clks 282 0>; 189 clock-names = "fclk"; 190 }; 191 192 main_uart6: serial@2860000 { 193 compatible = "ti,j721e-uart", "ti,am654-uart"; 194 reg = <0x00 0x02860000 0x00 0x100>; 195 reg-shift = <2>; 196 reg-io-width = <4>; 197 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>; 198 clock-frequency = <48000000>; 199 current-speed = <115200>; 200 power-domains = <&k3_pds 283>; 201 clocks = <&k3_clks 283 0>; 202 clock-names = "fclk"; 203 }; 204 205 main_uart7: serial@2870000 { 206 compatible = "ti,j721e-uart", "ti,am654-uart"; 207 reg = <0x00 0x02870000 0x00 0x100>; 208 reg-shift = <2>; 209 reg-io-width = <4>; 210 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; 211 clock-frequency = <48000000>; 212 current-speed = <115200>; 213 power-domains = <&k3_pds 284>; 214 clocks = <&k3_clks 284 0>; 215 clock-names = "fclk"; 216 }; 217 218 main_uart8: serial@2880000 { 219 compatible = "ti,j721e-uart", "ti,am654-uart"; 220 reg = <0x00 0x02880000 0x00 0x100>; 221 reg-shift = <2>; 222 reg-io-width = <4>; 223 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; 224 clock-frequency = <48000000>; 225 current-speed = <115200>; 226 power-domains = <&k3_pds 285>; 227 clocks = <&k3_clks 285 0>; 228 clock-names = "fclk"; 229 }; 230 231 main_uart9: serial@2890000 { 232 compatible = "ti,j721e-uart", "ti,am654-uart"; 233 reg = <0x00 0x02890000 0x00 0x100>; 234 reg-shift = <2>; 235 reg-io-width = <4>; 236 interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; 237 clock-frequency = <48000000>; 238 current-speed = <115200>; 239 power-domains = <&k3_pds 286>; 240 clocks = <&k3_clks 286 0>; 241 clock-names = "fclk"; 242 }; 243}; 244