1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ 4 */ 5 6/dts-v1/; 7 8#include "k3-j721e-som-p0.dtsi" 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/input/input.h> 11#include <dt-bindings/net/ti-dp83867.h> 12 13/ { 14 chosen { 15 stdout-path = "serial2:115200n8"; 16 bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000"; 17 }; 18 19 gpio_keys: gpio-keys { 20 compatible = "gpio-keys"; 21 autorepeat; 22 pinctrl-names = "default"; 23 pinctrl-0 = <&sw10_button_pins_default &sw11_button_pins_default>; 24 25 sw10: sw10 { 26 label = "GPIO Key USER1"; 27 linux,code = <BTN_0>; 28 gpios = <&main_gpio0 0 GPIO_ACTIVE_LOW>; 29 }; 30 31 sw11: sw11 { 32 label = "GPIO Key USER2"; 33 linux,code = <BTN_1>; 34 gpios = <&wkup_gpio0 7 GPIO_ACTIVE_LOW>; 35 }; 36 }; 37}; 38 39&main_pmx0 { 40 sw10_button_pins_default: sw10_button_pins_default { 41 pinctrl-single,pins = < 42 J721E_IOPAD(0x0, PIN_INPUT, 7) /* (AC18) EXTINTn.GPIO0_0 */ 43 >; 44 }; 45 46 main_mmc1_pins_default: main_mmc1_pins_default { 47 pinctrl-single,pins = < 48 J721E_IOPAD(0x254, PIN_INPUT, 0) /* (R29) MMC1_CMD */ 49 J721E_IOPAD(0x250, PIN_INPUT, 0) /* (P25) MMC1_CLK */ 50 J721E_IOPAD(0x2ac, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */ 51 J721E_IOPAD(0x24c, PIN_INPUT, 0) /* (R24) MMC1_DAT0 */ 52 J721E_IOPAD(0x248, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */ 53 J721E_IOPAD(0x244, PIN_INPUT, 0) /* (R25) MMC1_DAT2 */ 54 J721E_IOPAD(0x240, PIN_INPUT, 0) /* (R26) MMC1_DAT3 */ 55 J721E_IOPAD(0x258, PIN_INPUT, 0) /* (P23) MMC1_SDCD */ 56 J721E_IOPAD(0x25c, PIN_INPUT, 0) /* (R28) MMC1_SDWP */ 57 >; 58 }; 59 60 main_usbss0_pins_default: main_usbss0_pins_default { 61 pinctrl-single,pins = < 62 J721E_IOPAD(0x290, PIN_OUTPUT, 0) /* (U6) USB0_DRVVBUS */ 63 >; 64 }; 65 66 main_usbss1_pins_default: main_usbss1_pins_default { 67 pinctrl-single,pins = < 68 J721E_IOPAD(0x214, PIN_OUTPUT, 4) /* (V4) MCAN1_TX.USB1_DRVVBUS */ 69 >; 70 }; 71 72 main_i2c1_exp4_pins_default: main-i2c1-exp4-pins-default { 73 pinctrl-single,pins = < 74 J721E_IOPAD(0x230, PIN_INPUT, 7) /* (U2) ECAP0_IN_APWM_OUT.GPIO1_11 */ 75 >; 76 }; 77 78 main_i2c0_pins_default: main-i2c0-pins-default { 79 pinctrl-single,pins = < 80 J721E_IOPAD(0x220, PIN_INPUT_PULLUP, 0) /* (AC5) I2C0_SCL */ 81 J721E_IOPAD(0x224, PIN_INPUT_PULLUP, 0) /* (AA5) I2C0_SDA */ 82 >; 83 }; 84 85 main_i2c1_pins_default: main-i2c1-pins-default { 86 pinctrl-single,pins = < 87 J721E_IOPAD(0x228, PIN_INPUT_PULLUP, 0) /* (Y6) I2C1_SCL */ 88 J721E_IOPAD(0x22c, PIN_INPUT_PULLUP, 0) /* (AA6) I2C1_SDA */ 89 >; 90 }; 91 92 main_i2c3_pins_default: main-i2c3-pins-default { 93 pinctrl-single,pins = < 94 J721E_IOPAD(0x270, PIN_INPUT_PULLUP, 4) /* (T26) MMC2_CLK.I2C3_SCL */ 95 J721E_IOPAD(0x274, PIN_INPUT_PULLUP, 4) /* (T25) MMC2_CMD.I2C3_SDA */ 96 >; 97 }; 98 99 main_i2c6_pins_default: main-i2c6-pins-default { 100 pinctrl-single,pins = < 101 J721E_IOPAD(0x1d0, PIN_INPUT_PULLUP, 2) /* (AA3) SPI0_D1.I2C6_SCL */ 102 J721E_IOPAD(0x1e4, PIN_INPUT_PULLUP, 2) /* (Y2) SPI1_D1.I2C6_SDA */ 103 >; 104 }; 105 106 main_i2c1_exp4_pins_default: main-i2c1-exp4-pins-default { 107 pinctrl-single,pins = < 108 J721E_IOPAD(0x230, PIN_INPUT, 7) /* (U2) ECAP0_IN_APWM_OUT.GPIO1_11 */ 109 >; 110 }; 111}; 112 113&wkup_pmx0 { 114 sw11_button_pins_default: sw11_button_pins_default { 115 pinctrl-single,pins = < 116 J721E_WKUP_IOPAD(0xcc, PIN_INPUT, 7) /* (G28) WKUP_GPIO0_7 */ 117 >; 118 }; 119 120 mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default { 121 pinctrl-single,pins = < 122 J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */ 123 J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */ 124 J721E_WKUP_IOPAD(0x40, PIN_INPUT, 0) /* (D22) MCU_OSPI1_D0 */ 125 J721E_WKUP_IOPAD(0x44, PIN_INPUT, 0) /* (G22) MCU_OSPI1_D1 */ 126 J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (D23) MCU_OSPI1_D2 */ 127 J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23) MCU_OSPI1_D3 */ 128 J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23) MCU_OSPI1_DQS */ 129 J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */ 130 >; 131 }; 132 133 mcu_cpsw_pins_default: mcu_cpsw_pins_default { 134 pinctrl-single,pins = < 135 J721E_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */ 136 J721E_WKUP_IOPAD(0x005c, PIN_INPUT, 0) /* MCU_RGMII1_RX_CTL */ 137 J721E_WKUP_IOPAD(0x0060, PIN_OUTPUT, 0) /* MCU_RGMII1_TD3 */ 138 J721E_WKUP_IOPAD(0x0064, PIN_OUTPUT, 0) /* MCU_RGMII1_TD2 */ 139 J721E_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* MCU_RGMII1_TD1 */ 140 J721E_WKUP_IOPAD(0x006c, PIN_OUTPUT, 0) /* MCU_RGMII1_TD0 */ 141 J721E_WKUP_IOPAD(0x0078, PIN_INPUT, 0) /* MCU_RGMII1_RD3 */ 142 J721E_WKUP_IOPAD(0x007c, PIN_INPUT, 0) /* MCU_RGMII1_RD2 */ 143 J721E_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* MCU_RGMII1_RD1 */ 144 J721E_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* MCU_RGMII1_RD0 */ 145 J721E_WKUP_IOPAD(0x0070, PIN_INPUT, 0) /* MCU_RGMII1_TXC */ 146 J721E_WKUP_IOPAD(0x0074, PIN_INPUT, 0) /* MCU_RGMII1_RXC */ 147 >; 148 }; 149 150 mcu_mdio_pins_default: mcu_mdio1_pins_default { 151 pinctrl-single,pins = < 152 J721E_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* MCU_MDIO0_MDC */ 153 J721E_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* MCU_MDIO0_MDIO */ 154 >; 155 }; 156}; 157 158&wkup_uart0 { 159 /* Wakeup UART is used by System firmware */ 160 status = "disabled"; 161}; 162 163&main_uart0 { 164 power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>; 165}; 166 167&main_uart3 { 168 /* UART not brought out */ 169 status = "disabled"; 170}; 171 172&main_uart5 { 173 /* UART not brought out */ 174 status = "disabled"; 175}; 176 177&main_uart6 { 178 /* UART not brought out */ 179 status = "disabled"; 180}; 181 182&main_uart7 { 183 /* UART not brought out */ 184 status = "disabled"; 185}; 186 187&main_uart8 { 188 /* UART not brought out */ 189 status = "disabled"; 190}; 191 192&main_uart9 { 193 /* UART not brought out */ 194 status = "disabled"; 195}; 196 197&main_gpio2 { 198 status = "disabled"; 199}; 200 201&main_gpio3 { 202 status = "disabled"; 203}; 204 205&main_gpio4 { 206 status = "disabled"; 207}; 208 209&main_gpio5 { 210 status = "disabled"; 211}; 212 213&main_gpio6 { 214 status = "disabled"; 215}; 216 217&main_gpio7 { 218 status = "disabled"; 219}; 220 221&wkup_gpio1 { 222 status = "disabled"; 223}; 224 225&mailbox0_cluster0 { 226 interrupts = <214 0>; 227 228 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 { 229 ti,mbox-rx = <0 0 0>; 230 ti,mbox-tx = <1 0 0>; 231 }; 232 233 mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 { 234 ti,mbox-rx = <2 0 0>; 235 ti,mbox-tx = <3 0 0>; 236 }; 237}; 238 239&mailbox0_cluster1 { 240 interrupts = <215 0>; 241 242 mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 { 243 ti,mbox-rx = <0 0 0>; 244 ti,mbox-tx = <1 0 0>; 245 }; 246 247 mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 { 248 ti,mbox-rx = <2 0 0>; 249 ti,mbox-tx = <3 0 0>; 250 }; 251}; 252 253&mailbox0_cluster2 { 254 interrupts = <216 0>; 255 256 mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 { 257 ti,mbox-rx = <0 0 0>; 258 ti,mbox-tx = <1 0 0>; 259 }; 260 261 mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 { 262 ti,mbox-rx = <2 0 0>; 263 ti,mbox-tx = <3 0 0>; 264 }; 265}; 266 267&mailbox0_cluster3 { 268 interrupts = <217 0>; 269 270 mbox_c66_0: mbox-c66-0 { 271 ti,mbox-rx = <0 0 0>; 272 ti,mbox-tx = <1 0 0>; 273 }; 274 275 mbox_c66_1: mbox-c66-1 { 276 ti,mbox-rx = <2 0 0>; 277 ti,mbox-tx = <3 0 0>; 278 }; 279}; 280 281&mailbox0_cluster4 { 282 interrupts = <218 0>; 283 284 mbox_c71_0: mbox-c71-0 { 285 ti,mbox-rx = <0 0 0>; 286 ti,mbox-tx = <1 0 0>; 287 }; 288}; 289 290&mailbox0_cluster5 { 291 status = "disabled"; 292}; 293 294&mailbox0_cluster6 { 295 status = "disabled"; 296}; 297 298&mailbox0_cluster7 { 299 status = "disabled"; 300}; 301 302&mailbox0_cluster8 { 303 status = "disabled"; 304}; 305 306&mailbox0_cluster9 { 307 status = "disabled"; 308}; 309 310&mailbox0_cluster10 { 311 status = "disabled"; 312}; 313 314&mailbox0_cluster11 { 315 status = "disabled"; 316}; 317 318&main_sdhci0 { 319 /* eMMC */ 320 non-removable; 321 ti,driver-strength-ohm = <50>; 322 disable-wp; 323}; 324 325&main_sdhci1 { 326 /* SD/MMC */ 327 pinctrl-names = "default"; 328 pinctrl-0 = <&main_mmc1_pins_default>; 329 ti,driver-strength-ohm = <50>; 330 disable-wp; 331}; 332 333&main_sdhci2 { 334 /* Unused */ 335 status = "disabled"; 336}; 337 338&usbss0 { 339 pinctrl-names = "default"; 340 pinctrl-0 = <&main_usbss0_pins_default>; 341 ti,usb2-only; 342 ti,vbus-divider; 343}; 344 345&usb0 { 346 dr_mode = "otg"; 347 maximum-speed = "high-speed"; 348}; 349 350&usbss1 { 351 pinctrl-names = "default"; 352 pinctrl-0 = <&main_usbss1_pins_default>; 353 ti,usb2-only; 354}; 355 356&usb1 { 357 dr_mode = "host"; 358 maximum-speed = "high-speed"; 359}; 360 361&ospi1 { 362 pinctrl-names = "default"; 363 pinctrl-0 = <&mcu_fss0_ospi1_pins_default>; 364 365 flash@0{ 366 compatible = "jedec,spi-nor"; 367 reg = <0x0>; 368 spi-tx-bus-width = <1>; 369 spi-rx-bus-width = <4>; 370 spi-max-frequency = <40000000>; 371 cdns,tshsl-ns = <60>; 372 cdns,tsd2d-ns = <60>; 373 cdns,tchsh-ns = <60>; 374 cdns,tslch-ns = <60>; 375 cdns,read-delay = <2>; 376 #address-cells = <1>; 377 #size-cells = <1>; 378 }; 379}; 380 381&tscadc0 { 382 adc { 383 ti,adc-channels = <0 1 2 3 4 5 6 7>; 384 }; 385}; 386 387&tscadc1 { 388 adc { 389 ti,adc-channels = <0 1 2 3 4 5 6 7>; 390 }; 391}; 392 393&main_i2c0 { 394 pinctrl-names = "default"; 395 pinctrl-0 = <&main_i2c0_pins_default>; 396 clock-frequency = <400000>; 397 398 exp1: gpio@20 { 399 compatible = "ti,tca6416"; 400 reg = <0x20>; 401 gpio-controller; 402 #gpio-cells = <2>; 403 }; 404 405 exp2: gpio@22 { 406 compatible = "ti,tca6424"; 407 reg = <0x22>; 408 gpio-controller; 409 #gpio-cells = <2>; 410 }; 411}; 412 413&main_i2c1 { 414 pinctrl-names = "default"; 415 pinctrl-0 = <&main_i2c1_pins_default>; 416 clock-frequency = <400000>; 417 418 exp4: gpio@20 { 419 compatible = "ti,tca6408"; 420 reg = <0x20>; 421 gpio-controller; 422 #gpio-cells = <2>; 423 pinctrl-names = "default"; 424 pinctrl-0 = <&main_i2c1_exp4_pins_default>; 425 interrupt-parent = <&main_gpio1>; 426 interrupts = <11 IRQ_TYPE_EDGE_FALLING>; 427 interrupt-controller; 428 #interrupt-cells = <2>; 429 }; 430}; 431 432&main_i2c3 { 433 pinctrl-names = "default"; 434 pinctrl-0 = <&main_i2c3_pins_default>; 435 clock-frequency = <400000>; 436 437 exp3: gpio@20 { 438 compatible = "ti,tca6408"; 439 reg = <0x20>; 440 gpio-controller; 441 #gpio-cells = <2>; 442 }; 443}; 444 445&main_i2c6 { 446 pinctrl-names = "default"; 447 pinctrl-0 = <&main_i2c6_pins_default>; 448 clock-frequency = <400000>; 449 450 exp5: gpio@20 { 451 compatible = "ti,tca6408"; 452 reg = <0x20>; 453 gpio-controller; 454 #gpio-cells = <2>; 455 }; 456}; 457 458&mcu_cpsw { 459 pinctrl-names = "default"; 460 pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>; 461}; 462 463&davinci_mdio { 464 phy0: ethernet-phy@0 { 465 reg = <0>; 466 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 467 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 468 }; 469}; 470 471&cpsw_port1 { 472 phy-mode = "rgmii-rxid"; 473 phy-handle = <&phy0>; 474}; 475 476&dss { 477 /* 478 * These clock assignments are chosen to enable the following outputs: 479 * 480 * VP0 - DisplayPort SST 481 * VP1 - DPI0 482 * VP2 - DSI 483 * VP3 - DPI1 484 */ 485 486 assigned-clocks = <&k3_clks 152 1>, 487 <&k3_clks 152 4>, 488 <&k3_clks 152 9>, 489 <&k3_clks 152 13>; 490 assigned-clock-parents = <&k3_clks 152 2>, /* PLL16_HSDIV0 */ 491 <&k3_clks 152 6>, /* PLL19_HSDIV0 */ 492 <&k3_clks 152 11>, /* PLL18_HSDIV0 */ 493 <&k3_clks 152 18>; /* PLL23_HSDIV0 */ 494}; 495