xref: /openbmc/linux/arch/arm64/boot/dts/ti/k3-am69-sk.dts (revision e2942062)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
4 *
5 * Design Files: https://www.ti.com/lit/zip/SPRR466
6 * TRM: https://www.ti.com/lit/zip/spruj52
7 */
8
9/dts-v1/;
10
11#include <dt-bindings/net/ti-dp83867.h>
12#include <dt-bindings/gpio/gpio.h>
13#include "k3-j784s4.dtsi"
14
15/ {
16	compatible = "ti,am69-sk", "ti,j784s4";
17	model = "Texas Instruments AM69 SK";
18
19	chosen {
20		stdout-path = "serial2:115200n8";
21	};
22
23	aliases {
24		serial0 = &wkup_uart0;
25		serial1 = &mcu_uart0;
26		serial2 = &main_uart8;
27		mmc0 = &main_sdhci0;
28		mmc1 = &main_sdhci1;
29		i2c0 = &wkup_i2c0;
30		i2c3 = &main_i2c0;
31		ethernet0 = &mcu_cpsw_port1;
32	};
33
34	memory@80000000 {
35		device_type = "memory";
36		/* 32G RAM */
37		reg = <0x00 0x80000000 0x00 0x80000000>,
38		      <0x08 0x80000000 0x07 0x80000000>;
39	};
40
41	reserved_memory: reserved-memory {
42		#address-cells = <2>;
43		#size-cells = <2>;
44		ranges;
45
46		secure_ddr: optee@9e800000 {
47			reg = <0x00 0x9e800000 0x00 0x01800000>;
48			no-map;
49		};
50	};
51
52	vusb_main: regulator-vusb-main5v0 {
53		/* USB MAIN INPUT 5V DC */
54		compatible = "regulator-fixed";
55		regulator-name = "vusb-main5v0";
56		regulator-min-microvolt = <5000000>;
57		regulator-max-microvolt = <5000000>;
58		regulator-always-on;
59		regulator-boot-on;
60	};
61
62	vsys_5v0: regulator-vsys5v0 {
63		/* Output of LM61460 */
64		compatible = "regulator-fixed";
65		regulator-name = "vsys_5v0";
66		regulator-min-microvolt = <5000000>;
67		regulator-max-microvolt = <5000000>;
68		vin-supply = <&vusb_main>;
69		regulator-always-on;
70		regulator-boot-on;
71	};
72
73	vsys_3v3: regulator-vsys3v3 {
74		/* Output of LM5143 */
75		compatible = "regulator-fixed";
76		regulator-name = "vsys_3v3";
77		regulator-min-microvolt = <3300000>;
78		regulator-max-microvolt = <3300000>;
79		vin-supply = <&vusb_main>;
80		regulator-always-on;
81		regulator-boot-on;
82	};
83
84	vdd_mmc1: regulator-sd {
85		/* Output of TPS22918 */
86		compatible = "regulator-fixed";
87		regulator-name = "vdd_mmc1";
88		regulator-min-microvolt = <3300000>;
89		regulator-max-microvolt = <3300000>;
90		regulator-boot-on;
91		enable-active-high;
92		vin-supply = <&vsys_3v3>;
93		gpio = <&exp1 2 GPIO_ACTIVE_HIGH>;
94	};
95
96	vdd_sd_dv: regulator-tlv71033 {
97		/* Output of TLV71033 */
98		compatible = "regulator-gpio";
99		regulator-name = "tlv71033";
100		pinctrl-names = "default";
101		pinctrl-0 = <&vdd_sd_dv_pins_default>;
102		regulator-min-microvolt = <1800000>;
103		regulator-max-microvolt = <3300000>;
104		regulator-boot-on;
105		vin-supply = <&vsys_5v0>;
106		gpios = <&main_gpio0 49 GPIO_ACTIVE_HIGH>;
107		states = <1800000 0x0>,
108			 <3300000 0x1>;
109	};
110};
111
112&main_pmx0 {
113	main_uart8_pins_default: main-uart8-default-pins {
114		pinctrl-single,pins = <
115			J784S4_IOPAD(0x0d0, PIN_INPUT, 11) /* (AP38) SPI0_CS1.UART8_RXD */
116			J784S4_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AN38) SPI0_CLK.UART8_TXD */
117		>;
118	};
119
120	main_i2c0_pins_default: main-i2c0-default-pins {
121		pinctrl-single,pins = <
122			J784S4_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AN36) I2C0_SCL */
123			J784S4_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AP37) I2C0_SDA */
124		>;
125	};
126
127	main_mmc1_pins_default: main-mmc1-default-pins {
128		pinctrl-single,pins = <
129			J784S4_IOPAD(0x104, PIN_INPUT, 0) /* (AB38) MMC1_CLK */
130			J784S4_IOPAD(0x108, PIN_INPUT, 0) /* (AB36) MMC1_CMD */
131			J784S4_IOPAD(0x100, PIN_INPUT, 0) /* (No Pin) MMC1_CLKLB */
132			J784S4_IOPAD(0x0fc, PIN_INPUT, 0) /* (AA33) MMC1_DAT0 */
133			J784S4_IOPAD(0x0f8, PIN_INPUT, 0) /* (AB34) MMC1_DAT1 */
134			J784S4_IOPAD(0x0f4, PIN_INPUT, 0) /* (AA32) MMC1_DAT2 */
135			J784S4_IOPAD(0x0f0, PIN_INPUT, 0) /* (AC38) MMC1_DAT3 */
136			J784S4_IOPAD(0x0e8, PIN_INPUT, 8) /* (AR38) TIMER_IO0.MMC1_SDCD */
137		>;
138	};
139
140	vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
141		pinctrl-single,pins = <
142			J784S4_IOPAD(0x0C4, PIN_INPUT, 7) /* (AD36) ECAP0_IN_APWM_OUT.GPIO0_49 */
143		>;
144	};
145
146	rpi_header_gpio0_pins_default: rpi-header-gpio0-default-pins {
147		pinctrl-single,pins = <
148			J784S4_IOPAD(0x0BC, PIN_INPUT, 7) /* (AD33) MCASP1_AFSX.GPIO0_47 */
149			J784S4_IOPAD(0x06C, PIN_INPUT, 7) /* (AJ37) MCASP4_AFSX.GPIO0_27 */
150			J784S4_IOPAD(0x0B4, PIN_INPUT, 7) /* (AL34) MCASP1_AXR4.GPIO0_45 */
151			J784S4_IOPAD(0x0C0, PIN_INPUT, 7) /* (AD38) MCASP1_AXR0.GPIO0_48 */
152			J784S4_IOPAD(0x00C, PIN_INPUT, 7) /* (AF33) MCAN13_TX.GPIO0_3 */
153			J784S4_IOPAD(0x0B8, PIN_INPUT, 7) /* (AC34) MCASP1_ACLKX.GPIO0_46 */
154			J784S4_IOPAD(0x090, PIN_INPUT, 7) /* (AC35) MCASP0_AXR8.GPIO0_36 */
155			J784S4_IOPAD(0x0A8, PIN_INPUT, 7) /* (AF34) MCASP0_AXR14.GPIO0_42 */
156			J784S4_IOPAD(0x0A4, PIN_INPUT, 7) /* (AJ36) MCASP0_AXR13.GPIO0_41 */
157			J784S4_IOPAD(0x034, PIN_INPUT, 7) /* (AJ34) PMIC_WAKE0n.GPIO0_13 */
158			J784S4_IOPAD(0x0CC, PIN_INPUT, 7) /* (AM37) SPI0_CS0.GPIO0_51 */
159			J784S4_IOPAD(0x08C, PIN_INPUT, 7) /* (AE35) MCASP0_AXR7.GPIO0_35 */
160			J784S4_IOPAD(0x008, PIN_INPUT, 7) /* (AJ33) MCAN12_RX.GPIO0_2 */
161			J784S4_IOPAD(0x004, PIN_INPUT, 7) /* (AG36) MCAN12_TX.GPIO0_1 */
162		>;
163	};
164};
165
166&wkup_pmx2 {
167	wkup_uart0_pins_default: wkup-uart0-default-pins {
168		pinctrl-single,pins = <
169			J721S2_WKUP_IOPAD(0x070, PIN_INPUT, 0) /* (L37) WKUP_GPIO0_6.WKUP_UART0_CTSn */
170			J721S2_WKUP_IOPAD(0x074, PIN_INPUT, 0) /* (L36) WKUP_GPIO0_7.WKUP_UART0_RTSn */
171			J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (K35) WKUP_UART0_RXD */
172			J721S2_WKUP_IOPAD(0x04c, PIN_INPUT, 0) /* (K34) WKUP_UART0_TXD */
173		>;
174	};
175
176	wkup_i2c0_pins_default: wkup-i2c0-default-pins {
177		pinctrl-single,pins = <
178			J721S2_WKUP_IOPAD(0x98, PIN_INPUT, 0) /* (N33) WKUP_I2C0_SCL */
179			J721S2_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */
180		>;
181	};
182
183	mcu_uart0_pins_default: mcu-uart0-default-pins {
184		pinctrl-single,pins = <
185			J784S4_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (K38) WKUP_GPIO0_13.MCU_UART0_RXD */
186			J784S4_WKUP_IOPAD(0x088, PIN_OUTPUT, 0) /* (J37) WKUP_GPIO0_12.MCU_UART0_TXD */
187		>;
188	};
189
190	mcu_i2c0_pins_default: mcu-i2c0-default-pins {
191		pinctrl-single,pins = <
192			J784S4_WKUP_IOPAD(0x0a0, PIN_INPUT_PULLUP, 0) /* (M35) MCU_I2C0_SCL */
193			J784S4_WKUP_IOPAD(0x0a4, PIN_INPUT_PULLUP, 0) /* (G34) MCU_I2C0_SDA */
194		>;
195	};
196
197	mcu_cpsw_pins_default: mcu-cpsw-default-pins {
198		pinctrl-single,pins = <
199			J784S4_WKUP_IOPAD(0x02c, PIN_INPUT, 0) /* (A35) MCU_RGMII1_RD0 */
200			J784S4_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (B36) MCU_RGMII1_RD1 */
201			J784S4_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (C36) MCU_RGMII1_RD2 */
202			J784S4_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D36) MCU_RGMII1_RD3 */
203			J784S4_WKUP_IOPAD(0x01c, PIN_INPUT, 0) /* (B37) MCU_RGMII1_RXC */
204			J784S4_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (C37) MCU_RGMII1_RX_CTL */
205			J784S4_WKUP_IOPAD(0x014, PIN_OUTPUT, 0) /* (D37) MCU_RGMII1_TD0 */
206			J784S4_WKUP_IOPAD(0x010, PIN_OUTPUT, 0) /* (D38) MCU_RGMII1_TD1 */
207			J784S4_WKUP_IOPAD(0x00c, PIN_OUTPUT, 0) /* (E37) MCU_RGMII1_TD2 */
208			J784S4_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (E38) MCU_RGMII1_TD3 */
209			J784S4_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (E36) MCU_RGMII1_TXC */
210			J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (C38) MCU_RGMII1_TX_CTL */
211		>;
212	};
213
214	mcu_mdio_pins_default: mcu-mdio-default-pins {
215		pinctrl-single,pins = <
216			J784S4_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A36) MCU_MDIO0_MDC */
217			J784S4_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (B35) MCU_MDIO0_MDIO */
218		>;
219	};
220
221	mcu_rpi_hdr1_gpio0_pins_default: mcu-rpi-hdr1-gpio0-default-pins {
222		pinctrl-single,pins = <
223			J784S4_WKUP_IOPAD(0x118, PIN_INPUT, 7) /* (N34) WKUP_GPIO0_66 */
224			J784S4_WKUP_IOPAD(0x05c, PIN_INPUT, 7) /* (J34) WKUP_GPIO0_1 */
225			J784S4_WKUP_IOPAD(0x060, PIN_INPUT, 7) /* (J35) WKUP_GPIO0_2 */
226			J784S4_WKUP_IOPAD(0x058, PIN_INPUT, 7) /* (H38) WKUP_GPIO0_0 */
227			J784S4_WKUP_IOPAD(0x0b8, PIN_INPUT, 7) /* (M37) WKUP_GPIO0_56 */
228			J784S4_WKUP_IOPAD(0x114, PIN_INPUT, 7) /* (M36) WKUP_GPIO0_57 */
229			J784S4_WKUP_IOPAD(0x094, PIN_INPUT, 7) /* (K37) WKUP_GPIO0_15 */
230			J784S4_WKUP_IOPAD(0x064, PIN_INPUT, 7) /* (J36) WKUP_GPIO0_3 */
231			J784S4_WKUP_IOPAD(0x11c, PIN_INPUT, 7) /* (M34) WKUP_GPIO0_67 */
232		>;
233	};
234};
235
236&wkup_pmx3 {
237	mcu_rpi_hdr2_gpio0_pins_default: mcu-rpi-hdr2-gpio0-default-pins {
238		pinctrl-single,pins = <
239			J784S4_WKUP_IOPAD(0x0, PIN_INPUT, 7) /* (M33) WKUP_GPIO0_49 */
240		>;
241	};
242};
243
244&wkup_uart0 {
245	/* Firmware usage */
246	status = "reserved";
247	pinctrl-names = "default";
248	pinctrl-0 = <&wkup_uart0_pins_default>;
249};
250
251&wkup_i2c0 {
252	status = "okay";
253	pinctrl-names = "default";
254	pinctrl-0 = <&wkup_i2c0_pins_default>;
255	clock-frequency = <400000>;
256
257	eeprom@51 {
258		/* AT24C512C-MAHM-T */
259		compatible = "atmel,24c512";
260		reg = <0x51>;
261	};
262};
263
264&wkup_gpio0 {
265	status = "okay";
266	pinctrl-names = "default";
267	pinctrl-0 = <&mcu_rpi_hdr1_gpio0_pins_default>, <&mcu_rpi_hdr2_gpio0_pins_default>;
268};
269
270&mcu_uart0 {
271	status = "okay";
272	pinctrl-names = "default";
273	pinctrl-0 = <&mcu_uart0_pins_default>;
274};
275
276&mcu_i2c0 {
277	status = "okay";
278	pinctrl-names = "default";
279	pinctrl-0 = <&mcu_i2c0_pins_default>;
280	clock-frequency = <400000>;
281};
282
283&main_uart8 {
284	status = "okay";
285	pinctrl-names = "default";
286	pinctrl-0 = <&main_uart8_pins_default>;
287};
288
289&main_i2c0 {
290	status = "okay";
291	pinctrl-names = "default";
292	pinctrl-0 = <&main_i2c0_pins_default>;
293	clock-frequency = <400000>;
294
295	exp1: gpio@21 {
296		compatible = "ti,tca6416";
297		reg = <0x21>;
298		gpio-controller;
299		#gpio-cells = <2>;
300		gpio-line-names	= "BOARDID_EEPROM_WP", "CAN_STB", "GPIO_uSD_PWR_EN",
301				"IO_EXP_MCU_RGMII_RST#", "IO_EXP_PCIe0_4L_PERST#",
302				"IO_EXP_PCIe1_M.2_RTSz", "IO_EXP_PCIe3_M.2_RTSz",
303				"PM_INA_BUS_EN", "ENET1_EXP_PWRDN", "EXP1_ENET_RSTz",
304				"ENET1_I2CMUX_SEL", "PCIe0_CLKREQ#", "PCIe1_M.2_CLKREQ#",
305				"PCIe3_M2_CLKREQ#", "PCIe0_PRSNT2#_1", "PCIe0_PRSNT2#_2";
306	};
307};
308
309&main_sdhci0 {
310	/* eMMC */
311	status = "okay";
312	non-removable;
313	ti,driver-strength-ohm = <50>;
314	disable-wp;
315};
316
317&main_sdhci1 {
318	/* SD card */
319	status = "okay";
320	pinctrl-0 = <&main_mmc1_pins_default>;
321	pinctrl-names = "default";
322	disable-wp;
323	vmmc-supply = <&vdd_mmc1>;
324	vqmmc-supply = <&vdd_sd_dv>;
325};
326
327&main_gpio0 {
328	status = "okay";
329	pinctrl-names = "default";
330	pinctrl-0 = <&rpi_header_gpio0_pins_default>;
331};
332
333&mcu_cpsw {
334	status = "okay";
335	pinctrl-names = "default";
336	pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
337};
338
339&davinci_mdio {
340	mcu_phy0: ethernet-phy@0 {
341		reg = <0>;
342		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
343		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
344		ti,min-output-impedance;
345	};
346};
347
348&mcu_cpsw_port1 {
349	status = "okay";
350	phy-mode = "rgmii-rxid";
351	phy-handle = <&mcu_phy0>;
352};
353