1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for AM6 SoC Family MCU Domain peripherals 4 * 5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/ 6 */ 7 8&cbass_mcu { 9 mcu_uart0: serial@40a00000 { 10 compatible = "ti,am654-uart"; 11 reg = <0x00 0x40a00000 0x00 0x100>; 12 reg-shift = <2>; 13 reg-io-width = <4>; 14 interrupts = <GIC_SPI 565 IRQ_TYPE_LEVEL_HIGH>; 15 clock-frequency = <96000000>; 16 current-speed = <115200>; 17 power-domains = <&k3_pds 149>; 18 }; 19 20 mcu_ram: sram@41c00000 { 21 compatible = "mmio-sram"; 22 reg = <0x00 0x41c00000 0x00 0x80000>; 23 ranges = <0x0 0x00 0x41c00000 0x80000>; 24 #address-cells = <1>; 25 #size-cells = <1>; 26 }; 27 28 mcu_i2c0: i2c@40b00000 { 29 compatible = "ti,am654-i2c", "ti,omap4-i2c"; 30 reg = <0x0 0x40b00000 0x0 0x100>; 31 interrupts = <GIC_SPI 564 IRQ_TYPE_LEVEL_HIGH>; 32 #address-cells = <1>; 33 #size-cells = <0>; 34 clock-names = "fck"; 35 clocks = <&k3_clks 114 1>; 36 power-domains = <&k3_pds 114>; 37 }; 38 39 mcu_spi0: spi@40300000 { 40 compatible = "ti,am654-mcspi","ti,omap4-mcspi"; 41 reg = <0x0 0x40300000 0x0 0x400>; 42 interrupts = <GIC_SPI 560 IRQ_TYPE_LEVEL_HIGH>; 43 clocks = <&k3_clks 142 1>; 44 power-domains = <&k3_pds 142>; 45 #address-cells = <1>; 46 #size-cells = <0>; 47 }; 48 49 mcu_spi1: spi@40310000 { 50 compatible = "ti,am654-mcspi","ti,omap4-mcspi"; 51 reg = <0x0 0x40310000 0x0 0x400>; 52 interrupts = <GIC_SPI 561 IRQ_TYPE_LEVEL_HIGH>; 53 clocks = <&k3_clks 143 1>; 54 power-domains = <&k3_pds 143>; 55 #address-cells = <1>; 56 #size-cells = <0>; 57 }; 58 59 mcu_spi2: spi@40320000 { 60 compatible = "ti,am654-mcspi","ti,omap4-mcspi"; 61 reg = <0x0 0x40320000 0x0 0x400>; 62 interrupts = <GIC_SPI 562 IRQ_TYPE_LEVEL_HIGH>; 63 clocks = <&k3_clks 144 1>; 64 power-domains = <&k3_pds 144>; 65 #address-cells = <1>; 66 #size-cells = <0>; 67 }; 68 69 tscadc0: tscadc@40200000 { 70 compatible = "ti,am654-tscadc", "ti,am3359-tscadc"; 71 reg = <0x0 0x40200000 0x0 0x1000>; 72 interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>; 73 clocks = <&k3_clks 0 2>; 74 assigned-clocks = <&k3_clks 0 2>; 75 assigned-clock-rates = <60000000>; 76 clock-names = "adc_tsc_fck"; 77 78 adc { 79 #io-channel-cells = <1>; 80 compatible = "ti,am654-adc", "ti,am3359-adc"; 81 }; 82 }; 83 84 tscadc1: tscadc@40210000 { 85 compatible = "ti,am654-tscadc", "ti,am3359-tscadc"; 86 reg = <0x0 0x40210000 0x0 0x1000>; 87 interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>; 88 clocks = <&k3_clks 1 2>; 89 assigned-clocks = <&k3_clks 1 2>; 90 assigned-clock-rates = <60000000>; 91 clock-names = "adc_tsc_fck"; 92 93 adc { 94 #io-channel-cells = <1>; 95 compatible = "ti,am654-adc", "ti,am3359-adc"; 96 }; 97 }; 98}; 99