1// SPDX-License-Identifier: GPL-2.0 2/* 3 * AM625 SK: https://www.ti.com/lit/zip/sprr448 4 * 5 * Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/ 6 */ 7 8/dts-v1/; 9 10#include <dt-bindings/leds/common.h> 11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/net/ti-dp83867.h> 13#include "k3-am625.dtsi" 14 15/ { 16 compatible = "ti,am625-sk", "ti,am625"; 17 model = "Texas Instruments AM625 SK"; 18 19 aliases { 20 serial2 = &main_uart0; 21 mmc0 = &sdhci0; 22 mmc1 = &sdhci1; 23 mmc2 = &sdhci2; 24 spi0 = &ospi0; 25 ethernet0 = &cpsw_port1; 26 ethernet1 = &cpsw_port2; 27 }; 28 29 chosen { 30 stdout-path = "serial2:115200n8"; 31 bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000"; 32 }; 33 34 memory@80000000 { 35 device_type = "memory"; 36 /* 2G RAM */ 37 reg = <0x00000000 0x80000000 0x00000000 0x80000000>; 38 39 }; 40 41 reserved-memory { 42 #address-cells = <2>; 43 #size-cells = <2>; 44 ranges; 45 46 secure_tfa_ddr: tfa@9e780000 { 47 reg = <0x00 0x9e780000 0x00 0x80000>; 48 alignment = <0x1000>; 49 no-map; 50 }; 51 52 secure_ddr: optee@9e800000 { 53 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ 54 alignment = <0x1000>; 55 no-map; 56 }; 57 58 wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 { 59 compatible = "shared-dma-pool"; 60 reg = <0x00 0x9db00000 0x00 0xc00000>; 61 no-map; 62 }; 63 }; 64 65 vmain_pd: regulator-0 { 66 /* TPS65988 PD CONTROLLER OUTPUT */ 67 compatible = "regulator-fixed"; 68 regulator-name = "vmain_pd"; 69 regulator-min-microvolt = <5000000>; 70 regulator-max-microvolt = <5000000>; 71 regulator-always-on; 72 regulator-boot-on; 73 }; 74 75 vcc_5v0: regulator-1 { 76 /* Output of LM34936 */ 77 compatible = "regulator-fixed"; 78 regulator-name = "vcc_5v0"; 79 regulator-min-microvolt = <5000000>; 80 regulator-max-microvolt = <5000000>; 81 vin-supply = <&vmain_pd>; 82 regulator-always-on; 83 regulator-boot-on; 84 }; 85 86 vcc_3v3_sys: regulator-2 { 87 /* output of LM61460-Q1 */ 88 compatible = "regulator-fixed"; 89 regulator-name = "vcc_3v3_sys"; 90 regulator-min-microvolt = <3300000>; 91 regulator-max-microvolt = <3300000>; 92 vin-supply = <&vmain_pd>; 93 regulator-always-on; 94 regulator-boot-on; 95 }; 96 97 vdd_mmc1: regulator-3 { 98 /* TPS22918DBVR */ 99 compatible = "regulator-fixed"; 100 regulator-name = "vdd_mmc1"; 101 regulator-min-microvolt = <3300000>; 102 regulator-max-microvolt = <3300000>; 103 regulator-boot-on; 104 enable-active-high; 105 vin-supply = <&vcc_3v3_sys>; 106 gpio = <&exp1 3 GPIO_ACTIVE_HIGH>; 107 }; 108 109 vdd_sd_dv: regulator-4 { 110 /* Output of TLV71033 */ 111 compatible = "regulator-gpio"; 112 regulator-name = "tlv71033"; 113 pinctrl-names = "default"; 114 pinctrl-0 = <&vdd_sd_dv_pins_default>; 115 regulator-min-microvolt = <1800000>; 116 regulator-max-microvolt = <3300000>; 117 regulator-boot-on; 118 vin-supply = <&vcc_5v0>; 119 gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>; 120 states = <1800000 0x0>, 121 <3300000 0x1>; 122 }; 123 124 leds { 125 compatible = "gpio-leds"; 126 pinctrl-names = "default"; 127 pinctrl-0 = <&usr_led_pins_default>; 128 129 led-0 { 130 label = "am62-sk:green:heartbeat"; 131 gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>; 132 linux,default-trigger = "heartbeat"; 133 function = LED_FUNCTION_HEARTBEAT; 134 default-state = "off"; 135 }; 136 }; 137}; 138 139&main_pmx0 { 140 main_uart0_pins_default: main-uart0-pins-default { 141 pinctrl-single,pins = < 142 AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14) UART0_RXD */ 143 AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */ 144 >; 145 }; 146 147 main_i2c0_pins_default: main-i2c0-pins-default { 148 pinctrl-single,pins = < 149 AM62X_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */ 150 AM62X_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */ 151 >; 152 }; 153 154 main_i2c1_pins_default: main-i2c1-pins-default { 155 pinctrl-single,pins = < 156 AM62X_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */ 157 AM62X_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */ 158 >; 159 }; 160 161 main_i2c2_pins_default: main-i2c2-pins-default { 162 pinctrl-single,pins = < 163 AM62X_IOPAD(0x0b0, PIN_INPUT_PULLUP, 1) /* (K22) GPMC0_CSn2.I2C2_SCL */ 164 AM62X_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */ 165 >; 166 }; 167 168 main_mmc0_pins_default: main-mmc0-pins-default { 169 pinctrl-single,pins = < 170 AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */ 171 AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */ 172 AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */ 173 AM62X_IOPAD(0x210, PIN_INPUT, 0) /* (AA1) MMC0_DAT1 */ 174 AM62X_IOPAD(0x20c, PIN_INPUT, 0) /* (AA3) MMC0_DAT2 */ 175 AM62X_IOPAD(0x208, PIN_INPUT, 0) /* (Y4) MMC0_DAT3 */ 176 AM62X_IOPAD(0x204, PIN_INPUT, 0) /* (AB2) MMC0_DAT4 */ 177 AM62X_IOPAD(0x200, PIN_INPUT, 0) /* (AC1) MMC0_DAT5 */ 178 AM62X_IOPAD(0x1fc, PIN_INPUT, 0) /* (AD2) MMC0_DAT6 */ 179 AM62X_IOPAD(0x1f8, PIN_INPUT, 0) /* (AC2) MMC0_DAT7 */ 180 >; 181 }; 182 183 main_mmc1_pins_default: main-mmc1-pins-default { 184 pinctrl-single,pins = < 185 AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */ 186 AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22) MMC1_CLK */ 187 AM62X_IOPAD(0x230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */ 188 AM62X_IOPAD(0x22c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */ 189 AM62X_IOPAD(0x228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */ 190 AM62X_IOPAD(0x224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */ 191 AM62X_IOPAD(0x240, PIN_INPUT, 0) /* (D17) MMC1_SDCD */ 192 >; 193 }; 194 195 usr_led_pins_default: usr-led-pins-default { 196 pinctrl-single,pins = < 197 AM62X_IOPAD(0x244, PIN_OUTPUT, 7) /* (C17) MMC1_SDWP.GPIO1_49 */ 198 >; 199 }; 200 201 main_mdio1_pins_default: main-mdio1-pins-default { 202 pinctrl-single,pins = < 203 AM62X_IOPAD(0x160, PIN_OUTPUT, 0) /* (AD24) MDIO0_MDC */ 204 AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */ 205 >; 206 }; 207 208 main_rgmii1_pins_default: main-rgmii1-pins-default { 209 pinctrl-single,pins = < 210 AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17) RGMII1_RD0 */ 211 AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17) RGMII1_RD1 */ 212 AM62X_IOPAD(0x154, PIN_INPUT, 0) /* (AB16) RGMII1_RD2 */ 213 AM62X_IOPAD(0x158, PIN_INPUT, 0) /* (AA15) RGMII1_RD3 */ 214 AM62X_IOPAD(0x148, PIN_INPUT, 0) /* (AD17) RGMII1_RXC */ 215 AM62X_IOPAD(0x144, PIN_INPUT, 0) /* (AE17) RGMII1_RX_CTL */ 216 AM62X_IOPAD(0x134, PIN_OUTPUT, 0) /* (AE20) RGMII1_TD0 */ 217 AM62X_IOPAD(0x138, PIN_OUTPUT, 0) /* (AD20) RGMII1_TD1 */ 218 AM62X_IOPAD(0x13c, PIN_OUTPUT, 0) /* (AE18) RGMII1_TD2 */ 219 AM62X_IOPAD(0x140, PIN_OUTPUT, 0) /* (AD18) RGMII1_TD3 */ 220 AM62X_IOPAD(0x130, PIN_OUTPUT, 0) /* (AE19) RGMII1_TXC */ 221 AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19) RGMII1_TX_CTL */ 222 >; 223 }; 224 225 main_rgmii2_pins_default: main-rgmii2-pins-default { 226 pinctrl-single,pins = < 227 AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */ 228 AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */ 229 AM62X_IOPAD(0x18c, PIN_INPUT, 0) /* (AC21) RGMII2_RD2 */ 230 AM62X_IOPAD(0x190, PIN_INPUT, 0) /* (AE22) RGMII2_RD3 */ 231 AM62X_IOPAD(0x180, PIN_INPUT, 0) /* (AD23) RGMII2_RXC */ 232 AM62X_IOPAD(0x17c, PIN_INPUT, 0) /* (AD22) RGMII2_RX_CTL */ 233 AM62X_IOPAD(0x16c, PIN_OUTPUT, 0) /* (Y18) RGMII2_TD0 */ 234 AM62X_IOPAD(0x170, PIN_OUTPUT, 0) /* (AA18) RGMII2_TD1 */ 235 AM62X_IOPAD(0x174, PIN_OUTPUT, 0) /* (AD21) RGMII2_TD2 */ 236 AM62X_IOPAD(0x178, PIN_OUTPUT, 0) /* (AC20) RGMII2_TD3 */ 237 AM62X_IOPAD(0x168, PIN_OUTPUT, 0) /* (AE21) RGMII2_TXC */ 238 AM62X_IOPAD(0x164, PIN_OUTPUT, 0) /* (AA19) RGMII2_TX_CTL */ 239 >; 240 }; 241 242 ospi0_pins_default: ospi0-pins-default { 243 pinctrl-single,pins = < 244 AM62X_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */ 245 AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */ 246 AM62X_IOPAD(0x00c, PIN_INPUT, 0) /* (E25) OSPI0_D0 */ 247 AM62X_IOPAD(0x010, PIN_INPUT, 0) /* (G24) OSPI0_D1 */ 248 AM62X_IOPAD(0x014, PIN_INPUT, 0) /* (F25) OSPI0_D2 */ 249 AM62X_IOPAD(0x018, PIN_INPUT, 0) /* (F24) OSPI0_D3 */ 250 AM62X_IOPAD(0x01c, PIN_INPUT, 0) /* (J23) OSPI0_D4 */ 251 AM62X_IOPAD(0x020, PIN_INPUT, 0) /* (J25) OSPI0_D5 */ 252 AM62X_IOPAD(0x024, PIN_INPUT, 0) /* (H25) OSPI0_D6 */ 253 AM62X_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */ 254 AM62X_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */ 255 >; 256 }; 257 258 vdd_sd_dv_pins_default: vdd-sd-dv-pins-default { 259 pinctrl-single,pins = < 260 AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */ 261 >; 262 }; 263 264 main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-pins-default { 265 pinctrl-single,pins = < 266 AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */ 267 >; 268 }; 269}; 270 271&wkup_uart0 { 272 /* WKUP UART0 is used by DM firmware */ 273 status = "reserved"; 274}; 275 276&mcu_uart0 { 277 status = "disabled"; 278}; 279 280&main_uart0 { 281 pinctrl-names = "default"; 282 pinctrl-0 = <&main_uart0_pins_default>; 283}; 284 285&main_uart1 { 286 /* Main UART1 is used by TIFS firmware */ 287 status = "reserved"; 288}; 289 290&main_uart2 { 291 status = "disabled"; 292}; 293 294&main_uart3 { 295 status = "disabled"; 296}; 297 298&main_uart4 { 299 status = "disabled"; 300}; 301 302&main_uart5 { 303 status = "disabled"; 304}; 305 306&main_uart6 { 307 status = "disabled"; 308}; 309 310&mcu_i2c0 { 311 status = "disabled"; 312}; 313 314&wkup_i2c0 { 315 status = "disabled"; 316}; 317 318&main_i2c0 { 319 pinctrl-names = "default"; 320 pinctrl-0 = <&main_i2c0_pins_default>; 321 clock-frequency = <400000>; 322}; 323 324&main_i2c1 { 325 pinctrl-names = "default"; 326 pinctrl-0 = <&main_i2c1_pins_default>; 327 clock-frequency = <400000>; 328 329 exp1: gpio@22 { 330 compatible = "ti,tca6424"; 331 reg = <0x22>; 332 gpio-controller; 333 #gpio-cells = <2>; 334 gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST", 335 "PRU_DETECT", "MMC1_SD_EN", 336 "VPP_LDO_EN", "EXP_PS_3V3_En", 337 "EXP_PS_5V0_En", "EXP_HAT_DETECT", 338 "GPIO_AUD_RSTn", "GPIO_eMMC_RSTn", 339 "UART1_FET_BUF_EN", "WL_LT_EN", 340 "GPIO_HDMI_RSTn", "CSI_GPIO1", 341 "CSI_GPIO2", "PRU_3V3_EN", 342 "HDMI_INTn", "TEST_GPIO2", 343 "MCASP1_FET_EN", "MCASP1_BUF_BT_EN", 344 "MCASP1_FET_SEL", "UART1_FET_SEL", 345 "TSINT#", "IO_EXP_TEST_LED"; 346 347 interrupt-parent = <&main_gpio1>; 348 interrupts = <23 IRQ_TYPE_EDGE_FALLING>; 349 interrupt-controller; 350 #interrupt-cells = <2>; 351 352 pinctrl-names = "default"; 353 pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>; 354 }; 355}; 356 357&main_i2c2 { 358 status = "disabled"; 359}; 360 361&main_i2c3 { 362 status = "disabled"; 363}; 364 365&sdhci0 { 366 pinctrl-names = "default"; 367 pinctrl-0 = <&main_mmc0_pins_default>; 368 ti,driver-strength-ohm = <50>; 369 disable-wp; 370}; 371 372&sdhci1 { 373 /* SD/MMC */ 374 vmmc-supply = <&vdd_mmc1>; 375 vqmmc-supply = <&vdd_sd_dv>; 376 pinctrl-names = "default"; 377 pinctrl-0 = <&main_mmc1_pins_default>; 378 ti,driver-strength-ohm = <50>; 379 disable-wp; 380}; 381 382&cpsw3g { 383 pinctrl-names = "default"; 384 pinctrl-0 = <&main_mdio1_pins_default 385 &main_rgmii1_pins_default 386 &main_rgmii2_pins_default>; 387}; 388 389&cpsw_port1 { 390 phy-mode = "rgmii-rxid"; 391 phy-handle = <&cpsw3g_phy0>; 392}; 393 394&cpsw_port2 { 395 phy-mode = "rgmii-rxid"; 396 phy-handle = <&cpsw3g_phy1>; 397}; 398 399&cpsw3g_mdio { 400 cpsw3g_phy0: ethernet-phy@0 { 401 reg = <0>; 402 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 403 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 404 ti,min-output-impedance; 405 }; 406 407 cpsw3g_phy1: ethernet-phy@1 { 408 reg = <1>; 409 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 410 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 411 ti,min-output-impedance; 412 }; 413}; 414 415&mailbox0_cluster0 { 416 mbox_m4_0: mbox-m4-0 { 417 ti,mbox-rx = <0 0 0>; 418 ti,mbox-tx = <1 0 0>; 419 }; 420}; 421 422&ospi0 { 423 pinctrl-names = "default"; 424 pinctrl-0 = <&ospi0_pins_default>; 425 426 flash@0{ 427 compatible = "jedec,spi-nor"; 428 reg = <0x0>; 429 spi-tx-bus-width = <8>; 430 spi-rx-bus-width = <8>; 431 spi-max-frequency = <25000000>; 432 cdns,tshsl-ns = <60>; 433 cdns,tsd2d-ns = <60>; 434 cdns,tchsh-ns = <60>; 435 cdns,tslch-ns = <60>; 436 cdns,read-delay = <4>; 437 438 partitions { 439 compatible = "fixed-partitions"; 440 #address-cells = <1>; 441 #size-cells = <1>; 442 443 partition@0 { 444 label = "ospi.tiboot3"; 445 reg = <0x0 0x80000>; 446 }; 447 448 partition@80000 { 449 label = "ospi.tispl"; 450 reg = <0x80000 0x200000>; 451 }; 452 453 partition@280000 { 454 label = "ospi.u-boot"; 455 reg = <0x280000 0x400000>; 456 }; 457 458 partition@680000 { 459 label = "ospi.env"; 460 reg = <0x680000 0x40000>; 461 }; 462 463 partition@6c0000 { 464 label = "ospi.env.backup"; 465 reg = <0x6c0000 0x40000>; 466 }; 467 468 partition@800000 { 469 label = "ospi.rootfs"; 470 reg = <0x800000 0x37c0000>; 471 }; 472 473 partition@3fc0000 { 474 label = "ospi.phypattern"; 475 reg = <0x3fc0000 0x40000>; 476 }; 477 }; 478 }; 479}; 480 481&ecap0 { 482 status = "disabled"; 483}; 484 485&ecap1 { 486 status = "disabled"; 487}; 488 489&ecap2 { 490 status = "disabled"; 491}; 492 493&main_mcan0 { 494 status = "disabled"; 495}; 496