1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Unisoc Sharkl3 platform DTS file 4 * 5 * Copyright (C) 2019, Unisoc Inc. 6 */ 7 8/ { 9 interrupt-parent = <&gic>; 10 #address-cells = <2>; 11 #size-cells = <2>; 12 13 soc: soc { 14 compatible = "simple-bus"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 ranges; 18 19 apb@70000000 { 20 compatible = "simple-bus"; 21 #address-cells = <1>; 22 #size-cells = <1>; 23 ranges = <0 0x0 0x70000000 0x10000000>; 24 25 uart0: serial@0 { 26 compatible = "sprd,sc9863a-uart", 27 "sprd,sc9836-uart"; 28 reg = <0x0 0x100>; 29 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; 30 clocks = <&ext_26m>; 31 status = "disabled"; 32 }; 33 34 uart1: serial@100000 { 35 compatible = "sprd,sc9863a-uart", 36 "sprd,sc9836-uart"; 37 reg = <0x100000 0x100>; 38 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 39 clocks = <&ext_26m>; 40 status = "disabled"; 41 }; 42 43 uart2: serial@200000 { 44 compatible = "sprd,sc9863a-uart", 45 "sprd,sc9836-uart"; 46 reg = <0x200000 0x100>; 47 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 48 clocks = <&ext_26m>; 49 status = "disabled"; 50 }; 51 52 uart3: serial@300000 { 53 compatible = "sprd,sc9863a-uart", 54 "sprd,sc9836-uart"; 55 reg = <0x300000 0x100>; 56 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 57 clocks = <&ext_26m>; 58 status = "disabled"; 59 }; 60 61 uart4: serial@400000 { 62 compatible = "sprd,sc9863a-uart", 63 "sprd,sc9836-uart"; 64 reg = <0x400000 0x100>; 65 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 66 clocks = <&ext_26m>; 67 status = "disabled"; 68 }; 69 }; 70 }; 71 72 ext_26m: ext-26m { 73 compatible = "fixed-clock"; 74 #clock-cells = <0>; 75 clock-frequency = <26000000>; 76 clock-output-names = "ext-26m"; 77 }; 78}; 79