1// SPDX-License-Identifier: GPL-2.0+ OR MIT
2//
3// Device Tree Source for UniPhier PXs3 Reference Board
4//
5// Copyright (C) 2017 Socionext Inc.
6//   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
7
8/dts-v1/;
9#include "uniphier-pxs3.dtsi"
10#include "uniphier-support-card.dtsi"
11
12/ {
13	model = "UniPhier PXs3 Reference Board";
14	compatible = "socionext,uniphier-pxs3-ref", "socionext,uniphier-pxs3";
15
16	chosen {
17		stdout-path = "serial0:115200n8";
18	};
19
20	aliases {
21		serial0 = &serial0;
22		serial1 = &serial1;
23		serial2 = &serial2;
24		serial3 = &serial3;
25		i2c0 = &i2c0;
26		i2c1 = &i2c1;
27		i2c2 = &i2c2;
28		i2c3 = &i2c3;
29		i2c6 = &i2c6;
30		spi0 = &spi0;
31		spi1 = &spi1;
32	};
33
34	memory@80000000 {
35		device_type = "memory";
36		reg = <0 0x80000000 0 0xa0000000>;
37	};
38};
39
40&ethsc {
41	interrupts = <4 8>;
42};
43
44&spi0 {
45	status = "okay";
46};
47
48&spi1 {
49	status = "okay";
50};
51
52&serial0 {
53	status = "okay";
54};
55
56&serial2 {
57	status = "okay";
58};
59
60&serial3 {
61	status = "okay";
62};
63
64&gpio {
65	xirq4 {
66		gpio-hog;
67		gpios = <UNIPHIER_GPIO_IRQ(4) 0>;
68		input;
69	};
70};
71
72&i2c0 {
73	status = "okay";
74};
75
76&i2c1 {
77	status = "okay";
78};
79
80&i2c2 {
81	status = "okay";
82};
83
84&i2c3 {
85	status = "okay";
86};
87
88&sd {
89	status = "okay";
90};
91
92&eth0 {
93	status = "okay";
94	phy-handle = <&ethphy0>;
95};
96
97&mdio0 {
98	ethphy0: ethphy@0 {
99		reg = <0>;
100	};
101};
102
103&eth1 {
104	status = "okay";
105	phy-handle = <&ethphy1>;
106};
107
108&mdio1 {
109	ethphy1: ethphy@0 {
110		reg = <0>;
111	};
112};
113
114&usb0 {
115	status = "okay";
116};
117
118&usb1 {
119	status = "okay";
120};
121
122&pcie {
123	status = "okay";
124};
125
126&nand {
127	status = "okay";
128
129	nand@0 {
130		reg = <0>;
131	};
132};
133