1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 3/dts-v1/; 4 5#include <dt-bindings/gpio/gpio.h> 6#include <dt-bindings/pinctrl/rockchip.h> 7#include "rk3588s.dtsi" 8 9/ { 10 model = "Radxa ROCK 5 Model A"; 11 compatible = "radxa,rock-5a", "rockchip,rk3588s"; 12 13 aliases { 14 mmc0 = &sdhci; 15 serial2 = &uart2; 16 }; 17 18 chosen { 19 stdout-path = "serial2:1500000n8"; 20 }; 21 22 vcc12v_dcin: vcc12v-dcin-regulator { 23 compatible = "regulator-fixed"; 24 regulator-name = "vcc12v_dcin"; 25 regulator-always-on; 26 regulator-boot-on; 27 regulator-min-microvolt = <12000000>; 28 regulator-max-microvolt = <12000000>; 29 }; 30 31 vcc5v0_sys: vcc5v0-sys-regulator { 32 compatible = "regulator-fixed"; 33 regulator-name = "vcc5v0_sys"; 34 regulator-always-on; 35 regulator-boot-on; 36 regulator-min-microvolt = <5000000>; 37 regulator-max-microvolt = <5000000>; 38 vin-supply = <&vcc12v_dcin>; 39 }; 40 41 vcc_5v0: vcc-5v0-regulator { 42 compatible = "regulator-fixed"; 43 regulator-name = "vcc_5v0"; 44 regulator-min-microvolt = <5000000>; 45 regulator-max-microvolt = <5000000>; 46 regulator-boot-on; 47 regulator-always-on; 48 enable-active-high; 49 gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>; 50 pinctrl-names = "default"; 51 pinctrl-0 = <&vcc_5v0_en>; 52 vin-supply = <&vcc5v0_sys>; 53 }; 54 55 vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { 56 compatible = "regulator-fixed"; 57 regulator-name = "vcc_1v1_nldo_s3"; 58 regulator-always-on; 59 regulator-boot-on; 60 regulator-min-microvolt = <1100000>; 61 regulator-max-microvolt = <1100000>; 62 vin-supply = <&vcc5v0_sys>; 63 }; 64}; 65 66&cpu_b0 { 67 cpu-supply = <&vdd_cpu_big0_s0>; 68}; 69 70&cpu_b1 { 71 cpu-supply = <&vdd_cpu_big0_s0>; 72}; 73 74&cpu_b2 { 75 cpu-supply = <&vdd_cpu_big1_s0>; 76}; 77 78&cpu_b3 { 79 cpu-supply = <&vdd_cpu_big1_s0>; 80}; 81 82&cpu_l0 { 83 cpu-supply = <&vdd_cpu_lit_s0>; 84}; 85 86&cpu_l1 { 87 cpu-supply = <&vdd_cpu_lit_s0>; 88}; 89 90&cpu_l2 { 91 cpu-supply = <&vdd_cpu_lit_s0>; 92}; 93 94&cpu_l3 { 95 cpu-supply = <&vdd_cpu_lit_s0>; 96}; 97 98&i2c0 { 99 pinctrl-names = "default"; 100 pinctrl-0 = <&i2c0m2_xfer>; 101 status = "okay"; 102 103 vdd_cpu_big0_s0: regulator@42 { 104 compatible = "rockchip,rk8602"; 105 reg = <0x42>; 106 fcs,suspend-voltage-selector = <1>; 107 regulator-name = "vdd_cpu_big0_s0"; 108 regulator-always-on; 109 regulator-boot-on; 110 regulator-min-microvolt = <550000>; 111 regulator-max-microvolt = <1050000>; 112 regulator-ramp-delay = <2300>; 113 vin-supply = <&vcc5v0_sys>; 114 115 regulator-state-mem { 116 regulator-off-in-suspend; 117 }; 118 }; 119 120 vdd_cpu_big1_s0: regulator@43 { 121 compatible = "rockchip,rk8603", "rockchip,rk8602"; 122 reg = <0x43>; 123 fcs,suspend-voltage-selector = <1>; 124 regulator-name = "vdd_cpu_big1_s0"; 125 regulator-always-on; 126 regulator-boot-on; 127 regulator-min-microvolt = <550000>; 128 regulator-max-microvolt = <1050000>; 129 regulator-ramp-delay = <2300>; 130 vin-supply = <&vcc5v0_sys>; 131 132 regulator-state-mem { 133 regulator-off-in-suspend; 134 }; 135 }; 136}; 137 138&gmac1 { 139 clock_in_out = "output"; 140 phy-handle = <&rgmii_phy1>; 141 phy-mode = "rgmii"; 142 pinctrl-0 = <&gmac1_miim 143 &gmac1_tx_bus2 144 &gmac1_rx_bus2 145 &gmac1_rgmii_clk 146 &gmac1_rgmii_bus>; 147 pinctrl-names = "default"; 148 tx_delay = <0x3a>; 149 rx_delay = <0x3e>; 150 status = "okay"; 151}; 152 153&mdio1 { 154 rgmii_phy1: ethernet-phy@1 { 155 /* RTL8211F */ 156 compatible = "ethernet-phy-id001c.c916"; 157 reg = <0x1>; 158 pinctrl-names = "default"; 159 pinctrl-0 = <&rtl8211f_rst>; 160 reset-assert-us = <20000>; 161 reset-deassert-us = <100000>; 162 reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 163 }; 164}; 165 166&pinctrl { 167 power { 168 vcc_5v0_en: vcc-5v0-en { 169 rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 170 }; 171 }; 172 173 rtl8211f { 174 rtl8211f_rst: rtl8211f-rst { 175 rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 176 }; 177 }; 178}; 179 180&sdhci { 181 bus-width = <8>; 182 no-sdio; 183 no-sd; 184 non-removable; 185 max-frequency = <200000000>; 186 mmc-hs400-1_8v; 187 mmc-hs400-enhanced-strobe; 188 status = "okay"; 189}; 190 191&sdmmc { 192 bus-width = <4>; 193 cap-mmc-highspeed; 194 cap-sd-highspeed; 195 disable-wp; 196 max-frequency = <150000000>; 197 no-sdio; 198 no-mmc; 199 sd-uhs-sdr104; 200 vmmc-supply = <&vcc_3v3_s0>; 201 vqmmc-supply = <&vccio_sd_s0>; 202 status = "okay"; 203}; 204 205&spi2 { 206 status = "okay"; 207 assigned-clocks = <&cru CLK_SPI2>; 208 assigned-clock-rates = <200000000>; 209 num-cs = <1>; 210 pinctrl-names = "default"; 211 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; 212 213 pmic@0 { 214 compatible = "rockchip,rk806"; 215 reg = <0x0>; 216 interrupt-parent = <&gpio0>; 217 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 218 pinctrl-names = "default"; 219 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 220 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 221 spi-max-frequency = <1000000>; 222 223 vcc1-supply = <&vcc5v0_sys>; 224 vcc2-supply = <&vcc5v0_sys>; 225 vcc3-supply = <&vcc5v0_sys>; 226 vcc4-supply = <&vcc5v0_sys>; 227 vcc5-supply = <&vcc5v0_sys>; 228 vcc6-supply = <&vcc5v0_sys>; 229 vcc7-supply = <&vcc5v0_sys>; 230 vcc8-supply = <&vcc5v0_sys>; 231 vcc9-supply = <&vcc5v0_sys>; 232 vcc10-supply = <&vcc5v0_sys>; 233 vcc11-supply = <&vcc_2v0_pldo_s3>; 234 vcc12-supply = <&vcc5v0_sys>; 235 vcc13-supply = <&vcc_1v1_nldo_s3>; 236 vcc14-supply = <&vcc_1v1_nldo_s3>; 237 vcca-supply = <&vcc5v0_sys>; 238 239 gpio-controller; 240 #gpio-cells = <2>; 241 242 rk806_dvs1_null: dvs1-null-pins { 243 pins = "gpio_pwrctrl2"; 244 function = "pin_fun0"; 245 }; 246 247 rk806_dvs2_null: dvs2-null-pins { 248 pins = "gpio_pwrctrl2"; 249 function = "pin_fun0"; 250 }; 251 252 rk806_dvs3_null: dvs3-null-pins { 253 pins = "gpio_pwrctrl3"; 254 function = "pin_fun0"; 255 }; 256 257 regulators { 258 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { 259 regulator-name = "vdd_gpu_s0"; 260 regulator-boot-on; 261 regulator-min-microvolt = <550000>; 262 regulator-max-microvolt = <950000>; 263 regulator-ramp-delay = <12500>; 264 regulator-enable-ramp-delay = <400>; 265 266 regulator-state-mem { 267 regulator-off-in-suspend; 268 }; 269 }; 270 271 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { 272 regulator-name = "vdd_cpu_lit_s0"; 273 regulator-always-on; 274 regulator-boot-on; 275 regulator-min-microvolt = <550000>; 276 regulator-max-microvolt = <950000>; 277 regulator-ramp-delay = <12500>; 278 279 regulator-state-mem { 280 regulator-off-in-suspend; 281 }; 282 }; 283 284 vdd_log_s0: dcdc-reg3 { 285 regulator-name = "vdd_log_s0"; 286 regulator-always-on; 287 regulator-boot-on; 288 regulator-min-microvolt = <675000>; 289 regulator-max-microvolt = <750000>; 290 regulator-ramp-delay = <12500>; 291 292 regulator-state-mem { 293 regulator-off-in-suspend; 294 regulator-suspend-microvolt = <750000>; 295 }; 296 }; 297 298 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { 299 regulator-name = "vdd_vdenc_s0"; 300 regulator-always-on; 301 regulator-boot-on; 302 regulator-min-microvolt = <550000>; 303 regulator-max-microvolt = <950000>; 304 regulator-ramp-delay = <12500>; 305 306 regulator-state-mem { 307 regulator-off-in-suspend; 308 }; 309 }; 310 311 vdd_ddr_s0: dcdc-reg5 { 312 regulator-name = "vdd_ddr_s0"; 313 regulator-always-on; 314 regulator-boot-on; 315 regulator-min-microvolt = <675000>; 316 regulator-max-microvolt = <900000>; 317 regulator-ramp-delay = <12500>; 318 319 regulator-state-mem { 320 regulator-off-in-suspend; 321 regulator-suspend-microvolt = <850000>; 322 }; 323 }; 324 325 vdd2_ddr_s3: dcdc-reg6 { 326 regulator-name = "vdd2_ddr_s3"; 327 regulator-always-on; 328 regulator-boot-on; 329 330 regulator-state-mem { 331 regulator-on-in-suspend; 332 }; 333 }; 334 335 vcc_2v0_pldo_s3: dcdc-reg7 { 336 regulator-name = "vdd_2v0_pldo_s3"; 337 regulator-always-on; 338 regulator-boot-on; 339 regulator-min-microvolt = <2000000>; 340 regulator-max-microvolt = <2000000>; 341 regulator-ramp-delay = <12500>; 342 343 regulator-state-mem { 344 regulator-on-in-suspend; 345 regulator-suspend-microvolt = <2000000>; 346 }; 347 }; 348 349 vcc_3v3_s3: dcdc-reg8 { 350 regulator-name = "vcc_3v3_s3"; 351 regulator-always-on; 352 regulator-boot-on; 353 regulator-min-microvolt = <3300000>; 354 regulator-max-microvolt = <3300000>; 355 356 regulator-state-mem { 357 regulator-on-in-suspend; 358 regulator-suspend-microvolt = <3300000>; 359 }; 360 }; 361 362 vddq_ddr_s0: dcdc-reg9 { 363 regulator-name = "vddq_ddr_s0"; 364 regulator-always-on; 365 regulator-boot-on; 366 367 regulator-state-mem { 368 regulator-off-in-suspend; 369 }; 370 }; 371 372 vcc_1v8_s3: dcdc-reg10 { 373 regulator-name = "vcc_1v8_s3"; 374 regulator-always-on; 375 regulator-boot-on; 376 regulator-min-microvolt = <1800000>; 377 regulator-max-microvolt = <1800000>; 378 379 regulator-state-mem { 380 regulator-on-in-suspend; 381 regulator-suspend-microvolt = <1800000>; 382 }; 383 }; 384 385 avcc_1v8_s0: pldo-reg1 { 386 regulator-name = "avcc_1v8_s0"; 387 regulator-always-on; 388 regulator-boot-on; 389 regulator-min-microvolt = <1800000>; 390 regulator-max-microvolt = <1800000>; 391 392 regulator-state-mem { 393 regulator-off-in-suspend; 394 }; 395 }; 396 397 vcc_1v8_s0: pldo-reg2 { 398 regulator-name = "vcc_1v8_s0"; 399 regulator-always-on; 400 regulator-boot-on; 401 regulator-min-microvolt = <1800000>; 402 regulator-max-microvolt = <1800000>; 403 404 regulator-state-mem { 405 regulator-off-in-suspend; 406 regulator-suspend-microvolt = <1800000>; 407 }; 408 }; 409 410 avdd_1v2_s0: pldo-reg3 { 411 regulator-name = "avdd_1v2_s0"; 412 regulator-always-on; 413 regulator-boot-on; 414 regulator-min-microvolt = <1200000>; 415 regulator-max-microvolt = <1200000>; 416 417 regulator-state-mem { 418 regulator-off-in-suspend; 419 }; 420 }; 421 422 vcc_3v3_s0: pldo-reg4 { 423 regulator-name = "vcc_3v3_s0"; 424 regulator-always-on; 425 regulator-boot-on; 426 regulator-min-microvolt = <3300000>; 427 regulator-max-microvolt = <3300000>; 428 regulator-ramp-delay = <12500>; 429 430 regulator-state-mem { 431 regulator-off-in-suspend; 432 }; 433 }; 434 435 vccio_sd_s0: pldo-reg5 { 436 regulator-name = "vccio_sd_s0"; 437 regulator-always-on; 438 regulator-boot-on; 439 regulator-min-microvolt = <1800000>; 440 regulator-max-microvolt = <3300000>; 441 regulator-ramp-delay = <12500>; 442 443 regulator-state-mem { 444 regulator-off-in-suspend; 445 }; 446 }; 447 448 pldo6_s3: pldo-reg6 { 449 regulator-name = "pldo6_s3"; 450 regulator-always-on; 451 regulator-boot-on; 452 regulator-min-microvolt = <1800000>; 453 regulator-max-microvolt = <1800000>; 454 455 regulator-state-mem { 456 regulator-on-in-suspend; 457 regulator-suspend-microvolt = <1800000>; 458 }; 459 }; 460 461 vdd_0v75_s3: nldo-reg1 { 462 regulator-name = "vdd_0v75_s3"; 463 regulator-always-on; 464 regulator-boot-on; 465 regulator-min-microvolt = <750000>; 466 regulator-max-microvolt = <750000>; 467 468 regulator-state-mem { 469 regulator-on-in-suspend; 470 regulator-suspend-microvolt = <750000>; 471 }; 472 }; 473 474 vdd_ddr_pll_s0: nldo-reg2 { 475 regulator-name = "vdd_ddr_pll_s0"; 476 regulator-always-on; 477 regulator-boot-on; 478 regulator-min-microvolt = <850000>; 479 regulator-max-microvolt = <850000>; 480 481 regulator-state-mem { 482 regulator-off-in-suspend; 483 regulator-suspend-microvolt = <850000>; 484 }; 485 }; 486 487 avdd_0v75_s0: nldo-reg3 { 488 regulator-name = "avdd_0v75_s0"; 489 regulator-always-on; 490 regulator-boot-on; 491 regulator-min-microvolt = <750000>; 492 regulator-max-microvolt = <750000>; 493 494 regulator-state-mem { 495 regulator-off-in-suspend; 496 }; 497 }; 498 499 vdd_0v85_s0: nldo-reg4 { 500 regulator-name = "vdd_0v85_s0"; 501 regulator-always-on; 502 regulator-boot-on; 503 regulator-min-microvolt = <850000>; 504 regulator-max-microvolt = <850000>; 505 506 regulator-state-mem { 507 regulator-off-in-suspend; 508 }; 509 }; 510 511 vdd_0v75_s0: nldo-reg5 { 512 regulator-name = "vdd_0v75_s0"; 513 regulator-always-on; 514 regulator-boot-on; 515 regulator-min-microvolt = <750000>; 516 regulator-max-microvolt = <750000>; 517 518 regulator-state-mem { 519 regulator-off-in-suspend; 520 }; 521 }; 522 }; 523 }; 524}; 525 526&uart2 { 527 pinctrl-0 = <&uart2m0_xfer>; 528 status = "okay"; 529}; 530