1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 3/dts-v1/; 4 5#include <dt-bindings/gpio/gpio.h> 6#include <dt-bindings/pinctrl/rockchip.h> 7#include "rk3588s.dtsi" 8 9/ { 10 model = "Radxa ROCK 5 Model A"; 11 compatible = "radxa,rock-5a", "rockchip,rk3588s"; 12 13 aliases { 14 mmc0 = &sdhci; 15 serial2 = &uart2; 16 }; 17 18 chosen { 19 stdout-path = "serial2:1500000n8"; 20 }; 21 22 vcc12v_dcin: vcc12v-dcin-regulator { 23 compatible = "regulator-fixed"; 24 regulator-name = "vcc12v_dcin"; 25 regulator-always-on; 26 regulator-boot-on; 27 regulator-min-microvolt = <12000000>; 28 regulator-max-microvolt = <12000000>; 29 }; 30 31 vcc5v0_sys: vcc5v0-sys-regulator { 32 compatible = "regulator-fixed"; 33 regulator-name = "vcc5v0_sys"; 34 regulator-always-on; 35 regulator-boot-on; 36 regulator-min-microvolt = <5000000>; 37 regulator-max-microvolt = <5000000>; 38 vin-supply = <&vcc12v_dcin>; 39 }; 40 41 vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { 42 compatible = "regulator-fixed"; 43 regulator-name = "vcc_1v1_nldo_s3"; 44 regulator-always-on; 45 regulator-boot-on; 46 regulator-min-microvolt = <1100000>; 47 regulator-max-microvolt = <1100000>; 48 vin-supply = <&vcc5v0_sys>; 49 }; 50}; 51 52&cpu_l0 { 53 cpu-supply = <&vdd_cpu_lit_s0>; 54}; 55 56&cpu_l1 { 57 cpu-supply = <&vdd_cpu_lit_s0>; 58}; 59 60&cpu_l2 { 61 cpu-supply = <&vdd_cpu_lit_s0>; 62}; 63 64&cpu_l3 { 65 cpu-supply = <&vdd_cpu_lit_s0>; 66}; 67 68&gmac1 { 69 clock_in_out = "output"; 70 phy-handle = <&rgmii_phy1>; 71 phy-mode = "rgmii"; 72 pinctrl-0 = <&gmac1_miim 73 &gmac1_tx_bus2 74 &gmac1_rx_bus2 75 &gmac1_rgmii_clk 76 &gmac1_rgmii_bus>; 77 pinctrl-names = "default"; 78 tx_delay = <0x3a>; 79 rx_delay = <0x3e>; 80 status = "okay"; 81}; 82 83&mdio1 { 84 rgmii_phy1: ethernet-phy@1 { 85 /* RTL8211F */ 86 compatible = "ethernet-phy-id001c.c916"; 87 reg = <0x1>; 88 pinctrl-names = "default"; 89 pinctrl-0 = <&rtl8211f_rst>; 90 reset-assert-us = <20000>; 91 reset-deassert-us = <100000>; 92 reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 93 }; 94}; 95 96&pinctrl { 97 rtl8211f { 98 rtl8211f_rst: rtl8211f-rst { 99 rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 100 }; 101 }; 102}; 103 104&sdhci { 105 bus-width = <8>; 106 no-sdio; 107 no-sd; 108 non-removable; 109 max-frequency = <200000000>; 110 mmc-hs400-1_8v; 111 mmc-hs400-enhanced-strobe; 112 status = "okay"; 113}; 114 115&spi2 { 116 status = "okay"; 117 assigned-clocks = <&cru CLK_SPI2>; 118 assigned-clock-rates = <200000000>; 119 num-cs = <1>; 120 pinctrl-names = "default"; 121 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; 122 123 pmic@0 { 124 compatible = "rockchip,rk806"; 125 reg = <0x0>; 126 interrupt-parent = <&gpio0>; 127 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 128 pinctrl-names = "default"; 129 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 130 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 131 spi-max-frequency = <1000000>; 132 133 vcc1-supply = <&vcc5v0_sys>; 134 vcc2-supply = <&vcc5v0_sys>; 135 vcc3-supply = <&vcc5v0_sys>; 136 vcc4-supply = <&vcc5v0_sys>; 137 vcc5-supply = <&vcc5v0_sys>; 138 vcc6-supply = <&vcc5v0_sys>; 139 vcc7-supply = <&vcc5v0_sys>; 140 vcc8-supply = <&vcc5v0_sys>; 141 vcc9-supply = <&vcc5v0_sys>; 142 vcc10-supply = <&vcc5v0_sys>; 143 vcc11-supply = <&vcc_2v0_pldo_s3>; 144 vcc12-supply = <&vcc5v0_sys>; 145 vcc13-supply = <&vcc_1v1_nldo_s3>; 146 vcc14-supply = <&vcc_1v1_nldo_s3>; 147 vcca-supply = <&vcc5v0_sys>; 148 149 gpio-controller; 150 #gpio-cells = <2>; 151 152 rk806_dvs1_null: dvs1-null-pins { 153 pins = "gpio_pwrctrl2"; 154 function = "pin_fun0"; 155 }; 156 157 rk806_dvs2_null: dvs2-null-pins { 158 pins = "gpio_pwrctrl2"; 159 function = "pin_fun0"; 160 }; 161 162 rk806_dvs3_null: dvs3-null-pins { 163 pins = "gpio_pwrctrl3"; 164 function = "pin_fun0"; 165 }; 166 167 regulators { 168 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { 169 regulator-name = "vdd_gpu_s0"; 170 regulator-boot-on; 171 regulator-min-microvolt = <550000>; 172 regulator-max-microvolt = <950000>; 173 regulator-ramp-delay = <12500>; 174 regulator-enable-ramp-delay = <400>; 175 176 regulator-state-mem { 177 regulator-off-in-suspend; 178 }; 179 }; 180 181 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { 182 regulator-name = "vdd_cpu_lit_s0"; 183 regulator-always-on; 184 regulator-boot-on; 185 regulator-min-microvolt = <550000>; 186 regulator-max-microvolt = <950000>; 187 regulator-ramp-delay = <12500>; 188 189 regulator-state-mem { 190 regulator-off-in-suspend; 191 }; 192 }; 193 194 vdd_log_s0: dcdc-reg3 { 195 regulator-name = "vdd_log_s0"; 196 regulator-always-on; 197 regulator-boot-on; 198 regulator-min-microvolt = <675000>; 199 regulator-max-microvolt = <750000>; 200 regulator-ramp-delay = <12500>; 201 202 regulator-state-mem { 203 regulator-off-in-suspend; 204 regulator-suspend-microvolt = <750000>; 205 }; 206 }; 207 208 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { 209 regulator-name = "vdd_vdenc_s0"; 210 regulator-always-on; 211 regulator-boot-on; 212 regulator-min-microvolt = <550000>; 213 regulator-max-microvolt = <950000>; 214 regulator-ramp-delay = <12500>; 215 216 regulator-state-mem { 217 regulator-off-in-suspend; 218 }; 219 }; 220 221 vdd_ddr_s0: dcdc-reg5 { 222 regulator-name = "vdd_ddr_s0"; 223 regulator-always-on; 224 regulator-boot-on; 225 regulator-min-microvolt = <675000>; 226 regulator-max-microvolt = <900000>; 227 regulator-ramp-delay = <12500>; 228 229 regulator-state-mem { 230 regulator-off-in-suspend; 231 regulator-suspend-microvolt = <850000>; 232 }; 233 }; 234 235 vdd2_ddr_s3: dcdc-reg6 { 236 regulator-name = "vdd2_ddr_s3"; 237 regulator-always-on; 238 regulator-boot-on; 239 240 regulator-state-mem { 241 regulator-on-in-suspend; 242 }; 243 }; 244 245 vcc_2v0_pldo_s3: dcdc-reg7 { 246 regulator-name = "vdd_2v0_pldo_s3"; 247 regulator-always-on; 248 regulator-boot-on; 249 regulator-min-microvolt = <2000000>; 250 regulator-max-microvolt = <2000000>; 251 regulator-ramp-delay = <12500>; 252 253 regulator-state-mem { 254 regulator-on-in-suspend; 255 regulator-suspend-microvolt = <2000000>; 256 }; 257 }; 258 259 vcc_3v3_s3: dcdc-reg8 { 260 regulator-name = "vcc_3v3_s3"; 261 regulator-always-on; 262 regulator-boot-on; 263 regulator-min-microvolt = <3300000>; 264 regulator-max-microvolt = <3300000>; 265 266 regulator-state-mem { 267 regulator-on-in-suspend; 268 regulator-suspend-microvolt = <3300000>; 269 }; 270 }; 271 272 vddq_ddr_s0: dcdc-reg9 { 273 regulator-name = "vddq_ddr_s0"; 274 regulator-always-on; 275 regulator-boot-on; 276 277 regulator-state-mem { 278 regulator-off-in-suspend; 279 }; 280 }; 281 282 vcc_1v8_s3: dcdc-reg10 { 283 regulator-name = "vcc_1v8_s3"; 284 regulator-always-on; 285 regulator-boot-on; 286 regulator-min-microvolt = <1800000>; 287 regulator-max-microvolt = <1800000>; 288 289 regulator-state-mem { 290 regulator-on-in-suspend; 291 regulator-suspend-microvolt = <1800000>; 292 }; 293 }; 294 295 avcc_1v8_s0: pldo-reg1 { 296 regulator-name = "avcc_1v8_s0"; 297 regulator-always-on; 298 regulator-boot-on; 299 regulator-min-microvolt = <1800000>; 300 regulator-max-microvolt = <1800000>; 301 302 regulator-state-mem { 303 regulator-off-in-suspend; 304 }; 305 }; 306 307 vcc_1v8_s0: pldo-reg2 { 308 regulator-name = "vcc_1v8_s0"; 309 regulator-always-on; 310 regulator-boot-on; 311 regulator-min-microvolt = <1800000>; 312 regulator-max-microvolt = <1800000>; 313 314 regulator-state-mem { 315 regulator-off-in-suspend; 316 regulator-suspend-microvolt = <1800000>; 317 }; 318 }; 319 320 avdd_1v2_s0: pldo-reg3 { 321 regulator-name = "avdd_1v2_s0"; 322 regulator-always-on; 323 regulator-boot-on; 324 regulator-min-microvolt = <1200000>; 325 regulator-max-microvolt = <1200000>; 326 327 regulator-state-mem { 328 regulator-off-in-suspend; 329 }; 330 }; 331 332 vcc_3v3_s0: pldo-reg4 { 333 regulator-name = "vcc_3v3_s0"; 334 regulator-always-on; 335 regulator-boot-on; 336 regulator-min-microvolt = <3300000>; 337 regulator-max-microvolt = <3300000>; 338 regulator-ramp-delay = <12500>; 339 340 regulator-state-mem { 341 regulator-off-in-suspend; 342 }; 343 }; 344 345 vccio_sd_s0: pldo-reg5 { 346 regulator-name = "vccio_sd_s0"; 347 regulator-always-on; 348 regulator-boot-on; 349 regulator-min-microvolt = <1800000>; 350 regulator-max-microvolt = <3300000>; 351 regulator-ramp-delay = <12500>; 352 353 regulator-state-mem { 354 regulator-off-in-suspend; 355 }; 356 }; 357 358 pldo6_s3: pldo-reg6 { 359 regulator-name = "pldo6_s3"; 360 regulator-always-on; 361 regulator-boot-on; 362 regulator-min-microvolt = <1800000>; 363 regulator-max-microvolt = <1800000>; 364 365 regulator-state-mem { 366 regulator-on-in-suspend; 367 regulator-suspend-microvolt = <1800000>; 368 }; 369 }; 370 371 vdd_0v75_s3: nldo-reg1 { 372 regulator-name = "vdd_0v75_s3"; 373 regulator-always-on; 374 regulator-boot-on; 375 regulator-min-microvolt = <750000>; 376 regulator-max-microvolt = <750000>; 377 378 regulator-state-mem { 379 regulator-on-in-suspend; 380 regulator-suspend-microvolt = <750000>; 381 }; 382 }; 383 384 vdd_ddr_pll_s0: nldo-reg2 { 385 regulator-name = "vdd_ddr_pll_s0"; 386 regulator-always-on; 387 regulator-boot-on; 388 regulator-min-microvolt = <850000>; 389 regulator-max-microvolt = <850000>; 390 391 regulator-state-mem { 392 regulator-off-in-suspend; 393 regulator-suspend-microvolt = <850000>; 394 }; 395 }; 396 397 avdd_0v75_s0: nldo-reg3 { 398 regulator-name = "avdd_0v75_s0"; 399 regulator-always-on; 400 regulator-boot-on; 401 regulator-min-microvolt = <750000>; 402 regulator-max-microvolt = <750000>; 403 404 regulator-state-mem { 405 regulator-off-in-suspend; 406 }; 407 }; 408 409 vdd_0v85_s0: nldo-reg4 { 410 regulator-name = "vdd_0v85_s0"; 411 regulator-always-on; 412 regulator-boot-on; 413 regulator-min-microvolt = <850000>; 414 regulator-max-microvolt = <850000>; 415 416 regulator-state-mem { 417 regulator-off-in-suspend; 418 }; 419 }; 420 421 vdd_0v75_s0: nldo-reg5 { 422 regulator-name = "vdd_0v75_s0"; 423 regulator-always-on; 424 regulator-boot-on; 425 regulator-min-microvolt = <750000>; 426 regulator-max-microvolt = <750000>; 427 428 regulator-state-mem { 429 regulator-off-in-suspend; 430 }; 431 }; 432 }; 433 }; 434}; 435 436&uart2 { 437 pinctrl-0 = <&uart2m0_xfer>; 438 status = "okay"; 439}; 440