1a1d32814SChristopher Obbard// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2a1d32814SChristopher Obbard 3a1d32814SChristopher Obbard/dts-v1/; 4a1d32814SChristopher Obbard 555529fe3SCristian Ciocaltea#include <dt-bindings/gpio/gpio.h> 6a1d32814SChristopher Obbard#include "rk3588.dtsi" 7a1d32814SChristopher Obbard 8a1d32814SChristopher Obbard/ { 9a1d32814SChristopher Obbard model = "Radxa ROCK 5 Model B"; 10a1d32814SChristopher Obbard compatible = "radxa,rock-5b", "rockchip,rk3588"; 11a1d32814SChristopher Obbard 12a1d32814SChristopher Obbard aliases { 136fb13f88SChristopher Obbard mmc0 = &sdhci; 14a1d32814SChristopher Obbard serial2 = &uart2; 15a1d32814SChristopher Obbard }; 16a1d32814SChristopher Obbard 17a1d32814SChristopher Obbard chosen { 18a1d32814SChristopher Obbard stdout-path = "serial2:1500000n8"; 19a1d32814SChristopher Obbard }; 20a1d32814SChristopher Obbard 21f36bb176SCristian Ciocaltea fan: pwm-fan { 22f36bb176SCristian Ciocaltea compatible = "pwm-fan"; 23f36bb176SCristian Ciocaltea cooling-levels = <0 95 145 195 255>; 24f36bb176SCristian Ciocaltea fan-supply = <&vcc5v0_sys>; 25f36bb176SCristian Ciocaltea pwms = <&pwm1 0 50000 0>; 26f36bb176SCristian Ciocaltea #cooling-cells = <2>; 27f36bb176SCristian Ciocaltea }; 28f36bb176SCristian Ciocaltea 2955529fe3SCristian Ciocaltea sound { 3055529fe3SCristian Ciocaltea compatible = "audio-graph-card"; 3155529fe3SCristian Ciocaltea label = "Analog"; 3255529fe3SCristian Ciocaltea 3355529fe3SCristian Ciocaltea widgets = "Microphone", "Mic Jack", 3455529fe3SCristian Ciocaltea "Headphone", "Headphones"; 3555529fe3SCristian Ciocaltea 3655529fe3SCristian Ciocaltea routing = "MIC2", "Mic Jack", 3755529fe3SCristian Ciocaltea "Headphones", "HPOL", 3855529fe3SCristian Ciocaltea "Headphones", "HPOR"; 3955529fe3SCristian Ciocaltea 4055529fe3SCristian Ciocaltea dais = <&i2s0_8ch_p0>; 4155529fe3SCristian Ciocaltea hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>; 4255529fe3SCristian Ciocaltea pinctrl-names = "default"; 4355529fe3SCristian Ciocaltea pinctrl-0 = <&hp_detect>; 4455529fe3SCristian Ciocaltea }; 4555529fe3SCristian Ciocaltea 46a1d32814SChristopher Obbard vcc5v0_sys: vcc5v0-sys-regulator { 47a1d32814SChristopher Obbard compatible = "regulator-fixed"; 48a1d32814SChristopher Obbard regulator-name = "vcc5v0_sys"; 49a1d32814SChristopher Obbard regulator-always-on; 50a1d32814SChristopher Obbard regulator-boot-on; 51a1d32814SChristopher Obbard regulator-min-microvolt = <5000000>; 52a1d32814SChristopher Obbard regulator-max-microvolt = <5000000>; 53a1d32814SChristopher Obbard }; 54a1d32814SChristopher Obbard}; 55a1d32814SChristopher Obbard 56*1bb69cd4SCristian Ciocaltea&cpu_b0 { 57*1bb69cd4SCristian Ciocaltea cpu-supply = <&vdd_cpu_big0_s0>; 58*1bb69cd4SCristian Ciocaltea}; 59*1bb69cd4SCristian Ciocaltea 60*1bb69cd4SCristian Ciocaltea&cpu_b1 { 61*1bb69cd4SCristian Ciocaltea cpu-supply = <&vdd_cpu_big0_s0>; 62*1bb69cd4SCristian Ciocaltea}; 63*1bb69cd4SCristian Ciocaltea 64*1bb69cd4SCristian Ciocaltea&cpu_b2 { 65*1bb69cd4SCristian Ciocaltea cpu-supply = <&vdd_cpu_big1_s0>; 66*1bb69cd4SCristian Ciocaltea}; 67*1bb69cd4SCristian Ciocaltea 68*1bb69cd4SCristian Ciocaltea&cpu_b3 { 69*1bb69cd4SCristian Ciocaltea cpu-supply = <&vdd_cpu_big1_s0>; 70*1bb69cd4SCristian Ciocaltea}; 71*1bb69cd4SCristian Ciocaltea 72*1bb69cd4SCristian Ciocaltea&i2c0 { 73*1bb69cd4SCristian Ciocaltea pinctrl-names = "default"; 74*1bb69cd4SCristian Ciocaltea pinctrl-0 = <&i2c0m2_xfer>; 75*1bb69cd4SCristian Ciocaltea status = "okay"; 76*1bb69cd4SCristian Ciocaltea 77*1bb69cd4SCristian Ciocaltea vdd_cpu_big0_s0: regulator@42 { 78*1bb69cd4SCristian Ciocaltea compatible = "rockchip,rk8602"; 79*1bb69cd4SCristian Ciocaltea reg = <0x42>; 80*1bb69cd4SCristian Ciocaltea fcs,suspend-voltage-selector = <1>; 81*1bb69cd4SCristian Ciocaltea regulator-name = "vdd_cpu_big0_s0"; 82*1bb69cd4SCristian Ciocaltea regulator-always-on; 83*1bb69cd4SCristian Ciocaltea regulator-boot-on; 84*1bb69cd4SCristian Ciocaltea regulator-min-microvolt = <550000>; 85*1bb69cd4SCristian Ciocaltea regulator-max-microvolt = <1050000>; 86*1bb69cd4SCristian Ciocaltea regulator-ramp-delay = <2300>; 87*1bb69cd4SCristian Ciocaltea vin-supply = <&vcc5v0_sys>; 88*1bb69cd4SCristian Ciocaltea 89*1bb69cd4SCristian Ciocaltea regulator-state-mem { 90*1bb69cd4SCristian Ciocaltea regulator-off-in-suspend; 91*1bb69cd4SCristian Ciocaltea }; 92*1bb69cd4SCristian Ciocaltea }; 93*1bb69cd4SCristian Ciocaltea 94*1bb69cd4SCristian Ciocaltea vdd_cpu_big1_s0: regulator@43 { 95*1bb69cd4SCristian Ciocaltea compatible = "rockchip,rk8603", "rockchip,rk8602"; 96*1bb69cd4SCristian Ciocaltea reg = <0x43>; 97*1bb69cd4SCristian Ciocaltea fcs,suspend-voltage-selector = <1>; 98*1bb69cd4SCristian Ciocaltea regulator-name = "vdd_cpu_big1_s0"; 99*1bb69cd4SCristian Ciocaltea regulator-always-on; 100*1bb69cd4SCristian Ciocaltea regulator-boot-on; 101*1bb69cd4SCristian Ciocaltea regulator-min-microvolt = <550000>; 102*1bb69cd4SCristian Ciocaltea regulator-max-microvolt = <1050000>; 103*1bb69cd4SCristian Ciocaltea regulator-ramp-delay = <2300>; 104*1bb69cd4SCristian Ciocaltea vin-supply = <&vcc5v0_sys>; 105*1bb69cd4SCristian Ciocaltea 106*1bb69cd4SCristian Ciocaltea regulator-state-mem { 107*1bb69cd4SCristian Ciocaltea regulator-off-in-suspend; 108*1bb69cd4SCristian Ciocaltea }; 109*1bb69cd4SCristian Ciocaltea }; 110*1bb69cd4SCristian Ciocaltea}; 111*1bb69cd4SCristian Ciocaltea 1121e9c2404SShreeya Patel&i2c6 { 1131e9c2404SShreeya Patel status = "okay"; 1141e9c2404SShreeya Patel 1151e9c2404SShreeya Patel hym8563: rtc@51 { 1161e9c2404SShreeya Patel compatible = "haoyu,hym8563"; 1171e9c2404SShreeya Patel reg = <0x51>; 1181e9c2404SShreeya Patel #clock-cells = <0>; 1191e9c2404SShreeya Patel clock-output-names = "hym8563"; 1201e9c2404SShreeya Patel pinctrl-names = "default"; 1211e9c2404SShreeya Patel pinctrl-0 = <&hym8563_int>; 1221e9c2404SShreeya Patel interrupt-parent = <&gpio0>; 1231e9c2404SShreeya Patel interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; 1241e9c2404SShreeya Patel wakeup-source; 1251e9c2404SShreeya Patel }; 1261e9c2404SShreeya Patel}; 1271e9c2404SShreeya Patel 12855529fe3SCristian Ciocaltea&i2c7 { 12955529fe3SCristian Ciocaltea status = "okay"; 13055529fe3SCristian Ciocaltea 1310af7164cSCristian Ciocaltea es8316: audio-codec@11 { 13255529fe3SCristian Ciocaltea compatible = "everest,es8316"; 13355529fe3SCristian Ciocaltea reg = <0x11>; 13455529fe3SCristian Ciocaltea clocks = <&cru I2S0_8CH_MCLKOUT>; 13555529fe3SCristian Ciocaltea clock-names = "mclk"; 13655529fe3SCristian Ciocaltea #sound-dai-cells = <0>; 13755529fe3SCristian Ciocaltea 13855529fe3SCristian Ciocaltea port { 13955529fe3SCristian Ciocaltea es8316_p0_0: endpoint { 14055529fe3SCristian Ciocaltea remote-endpoint = <&i2s0_8ch_p0_0>; 14155529fe3SCristian Ciocaltea }; 14255529fe3SCristian Ciocaltea }; 14355529fe3SCristian Ciocaltea }; 14455529fe3SCristian Ciocaltea}; 14555529fe3SCristian Ciocaltea 14655529fe3SCristian Ciocaltea&i2s0_8ch { 14755529fe3SCristian Ciocaltea pinctrl-names = "default"; 14855529fe3SCristian Ciocaltea pinctrl-0 = <&i2s0_lrck 14955529fe3SCristian Ciocaltea &i2s0_mclk 15055529fe3SCristian Ciocaltea &i2s0_sclk 15155529fe3SCristian Ciocaltea &i2s0_sdi0 15255529fe3SCristian Ciocaltea &i2s0_sdo0>; 15355529fe3SCristian Ciocaltea status = "okay"; 15455529fe3SCristian Ciocaltea 15555529fe3SCristian Ciocaltea i2s0_8ch_p0: port { 15655529fe3SCristian Ciocaltea i2s0_8ch_p0_0: endpoint { 15755529fe3SCristian Ciocaltea dai-format = "i2s"; 15855529fe3SCristian Ciocaltea mclk-fs = <256>; 15955529fe3SCristian Ciocaltea remote-endpoint = <&es8316_p0_0>; 16055529fe3SCristian Ciocaltea }; 16155529fe3SCristian Ciocaltea }; 16255529fe3SCristian Ciocaltea}; 16355529fe3SCristian Ciocaltea 1641e9c2404SShreeya Patel&pinctrl { 1651e9c2404SShreeya Patel hym8563 { 1661e9c2404SShreeya Patel hym8563_int: hym8563-int { 1671e9c2404SShreeya Patel rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 1681e9c2404SShreeya Patel }; 1691e9c2404SShreeya Patel }; 17055529fe3SCristian Ciocaltea 17155529fe3SCristian Ciocaltea sound { 17255529fe3SCristian Ciocaltea hp_detect: hp-detect { 17355529fe3SCristian Ciocaltea rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; 17455529fe3SCristian Ciocaltea }; 17555529fe3SCristian Ciocaltea }; 1761e9c2404SShreeya Patel}; 1771e9c2404SShreeya Patel 178f36bb176SCristian Ciocaltea&pwm1 { 179f36bb176SCristian Ciocaltea status = "okay"; 180f36bb176SCristian Ciocaltea}; 181f36bb176SCristian Ciocaltea 182a1d32814SChristopher Obbard&sdhci { 183a1d32814SChristopher Obbard bus-width = <8>; 184a1d32814SChristopher Obbard no-sdio; 185a1d32814SChristopher Obbard no-sd; 186a1d32814SChristopher Obbard non-removable; 187a1d32814SChristopher Obbard max-frequency = <200000000>; 188a1d32814SChristopher Obbard mmc-hs400-1_8v; 189a1d32814SChristopher Obbard mmc-hs400-enhanced-strobe; 190a1d32814SChristopher Obbard status = "okay"; 191a1d32814SChristopher Obbard}; 192a1d32814SChristopher Obbard 193a1d32814SChristopher Obbard&uart2 { 194a1d32814SChristopher Obbard pinctrl-0 = <&uart2m0_xfer>; 195a1d32814SChristopher Obbard status = "okay"; 196a1d32814SChristopher Obbard}; 197