1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/pinctrl/rockchip.h> 11#include "rk3588.dtsi" 12 13/ { 14 model = "Rockchip RK3588 EVB1 V10 Board"; 15 compatible = "rockchip,rk3588-evb1-v10", "rockchip,rk3588"; 16 17 aliases { 18 mmc0 = &sdhci; 19 serial2 = &uart2; 20 }; 21 22 chosen { 23 stdout-path = "serial2:1500000n8"; 24 }; 25 26 backlight: backlight { 27 compatible = "pwm-backlight"; 28 power-supply = <&vcc12v_dcin>; 29 pwms = <&pwm2 0 25000 0>; 30 }; 31 32 vcc12v_dcin: vcc12v-dcin-regulator { 33 compatible = "regulator-fixed"; 34 regulator-name = "vcc12v_dcin"; 35 regulator-always-on; 36 regulator-boot-on; 37 regulator-min-microvolt = <12000000>; 38 regulator-max-microvolt = <12000000>; 39 }; 40 41 vcc5v0_sys: vcc5v0-sys-regulator { 42 compatible = "regulator-fixed"; 43 regulator-name = "vcc5v0_sys"; 44 regulator-always-on; 45 regulator-boot-on; 46 regulator-min-microvolt = <5000000>; 47 regulator-max-microvolt = <5000000>; 48 vin-supply = <&vcc12v_dcin>; 49 }; 50}; 51 52&cpu_b0 { 53 cpu-supply = <&vdd_cpu_big0_s0>; 54}; 55 56&cpu_b1 { 57 cpu-supply = <&vdd_cpu_big0_s0>; 58}; 59 60&cpu_b2 { 61 cpu-supply = <&vdd_cpu_big1_s0>; 62}; 63 64&cpu_b3 { 65 cpu-supply = <&vdd_cpu_big1_s0>; 66}; 67 68&cpu_l0 { 69 cpu-supply = <&vdd_cpu_lit_s0>; 70}; 71 72&cpu_l1 { 73 cpu-supply = <&vdd_cpu_lit_s0>; 74}; 75 76&cpu_l2 { 77 cpu-supply = <&vdd_cpu_lit_s0>; 78}; 79 80&cpu_l3 { 81 cpu-supply = <&vdd_cpu_lit_s0>; 82}; 83 84&gmac0 { 85 clock_in_out = "output"; 86 phy-handle = <&rgmii_phy>; 87 phy-mode = "rgmii-rxid"; 88 pinctrl-0 = <&gmac0_miim 89 &gmac0_tx_bus2 90 &gmac0_rx_bus2 91 &gmac0_rgmii_clk 92 &gmac0_rgmii_bus>; 93 pinctrl-names = "default"; 94 rx_delay = <0x00>; 95 tx_delay = <0x43>; 96 status = "okay"; 97}; 98 99&i2c2 { 100 status = "okay"; 101 102 hym8563: rtc@51 { 103 compatible = "haoyu,hym8563"; 104 reg = <0x51>; 105 #clock-cells = <0>; 106 clock-output-names = "hym8563"; 107 pinctrl-names = "default"; 108 pinctrl-0 = <&hym8563_int>; 109 interrupt-parent = <&gpio0>; 110 interrupts = <RK_PD4 IRQ_TYPE_LEVEL_LOW>; 111 wakeup-source; 112 }; 113}; 114 115&mdio0 { 116 rgmii_phy: ethernet-phy@1 { 117 /* RTL8211F */ 118 compatible = "ethernet-phy-id001c.c916"; 119 reg = <0x1>; 120 pinctrl-names = "default"; 121 pinctrl-0 = <&rtl8211f_rst>; 122 reset-assert-us = <20000>; 123 reset-deassert-us = <100000>; 124 reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>; 125 }; 126}; 127 128&pinctrl { 129 rtl8211f { 130 rtl8211f_rst: rtl8211f-rst { 131 rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 132 }; 133 134 }; 135 136 hym8563 { 137 hym8563_int: hym8563-int { 138 rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; 139 }; 140 }; 141}; 142 143&pwm2 { 144 status = "okay"; 145}; 146 147&sdhci { 148 bus-width = <8>; 149 no-sdio; 150 no-sd; 151 non-removable; 152 max-frequency = <200000000>; 153 mmc-hs400-1_8v; 154 mmc-hs400-enhanced-strobe; 155 status = "okay"; 156}; 157 158&spi2 { 159 status = "okay"; 160 assigned-clocks = <&cru CLK_SPI2>; 161 assigned-clock-rates = <200000000>; 162 num-cs = <2>; 163 164 pmic@0 { 165 compatible = "rockchip,rk806"; 166 reg = <0x0>; 167 #gpio-cells = <2>; 168 gpio-controller; 169 interrupt-parent = <&gpio0>; 170 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 171 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 172 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 173 pinctrl-names = "default"; 174 spi-max-frequency = <1000000>; 175 176 vcc1-supply = <&vcc5v0_sys>; 177 vcc2-supply = <&vcc5v0_sys>; 178 vcc3-supply = <&vcc5v0_sys>; 179 vcc4-supply = <&vcc5v0_sys>; 180 vcc5-supply = <&vcc5v0_sys>; 181 vcc6-supply = <&vcc5v0_sys>; 182 vcc7-supply = <&vcc5v0_sys>; 183 vcc8-supply = <&vcc5v0_sys>; 184 vcc9-supply = <&vcc5v0_sys>; 185 vcc10-supply = <&vcc5v0_sys>; 186 vcc11-supply = <&vcc_2v0_pldo_s3>; 187 vcc12-supply = <&vcc5v0_sys>; 188 vcc13-supply = <&vcc5v0_sys>; 189 vcc14-supply = <&vcc_1v1_nldo_s3>; 190 vcca-supply = <&vcc5v0_sys>; 191 192 rk806_dvs1_null: dvs1-null-pins { 193 pins = "gpio_pwrctrl1"; 194 function = "pin_fun0"; 195 }; 196 197 rk806_dvs2_null: dvs2-null-pins { 198 pins = "gpio_pwrctrl2"; 199 function = "pin_fun0"; 200 }; 201 202 rk806_dvs3_null: dvs3-null-pins { 203 pins = "gpio_pwrctrl3"; 204 function = "pin_fun0"; 205 }; 206 207 208 regulators { 209 vdd_gpu_s0: dcdc-reg1 { 210 regulator-boot-on; 211 regulator-min-microvolt = <550000>; 212 regulator-max-microvolt = <950000>; 213 regulator-ramp-delay = <12500>; 214 regulator-name = "vdd_gpu_s0"; 215 regulator-enable-ramp-delay = <400>; 216 regulator-state-mem { 217 regulator-off-in-suspend; 218 }; 219 }; 220 221 vdd_npu_s0: dcdc-reg2 { 222 regulator-always-on; 223 regulator-boot-on; 224 regulator-min-microvolt = <550000>; 225 regulator-max-microvolt = <950000>; 226 regulator-ramp-delay = <12500>; 227 regulator-name = "vdd_npu_s0"; 228 regulator-state-mem { 229 regulator-off-in-suspend; 230 }; 231 }; 232 233 vdd_log_s0: dcdc-reg3 { 234 regulator-always-on; 235 regulator-boot-on; 236 regulator-min-microvolt = <675000>; 237 regulator-max-microvolt = <750000>; 238 regulator-ramp-delay = <12500>; 239 regulator-name = "vdd_log_s0"; 240 regulator-state-mem { 241 regulator-off-in-suspend; 242 regulator-suspend-microvolt = <750000>; 243 }; 244 }; 245 246 vdd_vdenc_s0: dcdc-reg4 { 247 regulator-always-on; 248 regulator-boot-on; 249 regulator-min-microvolt = <550000>; 250 regulator-max-microvolt = <950000>; 251 regulator-ramp-delay = <12500>; 252 regulator-name = "vdd_vdenc_s0"; 253 regulator-state-mem { 254 regulator-off-in-suspend; 255 }; 256 257 }; 258 259 vdd_gpu_mem_s0: dcdc-reg5 { 260 regulator-boot-on; 261 regulator-min-microvolt = <675000>; 262 regulator-max-microvolt = <950000>; 263 regulator-ramp-delay = <12500>; 264 regulator-enable-ramp-delay = <400>; 265 regulator-name = "vdd_gpu_mem_s0"; 266 regulator-state-mem { 267 regulator-off-in-suspend; 268 }; 269 270 }; 271 272 vdd_npu_mem_s0: dcdc-reg6 { 273 regulator-always-on; 274 regulator-boot-on; 275 regulator-min-microvolt = <675000>; 276 regulator-max-microvolt = <950000>; 277 regulator-ramp-delay = <12500>; 278 regulator-name = "vdd_npu_mem_s0"; 279 regulator-state-mem { 280 regulator-off-in-suspend; 281 }; 282 283 }; 284 285 vcc_2v0_pldo_s3: dcdc-reg7 { 286 regulator-always-on; 287 regulator-boot-on; 288 regulator-min-microvolt = <2000000>; 289 regulator-max-microvolt = <2000000>; 290 regulator-ramp-delay = <12500>; 291 regulator-name = "vdd_2v0_pldo_s3"; 292 regulator-state-mem { 293 regulator-on-in-suspend; 294 regulator-suspend-microvolt = <2000000>; 295 }; 296 }; 297 298 vdd_vdenc_mem_s0: dcdc-reg8 { 299 regulator-always-on; 300 regulator-boot-on; 301 regulator-min-microvolt = <675000>; 302 regulator-max-microvolt = <950000>; 303 regulator-ramp-delay = <12500>; 304 regulator-name = "vdd_vdenc_mem_s0"; 305 regulator-state-mem { 306 regulator-off-in-suspend; 307 }; 308 }; 309 310 vdd2_ddr_s3: dcdc-reg9 { 311 regulator-always-on; 312 regulator-boot-on; 313 regulator-name = "vdd2_ddr_s3"; 314 regulator-state-mem { 315 regulator-on-in-suspend; 316 }; 317 }; 318 319 vcc_1v1_nldo_s3: dcdc-reg10 { 320 regulator-always-on; 321 regulator-boot-on; 322 regulator-min-microvolt = <1100000>; 323 regulator-max-microvolt = <1100000>; 324 regulator-ramp-delay = <12500>; 325 regulator-name = "vcc_1v1_nldo_s3"; 326 regulator-state-mem { 327 regulator-on-in-suspend; 328 regulator-suspend-microvolt = <1100000>; 329 }; 330 }; 331 332 avcc_1v8_s0: pldo-reg1 { 333 regulator-always-on; 334 regulator-boot-on; 335 regulator-min-microvolt = <1800000>; 336 regulator-max-microvolt = <1800000>; 337 regulator-ramp-delay = <12500>; 338 regulator-name = "avcc_1v8_s0"; 339 regulator-state-mem { 340 regulator-off-in-suspend; 341 }; 342 }; 343 344 vdd1_1v8_ddr_s3: pldo-reg2 { 345 regulator-always-on; 346 regulator-boot-on; 347 regulator-min-microvolt = <1800000>; 348 regulator-max-microvolt = <1800000>; 349 regulator-ramp-delay = <12500>; 350 regulator-name = "vdd1_1v8_ddr_s3"; 351 regulator-state-mem { 352 regulator-on-in-suspend; 353 regulator-suspend-microvolt = <1800000>; 354 }; 355 }; 356 357 avcc_1v8_codec_s0: pldo-reg3 { 358 regulator-always-on; 359 regulator-boot-on; 360 regulator-min-microvolt = <1800000>; 361 regulator-max-microvolt = <1800000>; 362 regulator-ramp-delay = <12500>; 363 regulator-name = "avcc_1v8_codec_s0"; 364 regulator-state-mem { 365 regulator-off-in-suspend; 366 }; 367 }; 368 369 vcc_3v3_s3: pldo-reg4 { 370 regulator-always-on; 371 regulator-boot-on; 372 regulator-min-microvolt = <3300000>; 373 regulator-max-microvolt = <3300000>; 374 regulator-ramp-delay = <12500>; 375 regulator-name = "vcc_3v3_s3"; 376 regulator-state-mem { 377 regulator-on-in-suspend; 378 regulator-suspend-microvolt = <3300000>; 379 }; 380 }; 381 382 vccio_sd_s0: pldo-reg5 { 383 regulator-always-on; 384 regulator-boot-on; 385 regulator-min-microvolt = <1800000>; 386 regulator-max-microvolt = <3300000>; 387 regulator-ramp-delay = <12500>; 388 regulator-name = "vccio_sd_s0"; 389 regulator-state-mem { 390 regulator-off-in-suspend; 391 }; 392 }; 393 394 vccio_1v8_s3: pldo-reg6 { 395 regulator-always-on; 396 regulator-boot-on; 397 regulator-min-microvolt = <1800000>; 398 regulator-max-microvolt = <1800000>; 399 regulator-ramp-delay = <12500>; 400 regulator-name = "vccio_1v8_s3"; 401 regulator-state-mem { 402 regulator-on-in-suspend; 403 regulator-suspend-microvolt = <1800000>; 404 }; 405 }; 406 407 vdd_0v75_s3: nldo-reg1 { 408 regulator-always-on; 409 regulator-boot-on; 410 regulator-min-microvolt = <750000>; 411 regulator-max-microvolt = <750000>; 412 regulator-ramp-delay = <12500>; 413 regulator-name = "vdd_0v75_s3"; 414 regulator-state-mem { 415 regulator-on-in-suspend; 416 regulator-suspend-microvolt = <750000>; 417 }; 418 }; 419 420 vdd2l_0v9_ddr_s3: nldo-reg2 { 421 regulator-always-on; 422 regulator-boot-on; 423 regulator-min-microvolt = <900000>; 424 regulator-max-microvolt = <900000>; 425 regulator-name = "vdd2l_0v9_ddr_s3"; 426 regulator-state-mem { 427 regulator-on-in-suspend; 428 regulator-suspend-microvolt = <900000>; 429 }; 430 }; 431 432 vdd_0v75_hdmi_edp_s0: nldo-reg3 { 433 regulator-always-on; 434 regulator-boot-on; 435 regulator-min-microvolt = <750000>; 436 regulator-max-microvolt = <750000>; 437 regulator-name = "vdd_0v75_hdmi_edp_s0"; 438 regulator-state-mem { 439 regulator-off-in-suspend; 440 }; 441 }; 442 443 avdd_0v75_s0: nldo-reg4 { 444 regulator-always-on; 445 regulator-boot-on; 446 regulator-min-microvolt = <750000>; 447 regulator-max-microvolt = <750000>; 448 regulator-name = "avdd_0v75_s0"; 449 regulator-state-mem { 450 regulator-off-in-suspend; 451 }; 452 }; 453 454 vdd_0v85_s0: nldo-reg5 { 455 regulator-always-on; 456 regulator-boot-on; 457 regulator-min-microvolt = <850000>; 458 regulator-max-microvolt = <850000>; 459 regulator-name = "vdd_0v85_s0"; 460 regulator-state-mem { 461 regulator-off-in-suspend; 462 }; 463 }; 464 }; 465 }; 466 467 pmic@1 { 468 compatible = "rockchip,rk806"; 469 reg = <0x01>; 470 #gpio-cells = <2>; 471 gpio-controller; 472 interrupt-parent = <&gpio0>; 473 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 474 pinctrl-0 = <&rk806_slave_dvs1_null>, <&rk806_slave_dvs2_null>, 475 <&rk806_slave_dvs3_null>; 476 pinctrl-names = "default"; 477 spi-max-frequency = <1000000>; 478 479 vcc1-supply = <&vcc5v0_sys>; 480 vcc2-supply = <&vcc5v0_sys>; 481 vcc3-supply = <&vcc5v0_sys>; 482 vcc4-supply = <&vcc5v0_sys>; 483 vcc5-supply = <&vcc5v0_sys>; 484 vcc6-supply = <&vcc5v0_sys>; 485 vcc7-supply = <&vcc5v0_sys>; 486 vcc8-supply = <&vcc5v0_sys>; 487 vcc9-supply = <&vcc5v0_sys>; 488 vcc10-supply = <&vcc5v0_sys>; 489 vcc11-supply = <&vcc_2v0_pldo_s3>; 490 vcc12-supply = <&vcc5v0_sys>; 491 vcc13-supply = <&vcc_1v1_nldo_s3>; 492 vcc14-supply = <&vcc_2v0_pldo_s3>; 493 vcca-supply = <&vcc5v0_sys>; 494 495 rk806_slave_dvs1_null: dvs1-null-pins { 496 pins = "gpio_pwrctrl1"; 497 function = "pin_fun0"; 498 }; 499 500 rk806_slave_dvs2_null: dvs2-null-pins { 501 pins = "gpio_pwrctrl2"; 502 function = "pin_fun0"; 503 }; 504 505 rk806_slave_dvs3_null: dvs3-null-pins { 506 pins = "gpio_pwrctrl3"; 507 function = "pin_fun0"; 508 }; 509 510 regulators { 511 vdd_cpu_big1_s0: dcdc-reg1 { 512 regulator-always-on; 513 regulator-boot-on; 514 regulator-min-microvolt = <550000>; 515 regulator-max-microvolt = <1050000>; 516 regulator-ramp-delay = <12500>; 517 regulator-name = "vdd_cpu_big1_s0"; 518 regulator-state-mem { 519 regulator-off-in-suspend; 520 }; 521 }; 522 523 vdd_cpu_big0_s0: dcdc-reg2 { 524 regulator-always-on; 525 regulator-boot-on; 526 regulator-min-microvolt = <550000>; 527 regulator-max-microvolt = <1050000>; 528 regulator-ramp-delay = <12500>; 529 regulator-name = "vdd_cpu_big0_s0"; 530 regulator-state-mem { 531 regulator-off-in-suspend; 532 }; 533 }; 534 535 vdd_cpu_lit_s0: dcdc-reg3 { 536 regulator-always-on; 537 regulator-boot-on; 538 regulator-min-microvolt = <550000>; 539 regulator-max-microvolt = <950000>; 540 regulator-ramp-delay = <12500>; 541 regulator-name = "vdd_cpu_lit_s0"; 542 regulator-state-mem { 543 regulator-off-in-suspend; 544 }; 545 }; 546 547 vcc_3v3_s0: dcdc-reg4 { 548 regulator-always-on; 549 regulator-boot-on; 550 regulator-min-microvolt = <3300000>; 551 regulator-max-microvolt = <3300000>; 552 regulator-ramp-delay = <12500>; 553 regulator-name = "vcc_3v3_s0"; 554 regulator-state-mem { 555 regulator-off-in-suspend; 556 }; 557 }; 558 559 vdd_cpu_big1_mem_s0: dcdc-reg5 { 560 regulator-always-on; 561 regulator-boot-on; 562 regulator-min-microvolt = <675000>; 563 regulator-max-microvolt = <1050000>; 564 regulator-ramp-delay = <12500>; 565 regulator-name = "vdd_cpu_big1_mem_s0"; 566 regulator-state-mem { 567 regulator-off-in-suspend; 568 }; 569 }; 570 571 572 vdd_cpu_big0_mem_s0: dcdc-reg6 { 573 regulator-always-on; 574 regulator-boot-on; 575 regulator-min-microvolt = <675000>; 576 regulator-max-microvolt = <1050000>; 577 regulator-ramp-delay = <12500>; 578 regulator-name = "vdd_cpu_big0_mem_s0"; 579 regulator-state-mem { 580 regulator-off-in-suspend; 581 }; 582 }; 583 584 vcc_1v8_s0: dcdc-reg7 { 585 regulator-always-on; 586 regulator-boot-on; 587 regulator-min-microvolt = <1800000>; 588 regulator-max-microvolt = <1800000>; 589 regulator-ramp-delay = <12500>; 590 regulator-name = "vcc_1v8_s0"; 591 regulator-state-mem { 592 regulator-off-in-suspend; 593 }; 594 }; 595 596 vdd_cpu_lit_mem_s0: dcdc-reg8 { 597 regulator-always-on; 598 regulator-boot-on; 599 regulator-min-microvolt = <675000>; 600 regulator-max-microvolt = <950000>; 601 regulator-ramp-delay = <12500>; 602 regulator-name = "vdd_cpu_lit_mem_s0"; 603 regulator-state-mem { 604 regulator-off-in-suspend; 605 }; 606 }; 607 608 vddq_ddr_s0: dcdc-reg9 { 609 regulator-always-on; 610 regulator-boot-on; 611 regulator-name = "vddq_ddr_s0"; 612 regulator-state-mem { 613 regulator-off-in-suspend; 614 }; 615 }; 616 617 vdd_ddr_s0: dcdc-reg10 { 618 regulator-always-on; 619 regulator-boot-on; 620 regulator-min-microvolt = <675000>; 621 regulator-max-microvolt = <900000>; 622 regulator-ramp-delay = <12500>; 623 regulator-name = "vdd_ddr_s0"; 624 regulator-state-mem { 625 regulator-off-in-suspend; 626 }; 627 }; 628 629 vcc_1v8_cam_s0: pldo-reg1 { 630 regulator-always-on; 631 regulator-boot-on; 632 regulator-min-microvolt = <1800000>; 633 regulator-max-microvolt = <1800000>; 634 regulator-ramp-delay = <12500>; 635 regulator-name = "vcc_1v8_cam_s0"; 636 regulator-state-mem { 637 regulator-off-in-suspend; 638 }; 639 }; 640 641 avdd1v8_ddr_pll_s0: pldo-reg2 { 642 regulator-always-on; 643 regulator-boot-on; 644 regulator-min-microvolt = <1800000>; 645 regulator-max-microvolt = <1800000>; 646 regulator-ramp-delay = <12500>; 647 regulator-name = "avdd1v8_ddr_pll_s0"; 648 regulator-state-mem { 649 regulator-off-in-suspend; 650 }; 651 }; 652 653 vdd_1v8_pll_s0: pldo-reg3 { 654 regulator-always-on; 655 regulator-boot-on; 656 regulator-min-microvolt = <1800000>; 657 regulator-max-microvolt = <1800000>; 658 regulator-ramp-delay = <12500>; 659 regulator-name = "vdd_1v8_pll_s0"; 660 regulator-state-mem { 661 regulator-off-in-suspend; 662 }; 663 }; 664 665 vcc_3v3_sd_s0: pldo-reg4 { 666 regulator-always-on; 667 regulator-boot-on; 668 regulator-min-microvolt = <3300000>; 669 regulator-max-microvolt = <3300000>; 670 regulator-ramp-delay = <12500>; 671 regulator-name = "vcc_3v3_sd_s0"; 672 regulator-state-mem { 673 regulator-off-in-suspend; 674 }; 675 }; 676 677 vcc_2v8_cam_s0: pldo-reg5 { 678 regulator-always-on; 679 regulator-boot-on; 680 regulator-min-microvolt = <2800000>; 681 regulator-max-microvolt = <2800000>; 682 regulator-ramp-delay = <12500>; 683 regulator-name = "vcc_2v8_cam_s0"; 684 regulator-state-mem { 685 regulator-off-in-suspend; 686 }; 687 }; 688 689 pldo6_s3: pldo-reg6 { 690 regulator-always-on; 691 regulator-boot-on; 692 regulator-min-microvolt = <1800000>; 693 regulator-max-microvolt = <1800000>; 694 regulator-name = "pldo6_s3"; 695 regulator-state-mem { 696 regulator-on-in-suspend; 697 regulator-suspend-microvolt = <1800000>; 698 }; 699 }; 700 701 vdd_0v75_pll_s0: nldo-reg1 { 702 regulator-always-on; 703 regulator-boot-on; 704 regulator-min-microvolt = <750000>; 705 regulator-max-microvolt = <750000>; 706 regulator-ramp-delay = <12500>; 707 regulator-name = "vdd_0v75_pll_s0"; 708 regulator-state-mem { 709 regulator-off-in-suspend; 710 }; 711 }; 712 713 vdd_ddr_pll_s0: nldo-reg2 { 714 regulator-always-on; 715 regulator-boot-on; 716 regulator-min-microvolt = <850000>; 717 regulator-max-microvolt = <850000>; 718 regulator-name = "vdd_ddr_pll_s0"; 719 regulator-state-mem { 720 regulator-off-in-suspend; 721 }; 722 }; 723 724 avdd_0v85_s0: nldo-reg3 { 725 regulator-always-on; 726 regulator-boot-on; 727 regulator-min-microvolt = <850000>; 728 regulator-max-microvolt = <850000>; 729 regulator-ramp-delay = <12500>; 730 regulator-name = "avdd_0v85_s0"; 731 regulator-state-mem { 732 regulator-off-in-suspend; 733 }; 734 }; 735 736 avdd_1v2_cam_s0: nldo-reg4 { 737 regulator-always-on; 738 regulator-boot-on; 739 regulator-min-microvolt = <1200000>; 740 regulator-max-microvolt = <1200000>; 741 regulator-ramp-delay = <12500>; 742 regulator-name = "avdd_1v2_cam_s0"; 743 regulator-state-mem { 744 regulator-off-in-suspend; 745 }; 746 }; 747 748 avdd_1v2_s0: nldo-reg5 { 749 regulator-always-on; 750 regulator-boot-on; 751 regulator-min-microvolt = <1200000>; 752 regulator-max-microvolt = <1200000>; 753 regulator-ramp-delay = <12500>; 754 regulator-name = "avdd_1v2_s0"; 755 regulator-state-mem { 756 regulator-off-in-suspend; 757 }; 758 }; 759 }; 760 }; 761}; 762 763&uart2 { 764 pinctrl-0 = <&uart2m0_xfer>; 765 status = "okay"; 766}; 767