1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/pinctrl/rockchip.h> 11#include "rk3588.dtsi" 12 13/ { 14 model = "Rockchip RK3588 EVB1 V10 Board"; 15 compatible = "rockchip,rk3588-evb1-v10", "rockchip,rk3588"; 16 17 aliases { 18 mmc0 = &sdhci; 19 serial2 = &uart2; 20 }; 21 22 chosen { 23 stdout-path = "serial2:1500000n8"; 24 }; 25 26 backlight: backlight { 27 compatible = "pwm-backlight"; 28 power-supply = <&vcc12v_dcin>; 29 pwms = <&pwm2 0 25000 0>; 30 }; 31 32 vcc12v_dcin: vcc12v-dcin-regulator { 33 compatible = "regulator-fixed"; 34 regulator-name = "vcc12v_dcin"; 35 regulator-always-on; 36 regulator-boot-on; 37 regulator-min-microvolt = <12000000>; 38 regulator-max-microvolt = <12000000>; 39 }; 40 41 vcc5v0_host: vcc5v0-host-regulator { 42 compatible = "regulator-fixed"; 43 regulator-name = "vcc5v0_host"; 44 regulator-boot-on; 45 regulator-always-on; 46 regulator-min-microvolt = <5000000>; 47 regulator-max-microvolt = <5000000>; 48 enable-active-high; 49 gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; 50 pinctrl-names = "default"; 51 pinctrl-0 = <&vcc5v0_host_en>; 52 vin-supply = <&vcc5v0_usb>; 53 }; 54 55 vcc5v0_sys: vcc5v0-sys-regulator { 56 compatible = "regulator-fixed"; 57 regulator-name = "vcc5v0_sys"; 58 regulator-always-on; 59 regulator-boot-on; 60 regulator-min-microvolt = <5000000>; 61 regulator-max-microvolt = <5000000>; 62 vin-supply = <&vcc12v_dcin>; 63 }; 64 65 vcc5v0_usbdcin: vcc5v0-usbdcin-regulator { 66 compatible = "regulator-fixed"; 67 regulator-name = "vcc5v0_usbdcin"; 68 regulator-always-on; 69 regulator-boot-on; 70 regulator-min-microvolt = <5000000>; 71 regulator-max-microvolt = <5000000>; 72 vin-supply = <&vcc12v_dcin>; 73 }; 74 75 vcc5v0_usb: vcc5v0-usb-regulator { 76 compatible = "regulator-fixed"; 77 regulator-name = "vcc5v0_usb"; 78 regulator-always-on; 79 regulator-boot-on; 80 regulator-min-microvolt = <5000000>; 81 regulator-max-microvolt = <5000000>; 82 vin-supply = <&vcc5v0_usbdcin>; 83 }; 84}; 85 86&combphy0_ps { 87 status = "okay"; 88}; 89 90&cpu_b0 { 91 cpu-supply = <&vdd_cpu_big0_s0>; 92}; 93 94&cpu_b1 { 95 cpu-supply = <&vdd_cpu_big0_s0>; 96}; 97 98&cpu_b2 { 99 cpu-supply = <&vdd_cpu_big1_s0>; 100}; 101 102&cpu_b3 { 103 cpu-supply = <&vdd_cpu_big1_s0>; 104}; 105 106&cpu_l0 { 107 cpu-supply = <&vdd_cpu_lit_s0>; 108}; 109 110&cpu_l1 { 111 cpu-supply = <&vdd_cpu_lit_s0>; 112}; 113 114&cpu_l2 { 115 cpu-supply = <&vdd_cpu_lit_s0>; 116}; 117 118&cpu_l3 { 119 cpu-supply = <&vdd_cpu_lit_s0>; 120}; 121 122&gmac0 { 123 clock_in_out = "output"; 124 phy-handle = <&rgmii_phy>; 125 phy-mode = "rgmii-rxid"; 126 pinctrl-0 = <&gmac0_miim 127 &gmac0_tx_bus2 128 &gmac0_rx_bus2 129 &gmac0_rgmii_clk 130 &gmac0_rgmii_bus>; 131 pinctrl-names = "default"; 132 rx_delay = <0x00>; 133 tx_delay = <0x43>; 134 status = "okay"; 135}; 136 137&i2c2 { 138 status = "okay"; 139 140 hym8563: rtc@51 { 141 compatible = "haoyu,hym8563"; 142 reg = <0x51>; 143 #clock-cells = <0>; 144 clock-output-names = "hym8563"; 145 pinctrl-names = "default"; 146 pinctrl-0 = <&hym8563_int>; 147 interrupt-parent = <&gpio0>; 148 interrupts = <RK_PD4 IRQ_TYPE_LEVEL_LOW>; 149 wakeup-source; 150 }; 151}; 152 153&mdio0 { 154 rgmii_phy: ethernet-phy@1 { 155 /* RTL8211F */ 156 compatible = "ethernet-phy-id001c.c916"; 157 reg = <0x1>; 158 pinctrl-names = "default"; 159 pinctrl-0 = <&rtl8211f_rst>; 160 reset-assert-us = <20000>; 161 reset-deassert-us = <100000>; 162 reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>; 163 }; 164}; 165 166&pinctrl { 167 rtl8211f { 168 rtl8211f_rst: rtl8211f-rst { 169 rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 170 }; 171 172 }; 173 174 hym8563 { 175 hym8563_int: hym8563-int { 176 rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; 177 }; 178 }; 179 180 usb { 181 vcc5v0_host_en: vcc5v0-host-en { 182 rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 183 }; 184 }; 185}; 186 187&pwm2 { 188 status = "okay"; 189}; 190 191&sdhci { 192 bus-width = <8>; 193 no-sdio; 194 no-sd; 195 non-removable; 196 mmc-hs400-1_8v; 197 mmc-hs400-enhanced-strobe; 198 status = "okay"; 199}; 200 201&spi2 { 202 status = "okay"; 203 assigned-clocks = <&cru CLK_SPI2>; 204 assigned-clock-rates = <200000000>; 205 num-cs = <2>; 206 207 pmic@0 { 208 compatible = "rockchip,rk806"; 209 reg = <0x0>; 210 #gpio-cells = <2>; 211 gpio-controller; 212 interrupt-parent = <&gpio0>; 213 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 214 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 215 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 216 pinctrl-names = "default"; 217 spi-max-frequency = <1000000>; 218 219 vcc1-supply = <&vcc5v0_sys>; 220 vcc2-supply = <&vcc5v0_sys>; 221 vcc3-supply = <&vcc5v0_sys>; 222 vcc4-supply = <&vcc5v0_sys>; 223 vcc5-supply = <&vcc5v0_sys>; 224 vcc6-supply = <&vcc5v0_sys>; 225 vcc7-supply = <&vcc5v0_sys>; 226 vcc8-supply = <&vcc5v0_sys>; 227 vcc9-supply = <&vcc5v0_sys>; 228 vcc10-supply = <&vcc5v0_sys>; 229 vcc11-supply = <&vcc_2v0_pldo_s3>; 230 vcc12-supply = <&vcc5v0_sys>; 231 vcc13-supply = <&vcc5v0_sys>; 232 vcc14-supply = <&vcc_1v1_nldo_s3>; 233 vcca-supply = <&vcc5v0_sys>; 234 235 rk806_dvs1_null: dvs1-null-pins { 236 pins = "gpio_pwrctrl1"; 237 function = "pin_fun0"; 238 }; 239 240 rk806_dvs2_null: dvs2-null-pins { 241 pins = "gpio_pwrctrl2"; 242 function = "pin_fun0"; 243 }; 244 245 rk806_dvs3_null: dvs3-null-pins { 246 pins = "gpio_pwrctrl3"; 247 function = "pin_fun0"; 248 }; 249 250 251 regulators { 252 vdd_gpu_s0: dcdc-reg1 { 253 regulator-boot-on; 254 regulator-min-microvolt = <550000>; 255 regulator-max-microvolt = <950000>; 256 regulator-ramp-delay = <12500>; 257 regulator-name = "vdd_gpu_s0"; 258 regulator-enable-ramp-delay = <400>; 259 regulator-state-mem { 260 regulator-off-in-suspend; 261 }; 262 }; 263 264 vdd_npu_s0: dcdc-reg2 { 265 regulator-always-on; 266 regulator-boot-on; 267 regulator-min-microvolt = <550000>; 268 regulator-max-microvolt = <950000>; 269 regulator-ramp-delay = <12500>; 270 regulator-name = "vdd_npu_s0"; 271 regulator-state-mem { 272 regulator-off-in-suspend; 273 }; 274 }; 275 276 vdd_log_s0: dcdc-reg3 { 277 regulator-always-on; 278 regulator-boot-on; 279 regulator-min-microvolt = <675000>; 280 regulator-max-microvolt = <750000>; 281 regulator-ramp-delay = <12500>; 282 regulator-name = "vdd_log_s0"; 283 regulator-state-mem { 284 regulator-off-in-suspend; 285 regulator-suspend-microvolt = <750000>; 286 }; 287 }; 288 289 vdd_vdenc_s0: dcdc-reg4 { 290 regulator-always-on; 291 regulator-boot-on; 292 regulator-min-microvolt = <550000>; 293 regulator-max-microvolt = <950000>; 294 regulator-ramp-delay = <12500>; 295 regulator-name = "vdd_vdenc_s0"; 296 regulator-state-mem { 297 regulator-off-in-suspend; 298 }; 299 300 }; 301 302 vdd_gpu_mem_s0: dcdc-reg5 { 303 regulator-boot-on; 304 regulator-min-microvolt = <675000>; 305 regulator-max-microvolt = <950000>; 306 regulator-ramp-delay = <12500>; 307 regulator-enable-ramp-delay = <400>; 308 regulator-name = "vdd_gpu_mem_s0"; 309 regulator-state-mem { 310 regulator-off-in-suspend; 311 }; 312 313 }; 314 315 vdd_npu_mem_s0: dcdc-reg6 { 316 regulator-always-on; 317 regulator-boot-on; 318 regulator-min-microvolt = <675000>; 319 regulator-max-microvolt = <950000>; 320 regulator-ramp-delay = <12500>; 321 regulator-name = "vdd_npu_mem_s0"; 322 regulator-state-mem { 323 regulator-off-in-suspend; 324 }; 325 326 }; 327 328 vcc_2v0_pldo_s3: dcdc-reg7 { 329 regulator-always-on; 330 regulator-boot-on; 331 regulator-min-microvolt = <2000000>; 332 regulator-max-microvolt = <2000000>; 333 regulator-ramp-delay = <12500>; 334 regulator-name = "vdd_2v0_pldo_s3"; 335 regulator-state-mem { 336 regulator-on-in-suspend; 337 regulator-suspend-microvolt = <2000000>; 338 }; 339 }; 340 341 vdd_vdenc_mem_s0: dcdc-reg8 { 342 regulator-always-on; 343 regulator-boot-on; 344 regulator-min-microvolt = <675000>; 345 regulator-max-microvolt = <950000>; 346 regulator-ramp-delay = <12500>; 347 regulator-name = "vdd_vdenc_mem_s0"; 348 regulator-state-mem { 349 regulator-off-in-suspend; 350 }; 351 }; 352 353 vdd2_ddr_s3: dcdc-reg9 { 354 regulator-always-on; 355 regulator-boot-on; 356 regulator-name = "vdd2_ddr_s3"; 357 regulator-state-mem { 358 regulator-on-in-suspend; 359 }; 360 }; 361 362 vcc_1v1_nldo_s3: dcdc-reg10 { 363 regulator-always-on; 364 regulator-boot-on; 365 regulator-min-microvolt = <1100000>; 366 regulator-max-microvolt = <1100000>; 367 regulator-ramp-delay = <12500>; 368 regulator-name = "vcc_1v1_nldo_s3"; 369 regulator-state-mem { 370 regulator-on-in-suspend; 371 regulator-suspend-microvolt = <1100000>; 372 }; 373 }; 374 375 avcc_1v8_s0: pldo-reg1 { 376 regulator-always-on; 377 regulator-boot-on; 378 regulator-min-microvolt = <1800000>; 379 regulator-max-microvolt = <1800000>; 380 regulator-ramp-delay = <12500>; 381 regulator-name = "avcc_1v8_s0"; 382 regulator-state-mem { 383 regulator-off-in-suspend; 384 }; 385 }; 386 387 vdd1_1v8_ddr_s3: pldo-reg2 { 388 regulator-always-on; 389 regulator-boot-on; 390 regulator-min-microvolt = <1800000>; 391 regulator-max-microvolt = <1800000>; 392 regulator-ramp-delay = <12500>; 393 regulator-name = "vdd1_1v8_ddr_s3"; 394 regulator-state-mem { 395 regulator-on-in-suspend; 396 regulator-suspend-microvolt = <1800000>; 397 }; 398 }; 399 400 avcc_1v8_codec_s0: pldo-reg3 { 401 regulator-always-on; 402 regulator-boot-on; 403 regulator-min-microvolt = <1800000>; 404 regulator-max-microvolt = <1800000>; 405 regulator-ramp-delay = <12500>; 406 regulator-name = "avcc_1v8_codec_s0"; 407 regulator-state-mem { 408 regulator-off-in-suspend; 409 }; 410 }; 411 412 vcc_3v3_s3: pldo-reg4 { 413 regulator-always-on; 414 regulator-boot-on; 415 regulator-min-microvolt = <3300000>; 416 regulator-max-microvolt = <3300000>; 417 regulator-ramp-delay = <12500>; 418 regulator-name = "vcc_3v3_s3"; 419 regulator-state-mem { 420 regulator-on-in-suspend; 421 regulator-suspend-microvolt = <3300000>; 422 }; 423 }; 424 425 vccio_sd_s0: pldo-reg5 { 426 regulator-always-on; 427 regulator-boot-on; 428 regulator-min-microvolt = <1800000>; 429 regulator-max-microvolt = <3300000>; 430 regulator-ramp-delay = <12500>; 431 regulator-name = "vccio_sd_s0"; 432 regulator-state-mem { 433 regulator-off-in-suspend; 434 }; 435 }; 436 437 vccio_1v8_s3: pldo-reg6 { 438 regulator-always-on; 439 regulator-boot-on; 440 regulator-min-microvolt = <1800000>; 441 regulator-max-microvolt = <1800000>; 442 regulator-ramp-delay = <12500>; 443 regulator-name = "vccio_1v8_s3"; 444 regulator-state-mem { 445 regulator-on-in-suspend; 446 regulator-suspend-microvolt = <1800000>; 447 }; 448 }; 449 450 vdd_0v75_s3: nldo-reg1 { 451 regulator-always-on; 452 regulator-boot-on; 453 regulator-min-microvolt = <750000>; 454 regulator-max-microvolt = <750000>; 455 regulator-ramp-delay = <12500>; 456 regulator-name = "vdd_0v75_s3"; 457 regulator-state-mem { 458 regulator-on-in-suspend; 459 regulator-suspend-microvolt = <750000>; 460 }; 461 }; 462 463 vdd2l_0v9_ddr_s3: nldo-reg2 { 464 regulator-always-on; 465 regulator-boot-on; 466 regulator-min-microvolt = <900000>; 467 regulator-max-microvolt = <900000>; 468 regulator-name = "vdd2l_0v9_ddr_s3"; 469 regulator-state-mem { 470 regulator-on-in-suspend; 471 regulator-suspend-microvolt = <900000>; 472 }; 473 }; 474 475 vdd_0v75_hdmi_edp_s0: nldo-reg3 { 476 regulator-always-on; 477 regulator-boot-on; 478 regulator-min-microvolt = <750000>; 479 regulator-max-microvolt = <750000>; 480 regulator-name = "vdd_0v75_hdmi_edp_s0"; 481 regulator-state-mem { 482 regulator-off-in-suspend; 483 }; 484 }; 485 486 avdd_0v75_s0: nldo-reg4 { 487 regulator-always-on; 488 regulator-boot-on; 489 regulator-min-microvolt = <750000>; 490 regulator-max-microvolt = <750000>; 491 regulator-name = "avdd_0v75_s0"; 492 regulator-state-mem { 493 regulator-off-in-suspend; 494 }; 495 }; 496 497 vdd_0v85_s0: nldo-reg5 { 498 regulator-always-on; 499 regulator-boot-on; 500 regulator-min-microvolt = <850000>; 501 regulator-max-microvolt = <850000>; 502 regulator-name = "vdd_0v85_s0"; 503 regulator-state-mem { 504 regulator-off-in-suspend; 505 }; 506 }; 507 }; 508 }; 509 510 pmic@1 { 511 compatible = "rockchip,rk806"; 512 reg = <0x01>; 513 #gpio-cells = <2>; 514 gpio-controller; 515 interrupt-parent = <&gpio0>; 516 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 517 pinctrl-0 = <&rk806_slave_dvs1_null>, <&rk806_slave_dvs2_null>, 518 <&rk806_slave_dvs3_null>; 519 pinctrl-names = "default"; 520 spi-max-frequency = <1000000>; 521 522 vcc1-supply = <&vcc5v0_sys>; 523 vcc2-supply = <&vcc5v0_sys>; 524 vcc3-supply = <&vcc5v0_sys>; 525 vcc4-supply = <&vcc5v0_sys>; 526 vcc5-supply = <&vcc5v0_sys>; 527 vcc6-supply = <&vcc5v0_sys>; 528 vcc7-supply = <&vcc5v0_sys>; 529 vcc8-supply = <&vcc5v0_sys>; 530 vcc9-supply = <&vcc5v0_sys>; 531 vcc10-supply = <&vcc5v0_sys>; 532 vcc11-supply = <&vcc_2v0_pldo_s3>; 533 vcc12-supply = <&vcc5v0_sys>; 534 vcc13-supply = <&vcc_1v1_nldo_s3>; 535 vcc14-supply = <&vcc_2v0_pldo_s3>; 536 vcca-supply = <&vcc5v0_sys>; 537 538 rk806_slave_dvs1_null: dvs1-null-pins { 539 pins = "gpio_pwrctrl1"; 540 function = "pin_fun0"; 541 }; 542 543 rk806_slave_dvs2_null: dvs2-null-pins { 544 pins = "gpio_pwrctrl2"; 545 function = "pin_fun0"; 546 }; 547 548 rk806_slave_dvs3_null: dvs3-null-pins { 549 pins = "gpio_pwrctrl3"; 550 function = "pin_fun0"; 551 }; 552 553 regulators { 554 vdd_cpu_big1_s0: dcdc-reg1 { 555 regulator-always-on; 556 regulator-boot-on; 557 regulator-min-microvolt = <550000>; 558 regulator-max-microvolt = <1050000>; 559 regulator-ramp-delay = <12500>; 560 regulator-name = "vdd_cpu_big1_s0"; 561 regulator-state-mem { 562 regulator-off-in-suspend; 563 }; 564 }; 565 566 vdd_cpu_big0_s0: dcdc-reg2 { 567 regulator-always-on; 568 regulator-boot-on; 569 regulator-min-microvolt = <550000>; 570 regulator-max-microvolt = <1050000>; 571 regulator-ramp-delay = <12500>; 572 regulator-name = "vdd_cpu_big0_s0"; 573 regulator-state-mem { 574 regulator-off-in-suspend; 575 }; 576 }; 577 578 vdd_cpu_lit_s0: dcdc-reg3 { 579 regulator-always-on; 580 regulator-boot-on; 581 regulator-min-microvolt = <550000>; 582 regulator-max-microvolt = <950000>; 583 regulator-ramp-delay = <12500>; 584 regulator-name = "vdd_cpu_lit_s0"; 585 regulator-state-mem { 586 regulator-off-in-suspend; 587 }; 588 }; 589 590 vcc_3v3_s0: dcdc-reg4 { 591 regulator-always-on; 592 regulator-boot-on; 593 regulator-min-microvolt = <3300000>; 594 regulator-max-microvolt = <3300000>; 595 regulator-ramp-delay = <12500>; 596 regulator-name = "vcc_3v3_s0"; 597 regulator-state-mem { 598 regulator-off-in-suspend; 599 }; 600 }; 601 602 vdd_cpu_big1_mem_s0: dcdc-reg5 { 603 regulator-always-on; 604 regulator-boot-on; 605 regulator-min-microvolt = <675000>; 606 regulator-max-microvolt = <1050000>; 607 regulator-ramp-delay = <12500>; 608 regulator-name = "vdd_cpu_big1_mem_s0"; 609 regulator-state-mem { 610 regulator-off-in-suspend; 611 }; 612 }; 613 614 615 vdd_cpu_big0_mem_s0: dcdc-reg6 { 616 regulator-always-on; 617 regulator-boot-on; 618 regulator-min-microvolt = <675000>; 619 regulator-max-microvolt = <1050000>; 620 regulator-ramp-delay = <12500>; 621 regulator-name = "vdd_cpu_big0_mem_s0"; 622 regulator-state-mem { 623 regulator-off-in-suspend; 624 }; 625 }; 626 627 vcc_1v8_s0: dcdc-reg7 { 628 regulator-always-on; 629 regulator-boot-on; 630 regulator-min-microvolt = <1800000>; 631 regulator-max-microvolt = <1800000>; 632 regulator-ramp-delay = <12500>; 633 regulator-name = "vcc_1v8_s0"; 634 regulator-state-mem { 635 regulator-off-in-suspend; 636 }; 637 }; 638 639 vdd_cpu_lit_mem_s0: dcdc-reg8 { 640 regulator-always-on; 641 regulator-boot-on; 642 regulator-min-microvolt = <675000>; 643 regulator-max-microvolt = <950000>; 644 regulator-ramp-delay = <12500>; 645 regulator-name = "vdd_cpu_lit_mem_s0"; 646 regulator-state-mem { 647 regulator-off-in-suspend; 648 }; 649 }; 650 651 vddq_ddr_s0: dcdc-reg9 { 652 regulator-always-on; 653 regulator-boot-on; 654 regulator-name = "vddq_ddr_s0"; 655 regulator-state-mem { 656 regulator-off-in-suspend; 657 }; 658 }; 659 660 vdd_ddr_s0: dcdc-reg10 { 661 regulator-always-on; 662 regulator-boot-on; 663 regulator-min-microvolt = <675000>; 664 regulator-max-microvolt = <900000>; 665 regulator-ramp-delay = <12500>; 666 regulator-name = "vdd_ddr_s0"; 667 regulator-state-mem { 668 regulator-off-in-suspend; 669 }; 670 }; 671 672 vcc_1v8_cam_s0: pldo-reg1 { 673 regulator-always-on; 674 regulator-boot-on; 675 regulator-min-microvolt = <1800000>; 676 regulator-max-microvolt = <1800000>; 677 regulator-ramp-delay = <12500>; 678 regulator-name = "vcc_1v8_cam_s0"; 679 regulator-state-mem { 680 regulator-off-in-suspend; 681 }; 682 }; 683 684 avdd1v8_ddr_pll_s0: pldo-reg2 { 685 regulator-always-on; 686 regulator-boot-on; 687 regulator-min-microvolt = <1800000>; 688 regulator-max-microvolt = <1800000>; 689 regulator-ramp-delay = <12500>; 690 regulator-name = "avdd1v8_ddr_pll_s0"; 691 regulator-state-mem { 692 regulator-off-in-suspend; 693 }; 694 }; 695 696 vdd_1v8_pll_s0: pldo-reg3 { 697 regulator-always-on; 698 regulator-boot-on; 699 regulator-min-microvolt = <1800000>; 700 regulator-max-microvolt = <1800000>; 701 regulator-ramp-delay = <12500>; 702 regulator-name = "vdd_1v8_pll_s0"; 703 regulator-state-mem { 704 regulator-off-in-suspend; 705 }; 706 }; 707 708 vcc_3v3_sd_s0: pldo-reg4 { 709 regulator-always-on; 710 regulator-boot-on; 711 regulator-min-microvolt = <3300000>; 712 regulator-max-microvolt = <3300000>; 713 regulator-ramp-delay = <12500>; 714 regulator-name = "vcc_3v3_sd_s0"; 715 regulator-state-mem { 716 regulator-off-in-suspend; 717 }; 718 }; 719 720 vcc_2v8_cam_s0: pldo-reg5 { 721 regulator-always-on; 722 regulator-boot-on; 723 regulator-min-microvolt = <2800000>; 724 regulator-max-microvolt = <2800000>; 725 regulator-ramp-delay = <12500>; 726 regulator-name = "vcc_2v8_cam_s0"; 727 regulator-state-mem { 728 regulator-off-in-suspend; 729 }; 730 }; 731 732 pldo6_s3: pldo-reg6 { 733 regulator-always-on; 734 regulator-boot-on; 735 regulator-min-microvolt = <1800000>; 736 regulator-max-microvolt = <1800000>; 737 regulator-name = "pldo6_s3"; 738 regulator-state-mem { 739 regulator-on-in-suspend; 740 regulator-suspend-microvolt = <1800000>; 741 }; 742 }; 743 744 vdd_0v75_pll_s0: nldo-reg1 { 745 regulator-always-on; 746 regulator-boot-on; 747 regulator-min-microvolt = <750000>; 748 regulator-max-microvolt = <750000>; 749 regulator-ramp-delay = <12500>; 750 regulator-name = "vdd_0v75_pll_s0"; 751 regulator-state-mem { 752 regulator-off-in-suspend; 753 }; 754 }; 755 756 vdd_ddr_pll_s0: nldo-reg2 { 757 regulator-always-on; 758 regulator-boot-on; 759 regulator-min-microvolt = <850000>; 760 regulator-max-microvolt = <850000>; 761 regulator-name = "vdd_ddr_pll_s0"; 762 regulator-state-mem { 763 regulator-off-in-suspend; 764 }; 765 }; 766 767 avdd_0v85_s0: nldo-reg3 { 768 regulator-always-on; 769 regulator-boot-on; 770 regulator-min-microvolt = <850000>; 771 regulator-max-microvolt = <850000>; 772 regulator-ramp-delay = <12500>; 773 regulator-name = "avdd_0v85_s0"; 774 regulator-state-mem { 775 regulator-off-in-suspend; 776 }; 777 }; 778 779 avdd_1v2_cam_s0: nldo-reg4 { 780 regulator-always-on; 781 regulator-boot-on; 782 regulator-min-microvolt = <1200000>; 783 regulator-max-microvolt = <1200000>; 784 regulator-ramp-delay = <12500>; 785 regulator-name = "avdd_1v2_cam_s0"; 786 regulator-state-mem { 787 regulator-off-in-suspend; 788 }; 789 }; 790 791 avdd_1v2_s0: nldo-reg5 { 792 regulator-always-on; 793 regulator-boot-on; 794 regulator-min-microvolt = <1200000>; 795 regulator-max-microvolt = <1200000>; 796 regulator-ramp-delay = <12500>; 797 regulator-name = "avdd_1v2_s0"; 798 regulator-state-mem { 799 regulator-off-in-suspend; 800 }; 801 }; 802 }; 803 }; 804}; 805 806&sata0 { 807 status = "okay"; 808}; 809 810&u2phy2 { 811 status = "okay"; 812}; 813 814&u2phy2_host { 815 phy-supply = <&vcc5v0_host>; 816 status = "okay"; 817}; 818 819&u2phy3 { 820 status = "okay"; 821}; 822 823&u2phy3_host { 824 phy-supply = <&vcc5v0_host>; 825 status = "okay"; 826}; 827 828&uart2 { 829 pinctrl-0 = <&uart2m0_xfer>; 830 status = "okay"; 831}; 832 833&usb_host0_ehci { 834 status = "okay"; 835}; 836 837&usb_host0_ohci { 838 status = "okay"; 839}; 840 841&usb_host1_ehci { 842 status = "okay"; 843}; 844 845&usb_host1_ohci { 846 status = "okay"; 847}; 848