1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/pinctrl/rockchip.h> 11#include "rk3588.dtsi" 12 13/ { 14 model = "Rockchip RK3588 EVB1 V10 Board"; 15 compatible = "rockchip,rk3588-evb1-v10", "rockchip,rk3588"; 16 17 aliases { 18 mmc0 = &sdhci; 19 serial2 = &uart2; 20 }; 21 22 chosen { 23 stdout-path = "serial2:1500000n8"; 24 }; 25 26 backlight: backlight { 27 compatible = "pwm-backlight"; 28 power-supply = <&vcc12v_dcin>; 29 pwms = <&pwm2 0 25000 0>; 30 }; 31 32 vcc12v_dcin: vcc12v-dcin-regulator { 33 compatible = "regulator-fixed"; 34 regulator-name = "vcc12v_dcin"; 35 regulator-always-on; 36 regulator-boot-on; 37 regulator-min-microvolt = <12000000>; 38 regulator-max-microvolt = <12000000>; 39 }; 40 41 vcc5v0_sys: vcc5v0-sys-regulator { 42 compatible = "regulator-fixed"; 43 regulator-name = "vcc5v0_sys"; 44 regulator-always-on; 45 regulator-boot-on; 46 regulator-min-microvolt = <5000000>; 47 regulator-max-microvolt = <5000000>; 48 vin-supply = <&vcc12v_dcin>; 49 }; 50}; 51 52&combphy0_ps { 53 status = "okay"; 54}; 55 56&cpu_b0 { 57 cpu-supply = <&vdd_cpu_big0_s0>; 58}; 59 60&cpu_b1 { 61 cpu-supply = <&vdd_cpu_big0_s0>; 62}; 63 64&cpu_b2 { 65 cpu-supply = <&vdd_cpu_big1_s0>; 66}; 67 68&cpu_b3 { 69 cpu-supply = <&vdd_cpu_big1_s0>; 70}; 71 72&cpu_l0 { 73 cpu-supply = <&vdd_cpu_lit_s0>; 74}; 75 76&cpu_l1 { 77 cpu-supply = <&vdd_cpu_lit_s0>; 78}; 79 80&cpu_l2 { 81 cpu-supply = <&vdd_cpu_lit_s0>; 82}; 83 84&cpu_l3 { 85 cpu-supply = <&vdd_cpu_lit_s0>; 86}; 87 88&gmac0 { 89 clock_in_out = "output"; 90 phy-handle = <&rgmii_phy>; 91 phy-mode = "rgmii-rxid"; 92 pinctrl-0 = <&gmac0_miim 93 &gmac0_tx_bus2 94 &gmac0_rx_bus2 95 &gmac0_rgmii_clk 96 &gmac0_rgmii_bus>; 97 pinctrl-names = "default"; 98 rx_delay = <0x00>; 99 tx_delay = <0x43>; 100 status = "okay"; 101}; 102 103&i2c2 { 104 status = "okay"; 105 106 hym8563: rtc@51 { 107 compatible = "haoyu,hym8563"; 108 reg = <0x51>; 109 #clock-cells = <0>; 110 clock-output-names = "hym8563"; 111 pinctrl-names = "default"; 112 pinctrl-0 = <&hym8563_int>; 113 interrupt-parent = <&gpio0>; 114 interrupts = <RK_PD4 IRQ_TYPE_LEVEL_LOW>; 115 wakeup-source; 116 }; 117}; 118 119&mdio0 { 120 rgmii_phy: ethernet-phy@1 { 121 /* RTL8211F */ 122 compatible = "ethernet-phy-id001c.c916"; 123 reg = <0x1>; 124 pinctrl-names = "default"; 125 pinctrl-0 = <&rtl8211f_rst>; 126 reset-assert-us = <20000>; 127 reset-deassert-us = <100000>; 128 reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>; 129 }; 130}; 131 132&pinctrl { 133 rtl8211f { 134 rtl8211f_rst: rtl8211f-rst { 135 rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 136 }; 137 138 }; 139 140 hym8563 { 141 hym8563_int: hym8563-int { 142 rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; 143 }; 144 }; 145}; 146 147&pwm2 { 148 status = "okay"; 149}; 150 151&sdhci { 152 bus-width = <8>; 153 no-sdio; 154 no-sd; 155 non-removable; 156 mmc-hs400-1_8v; 157 mmc-hs400-enhanced-strobe; 158 status = "okay"; 159}; 160 161&spi2 { 162 status = "okay"; 163 assigned-clocks = <&cru CLK_SPI2>; 164 assigned-clock-rates = <200000000>; 165 num-cs = <2>; 166 167 pmic@0 { 168 compatible = "rockchip,rk806"; 169 reg = <0x0>; 170 #gpio-cells = <2>; 171 gpio-controller; 172 interrupt-parent = <&gpio0>; 173 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 174 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 175 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 176 pinctrl-names = "default"; 177 spi-max-frequency = <1000000>; 178 179 vcc1-supply = <&vcc5v0_sys>; 180 vcc2-supply = <&vcc5v0_sys>; 181 vcc3-supply = <&vcc5v0_sys>; 182 vcc4-supply = <&vcc5v0_sys>; 183 vcc5-supply = <&vcc5v0_sys>; 184 vcc6-supply = <&vcc5v0_sys>; 185 vcc7-supply = <&vcc5v0_sys>; 186 vcc8-supply = <&vcc5v0_sys>; 187 vcc9-supply = <&vcc5v0_sys>; 188 vcc10-supply = <&vcc5v0_sys>; 189 vcc11-supply = <&vcc_2v0_pldo_s3>; 190 vcc12-supply = <&vcc5v0_sys>; 191 vcc13-supply = <&vcc5v0_sys>; 192 vcc14-supply = <&vcc_1v1_nldo_s3>; 193 vcca-supply = <&vcc5v0_sys>; 194 195 rk806_dvs1_null: dvs1-null-pins { 196 pins = "gpio_pwrctrl1"; 197 function = "pin_fun0"; 198 }; 199 200 rk806_dvs2_null: dvs2-null-pins { 201 pins = "gpio_pwrctrl2"; 202 function = "pin_fun0"; 203 }; 204 205 rk806_dvs3_null: dvs3-null-pins { 206 pins = "gpio_pwrctrl3"; 207 function = "pin_fun0"; 208 }; 209 210 211 regulators { 212 vdd_gpu_s0: dcdc-reg1 { 213 regulator-boot-on; 214 regulator-min-microvolt = <550000>; 215 regulator-max-microvolt = <950000>; 216 regulator-ramp-delay = <12500>; 217 regulator-name = "vdd_gpu_s0"; 218 regulator-enable-ramp-delay = <400>; 219 regulator-state-mem { 220 regulator-off-in-suspend; 221 }; 222 }; 223 224 vdd_npu_s0: dcdc-reg2 { 225 regulator-always-on; 226 regulator-boot-on; 227 regulator-min-microvolt = <550000>; 228 regulator-max-microvolt = <950000>; 229 regulator-ramp-delay = <12500>; 230 regulator-name = "vdd_npu_s0"; 231 regulator-state-mem { 232 regulator-off-in-suspend; 233 }; 234 }; 235 236 vdd_log_s0: dcdc-reg3 { 237 regulator-always-on; 238 regulator-boot-on; 239 regulator-min-microvolt = <675000>; 240 regulator-max-microvolt = <750000>; 241 regulator-ramp-delay = <12500>; 242 regulator-name = "vdd_log_s0"; 243 regulator-state-mem { 244 regulator-off-in-suspend; 245 regulator-suspend-microvolt = <750000>; 246 }; 247 }; 248 249 vdd_vdenc_s0: dcdc-reg4 { 250 regulator-always-on; 251 regulator-boot-on; 252 regulator-min-microvolt = <550000>; 253 regulator-max-microvolt = <950000>; 254 regulator-ramp-delay = <12500>; 255 regulator-name = "vdd_vdenc_s0"; 256 regulator-state-mem { 257 regulator-off-in-suspend; 258 }; 259 260 }; 261 262 vdd_gpu_mem_s0: dcdc-reg5 { 263 regulator-boot-on; 264 regulator-min-microvolt = <675000>; 265 regulator-max-microvolt = <950000>; 266 regulator-ramp-delay = <12500>; 267 regulator-enable-ramp-delay = <400>; 268 regulator-name = "vdd_gpu_mem_s0"; 269 regulator-state-mem { 270 regulator-off-in-suspend; 271 }; 272 273 }; 274 275 vdd_npu_mem_s0: dcdc-reg6 { 276 regulator-always-on; 277 regulator-boot-on; 278 regulator-min-microvolt = <675000>; 279 regulator-max-microvolt = <950000>; 280 regulator-ramp-delay = <12500>; 281 regulator-name = "vdd_npu_mem_s0"; 282 regulator-state-mem { 283 regulator-off-in-suspend; 284 }; 285 286 }; 287 288 vcc_2v0_pldo_s3: dcdc-reg7 { 289 regulator-always-on; 290 regulator-boot-on; 291 regulator-min-microvolt = <2000000>; 292 regulator-max-microvolt = <2000000>; 293 regulator-ramp-delay = <12500>; 294 regulator-name = "vdd_2v0_pldo_s3"; 295 regulator-state-mem { 296 regulator-on-in-suspend; 297 regulator-suspend-microvolt = <2000000>; 298 }; 299 }; 300 301 vdd_vdenc_mem_s0: dcdc-reg8 { 302 regulator-always-on; 303 regulator-boot-on; 304 regulator-min-microvolt = <675000>; 305 regulator-max-microvolt = <950000>; 306 regulator-ramp-delay = <12500>; 307 regulator-name = "vdd_vdenc_mem_s0"; 308 regulator-state-mem { 309 regulator-off-in-suspend; 310 }; 311 }; 312 313 vdd2_ddr_s3: dcdc-reg9 { 314 regulator-always-on; 315 regulator-boot-on; 316 regulator-name = "vdd2_ddr_s3"; 317 regulator-state-mem { 318 regulator-on-in-suspend; 319 }; 320 }; 321 322 vcc_1v1_nldo_s3: dcdc-reg10 { 323 regulator-always-on; 324 regulator-boot-on; 325 regulator-min-microvolt = <1100000>; 326 regulator-max-microvolt = <1100000>; 327 regulator-ramp-delay = <12500>; 328 regulator-name = "vcc_1v1_nldo_s3"; 329 regulator-state-mem { 330 regulator-on-in-suspend; 331 regulator-suspend-microvolt = <1100000>; 332 }; 333 }; 334 335 avcc_1v8_s0: pldo-reg1 { 336 regulator-always-on; 337 regulator-boot-on; 338 regulator-min-microvolt = <1800000>; 339 regulator-max-microvolt = <1800000>; 340 regulator-ramp-delay = <12500>; 341 regulator-name = "avcc_1v8_s0"; 342 regulator-state-mem { 343 regulator-off-in-suspend; 344 }; 345 }; 346 347 vdd1_1v8_ddr_s3: pldo-reg2 { 348 regulator-always-on; 349 regulator-boot-on; 350 regulator-min-microvolt = <1800000>; 351 regulator-max-microvolt = <1800000>; 352 regulator-ramp-delay = <12500>; 353 regulator-name = "vdd1_1v8_ddr_s3"; 354 regulator-state-mem { 355 regulator-on-in-suspend; 356 regulator-suspend-microvolt = <1800000>; 357 }; 358 }; 359 360 avcc_1v8_codec_s0: pldo-reg3 { 361 regulator-always-on; 362 regulator-boot-on; 363 regulator-min-microvolt = <1800000>; 364 regulator-max-microvolt = <1800000>; 365 regulator-ramp-delay = <12500>; 366 regulator-name = "avcc_1v8_codec_s0"; 367 regulator-state-mem { 368 regulator-off-in-suspend; 369 }; 370 }; 371 372 vcc_3v3_s3: pldo-reg4 { 373 regulator-always-on; 374 regulator-boot-on; 375 regulator-min-microvolt = <3300000>; 376 regulator-max-microvolt = <3300000>; 377 regulator-ramp-delay = <12500>; 378 regulator-name = "vcc_3v3_s3"; 379 regulator-state-mem { 380 regulator-on-in-suspend; 381 regulator-suspend-microvolt = <3300000>; 382 }; 383 }; 384 385 vccio_sd_s0: pldo-reg5 { 386 regulator-always-on; 387 regulator-boot-on; 388 regulator-min-microvolt = <1800000>; 389 regulator-max-microvolt = <3300000>; 390 regulator-ramp-delay = <12500>; 391 regulator-name = "vccio_sd_s0"; 392 regulator-state-mem { 393 regulator-off-in-suspend; 394 }; 395 }; 396 397 vccio_1v8_s3: pldo-reg6 { 398 regulator-always-on; 399 regulator-boot-on; 400 regulator-min-microvolt = <1800000>; 401 regulator-max-microvolt = <1800000>; 402 regulator-ramp-delay = <12500>; 403 regulator-name = "vccio_1v8_s3"; 404 regulator-state-mem { 405 regulator-on-in-suspend; 406 regulator-suspend-microvolt = <1800000>; 407 }; 408 }; 409 410 vdd_0v75_s3: nldo-reg1 { 411 regulator-always-on; 412 regulator-boot-on; 413 regulator-min-microvolt = <750000>; 414 regulator-max-microvolt = <750000>; 415 regulator-ramp-delay = <12500>; 416 regulator-name = "vdd_0v75_s3"; 417 regulator-state-mem { 418 regulator-on-in-suspend; 419 regulator-suspend-microvolt = <750000>; 420 }; 421 }; 422 423 vdd2l_0v9_ddr_s3: nldo-reg2 { 424 regulator-always-on; 425 regulator-boot-on; 426 regulator-min-microvolt = <900000>; 427 regulator-max-microvolt = <900000>; 428 regulator-name = "vdd2l_0v9_ddr_s3"; 429 regulator-state-mem { 430 regulator-on-in-suspend; 431 regulator-suspend-microvolt = <900000>; 432 }; 433 }; 434 435 vdd_0v75_hdmi_edp_s0: nldo-reg3 { 436 regulator-always-on; 437 regulator-boot-on; 438 regulator-min-microvolt = <750000>; 439 regulator-max-microvolt = <750000>; 440 regulator-name = "vdd_0v75_hdmi_edp_s0"; 441 regulator-state-mem { 442 regulator-off-in-suspend; 443 }; 444 }; 445 446 avdd_0v75_s0: nldo-reg4 { 447 regulator-always-on; 448 regulator-boot-on; 449 regulator-min-microvolt = <750000>; 450 regulator-max-microvolt = <750000>; 451 regulator-name = "avdd_0v75_s0"; 452 regulator-state-mem { 453 regulator-off-in-suspend; 454 }; 455 }; 456 457 vdd_0v85_s0: nldo-reg5 { 458 regulator-always-on; 459 regulator-boot-on; 460 regulator-min-microvolt = <850000>; 461 regulator-max-microvolt = <850000>; 462 regulator-name = "vdd_0v85_s0"; 463 regulator-state-mem { 464 regulator-off-in-suspend; 465 }; 466 }; 467 }; 468 }; 469 470 pmic@1 { 471 compatible = "rockchip,rk806"; 472 reg = <0x01>; 473 #gpio-cells = <2>; 474 gpio-controller; 475 interrupt-parent = <&gpio0>; 476 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 477 pinctrl-0 = <&rk806_slave_dvs1_null>, <&rk806_slave_dvs2_null>, 478 <&rk806_slave_dvs3_null>; 479 pinctrl-names = "default"; 480 spi-max-frequency = <1000000>; 481 482 vcc1-supply = <&vcc5v0_sys>; 483 vcc2-supply = <&vcc5v0_sys>; 484 vcc3-supply = <&vcc5v0_sys>; 485 vcc4-supply = <&vcc5v0_sys>; 486 vcc5-supply = <&vcc5v0_sys>; 487 vcc6-supply = <&vcc5v0_sys>; 488 vcc7-supply = <&vcc5v0_sys>; 489 vcc8-supply = <&vcc5v0_sys>; 490 vcc9-supply = <&vcc5v0_sys>; 491 vcc10-supply = <&vcc5v0_sys>; 492 vcc11-supply = <&vcc_2v0_pldo_s3>; 493 vcc12-supply = <&vcc5v0_sys>; 494 vcc13-supply = <&vcc_1v1_nldo_s3>; 495 vcc14-supply = <&vcc_2v0_pldo_s3>; 496 vcca-supply = <&vcc5v0_sys>; 497 498 rk806_slave_dvs1_null: dvs1-null-pins { 499 pins = "gpio_pwrctrl1"; 500 function = "pin_fun0"; 501 }; 502 503 rk806_slave_dvs2_null: dvs2-null-pins { 504 pins = "gpio_pwrctrl2"; 505 function = "pin_fun0"; 506 }; 507 508 rk806_slave_dvs3_null: dvs3-null-pins { 509 pins = "gpio_pwrctrl3"; 510 function = "pin_fun0"; 511 }; 512 513 regulators { 514 vdd_cpu_big1_s0: dcdc-reg1 { 515 regulator-always-on; 516 regulator-boot-on; 517 regulator-min-microvolt = <550000>; 518 regulator-max-microvolt = <1050000>; 519 regulator-ramp-delay = <12500>; 520 regulator-name = "vdd_cpu_big1_s0"; 521 regulator-state-mem { 522 regulator-off-in-suspend; 523 }; 524 }; 525 526 vdd_cpu_big0_s0: dcdc-reg2 { 527 regulator-always-on; 528 regulator-boot-on; 529 regulator-min-microvolt = <550000>; 530 regulator-max-microvolt = <1050000>; 531 regulator-ramp-delay = <12500>; 532 regulator-name = "vdd_cpu_big0_s0"; 533 regulator-state-mem { 534 regulator-off-in-suspend; 535 }; 536 }; 537 538 vdd_cpu_lit_s0: dcdc-reg3 { 539 regulator-always-on; 540 regulator-boot-on; 541 regulator-min-microvolt = <550000>; 542 regulator-max-microvolt = <950000>; 543 regulator-ramp-delay = <12500>; 544 regulator-name = "vdd_cpu_lit_s0"; 545 regulator-state-mem { 546 regulator-off-in-suspend; 547 }; 548 }; 549 550 vcc_3v3_s0: dcdc-reg4 { 551 regulator-always-on; 552 regulator-boot-on; 553 regulator-min-microvolt = <3300000>; 554 regulator-max-microvolt = <3300000>; 555 regulator-ramp-delay = <12500>; 556 regulator-name = "vcc_3v3_s0"; 557 regulator-state-mem { 558 regulator-off-in-suspend; 559 }; 560 }; 561 562 vdd_cpu_big1_mem_s0: dcdc-reg5 { 563 regulator-always-on; 564 regulator-boot-on; 565 regulator-min-microvolt = <675000>; 566 regulator-max-microvolt = <1050000>; 567 regulator-ramp-delay = <12500>; 568 regulator-name = "vdd_cpu_big1_mem_s0"; 569 regulator-state-mem { 570 regulator-off-in-suspend; 571 }; 572 }; 573 574 575 vdd_cpu_big0_mem_s0: dcdc-reg6 { 576 regulator-always-on; 577 regulator-boot-on; 578 regulator-min-microvolt = <675000>; 579 regulator-max-microvolt = <1050000>; 580 regulator-ramp-delay = <12500>; 581 regulator-name = "vdd_cpu_big0_mem_s0"; 582 regulator-state-mem { 583 regulator-off-in-suspend; 584 }; 585 }; 586 587 vcc_1v8_s0: dcdc-reg7 { 588 regulator-always-on; 589 regulator-boot-on; 590 regulator-min-microvolt = <1800000>; 591 regulator-max-microvolt = <1800000>; 592 regulator-ramp-delay = <12500>; 593 regulator-name = "vcc_1v8_s0"; 594 regulator-state-mem { 595 regulator-off-in-suspend; 596 }; 597 }; 598 599 vdd_cpu_lit_mem_s0: dcdc-reg8 { 600 regulator-always-on; 601 regulator-boot-on; 602 regulator-min-microvolt = <675000>; 603 regulator-max-microvolt = <950000>; 604 regulator-ramp-delay = <12500>; 605 regulator-name = "vdd_cpu_lit_mem_s0"; 606 regulator-state-mem { 607 regulator-off-in-suspend; 608 }; 609 }; 610 611 vddq_ddr_s0: dcdc-reg9 { 612 regulator-always-on; 613 regulator-boot-on; 614 regulator-name = "vddq_ddr_s0"; 615 regulator-state-mem { 616 regulator-off-in-suspend; 617 }; 618 }; 619 620 vdd_ddr_s0: dcdc-reg10 { 621 regulator-always-on; 622 regulator-boot-on; 623 regulator-min-microvolt = <675000>; 624 regulator-max-microvolt = <900000>; 625 regulator-ramp-delay = <12500>; 626 regulator-name = "vdd_ddr_s0"; 627 regulator-state-mem { 628 regulator-off-in-suspend; 629 }; 630 }; 631 632 vcc_1v8_cam_s0: pldo-reg1 { 633 regulator-always-on; 634 regulator-boot-on; 635 regulator-min-microvolt = <1800000>; 636 regulator-max-microvolt = <1800000>; 637 regulator-ramp-delay = <12500>; 638 regulator-name = "vcc_1v8_cam_s0"; 639 regulator-state-mem { 640 regulator-off-in-suspend; 641 }; 642 }; 643 644 avdd1v8_ddr_pll_s0: pldo-reg2 { 645 regulator-always-on; 646 regulator-boot-on; 647 regulator-min-microvolt = <1800000>; 648 regulator-max-microvolt = <1800000>; 649 regulator-ramp-delay = <12500>; 650 regulator-name = "avdd1v8_ddr_pll_s0"; 651 regulator-state-mem { 652 regulator-off-in-suspend; 653 }; 654 }; 655 656 vdd_1v8_pll_s0: pldo-reg3 { 657 regulator-always-on; 658 regulator-boot-on; 659 regulator-min-microvolt = <1800000>; 660 regulator-max-microvolt = <1800000>; 661 regulator-ramp-delay = <12500>; 662 regulator-name = "vdd_1v8_pll_s0"; 663 regulator-state-mem { 664 regulator-off-in-suspend; 665 }; 666 }; 667 668 vcc_3v3_sd_s0: pldo-reg4 { 669 regulator-always-on; 670 regulator-boot-on; 671 regulator-min-microvolt = <3300000>; 672 regulator-max-microvolt = <3300000>; 673 regulator-ramp-delay = <12500>; 674 regulator-name = "vcc_3v3_sd_s0"; 675 regulator-state-mem { 676 regulator-off-in-suspend; 677 }; 678 }; 679 680 vcc_2v8_cam_s0: pldo-reg5 { 681 regulator-always-on; 682 regulator-boot-on; 683 regulator-min-microvolt = <2800000>; 684 regulator-max-microvolt = <2800000>; 685 regulator-ramp-delay = <12500>; 686 regulator-name = "vcc_2v8_cam_s0"; 687 regulator-state-mem { 688 regulator-off-in-suspend; 689 }; 690 }; 691 692 pldo6_s3: pldo-reg6 { 693 regulator-always-on; 694 regulator-boot-on; 695 regulator-min-microvolt = <1800000>; 696 regulator-max-microvolt = <1800000>; 697 regulator-name = "pldo6_s3"; 698 regulator-state-mem { 699 regulator-on-in-suspend; 700 regulator-suspend-microvolt = <1800000>; 701 }; 702 }; 703 704 vdd_0v75_pll_s0: nldo-reg1 { 705 regulator-always-on; 706 regulator-boot-on; 707 regulator-min-microvolt = <750000>; 708 regulator-max-microvolt = <750000>; 709 regulator-ramp-delay = <12500>; 710 regulator-name = "vdd_0v75_pll_s0"; 711 regulator-state-mem { 712 regulator-off-in-suspend; 713 }; 714 }; 715 716 vdd_ddr_pll_s0: nldo-reg2 { 717 regulator-always-on; 718 regulator-boot-on; 719 regulator-min-microvolt = <850000>; 720 regulator-max-microvolt = <850000>; 721 regulator-name = "vdd_ddr_pll_s0"; 722 regulator-state-mem { 723 regulator-off-in-suspend; 724 }; 725 }; 726 727 avdd_0v85_s0: nldo-reg3 { 728 regulator-always-on; 729 regulator-boot-on; 730 regulator-min-microvolt = <850000>; 731 regulator-max-microvolt = <850000>; 732 regulator-ramp-delay = <12500>; 733 regulator-name = "avdd_0v85_s0"; 734 regulator-state-mem { 735 regulator-off-in-suspend; 736 }; 737 }; 738 739 avdd_1v2_cam_s0: nldo-reg4 { 740 regulator-always-on; 741 regulator-boot-on; 742 regulator-min-microvolt = <1200000>; 743 regulator-max-microvolt = <1200000>; 744 regulator-ramp-delay = <12500>; 745 regulator-name = "avdd_1v2_cam_s0"; 746 regulator-state-mem { 747 regulator-off-in-suspend; 748 }; 749 }; 750 751 avdd_1v2_s0: nldo-reg5 { 752 regulator-always-on; 753 regulator-boot-on; 754 regulator-min-microvolt = <1200000>; 755 regulator-max-microvolt = <1200000>; 756 regulator-ramp-delay = <12500>; 757 regulator-name = "avdd_1v2_s0"; 758 regulator-state-mem { 759 regulator-off-in-suspend; 760 }; 761 }; 762 }; 763 }; 764}; 765 766&sata0 { 767 status = "okay"; 768}; 769 770&uart2 { 771 pinctrl-0 = <&uart2m0_xfer>; 772 status = "okay"; 773}; 774