1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd.
4 */
5
6/dts-v1/;
7#include "rk3588j.dtsi"
8#include "rk3588-edgeble-neu6b.dtsi"
9
10/ {
11	model = "Edgeble Neu6B IO Board";
12	compatible = "edgeble,neural-compute-module-6b-io",
13		     "edgeble,neural-compute-module-6b", "rockchip,rk3588";
14
15	aliases {
16		serial2 = &uart2;
17	};
18
19	chosen {
20		stdout-path = "serial2:1500000n8";
21	};
22};
23
24&combphy0_ps {
25	status = "okay";
26};
27
28&i2c6 {
29	status = "okay";
30
31	hym8563: rtc@51 {
32		compatible = "haoyu,hym8563";
33		reg = <0x51>;
34		interrupt-parent = <&gpio0>;
35		interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
36		#clock-cells = <0>;
37		clock-output-names = "hym8563";
38		pinctrl-names = "default";
39		pinctrl-0 = <&hym8563_int>;
40		wakeup-source;
41	};
42};
43
44&pinctrl {
45	hym8563 {
46		hym8563_int: hym8563-int {
47			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
48		};
49	};
50};
51
52/* FAN */
53&pwm2 {
54	pinctrl-0 = <&pwm2m1_pins>;
55	pinctrl-names = "default";
56	status = "okay";
57};
58
59&sata0 {
60	status = "okay";
61};
62
63&sdmmc {
64	bus-width = <4>;
65	cap-mmc-highspeed;
66	cap-sd-highspeed;
67	disable-wp;
68	no-sdio;
69	no-mmc;
70	sd-uhs-sdr104;
71	vmmc-supply = <&vcc_3v3_s3>;
72	vqmmc-supply = <&vccio_sd_s0>;
73	status = "okay";
74};
75
76&uart2 {
77	pinctrl-0 = <&uart2m0_xfer>;
78	status = "okay";
79};
80
81/* RS232 */
82&uart6 {
83	pinctrl-0 = <&uart6m0_xfer>;
84	pinctrl-names = "default";
85	status = "okay";
86};
87
88/* RS485 */
89&uart7 {
90	pinctrl-0 = <&uart7m2_xfer>;
91	pinctrl-names = "default";
92	status = "okay";
93};
94