1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2022 Hardkernel Co., Ltd.
4 *
5 */
6
7/dts-v1/;
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/leds/common.h>
10#include <dt-bindings/pinctrl/rockchip.h>
11#include <dt-bindings/soc/rockchip,vop2.h>
12#include "rk3568.dtsi"
13
14/ {
15	model = "Hardkernel ODROID-M1";
16	compatible = "rockchip,rk3568-odroid-m1", "rockchip,rk3568";
17
18	aliases {
19		ethernet0 = &gmac0;
20		i2c0 = &i2c3;
21		i2c3 = &i2c0;
22		mmc0 = &sdhci;
23		mmc1 = &sdmmc0;
24		serial0 = &uart1;
25		serial1 = &uart0;
26	};
27
28	chosen {
29		stdout-path = "serial2:1500000n8";
30	};
31
32	dc_12v: dc-12v-regulator {
33		compatible = "regulator-fixed";
34		regulator-name = "dc_12v";
35		regulator-always-on;
36		regulator-boot-on;
37		regulator-min-microvolt = <12000000>;
38		regulator-max-microvolt = <12000000>;
39	};
40
41	hdmi-con {
42		compatible = "hdmi-connector";
43		type = "a";
44
45		port {
46			hdmi_con_in: endpoint {
47				remote-endpoint = <&hdmi_out_con>;
48			};
49		};
50	};
51
52	leds {
53		compatible = "gpio-leds";
54
55		led_power: led-0 {
56			gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
57			function = LED_FUNCTION_POWER;
58			color = <LED_COLOR_ID_RED>;
59			default-state = "keep";
60			linux,default-trigger = "default-on";
61			pinctrl-names = "default";
62			pinctrl-0 = <&led_power_pin>;
63		};
64		led_work: led-1 {
65			gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
66			function = LED_FUNCTION_HEARTBEAT;
67			color = <LED_COLOR_ID_BLUE>;
68			linux,default-trigger = "heartbeat";
69			pinctrl-names = "default";
70			pinctrl-0 = <&led_work_pin>;
71		};
72	};
73
74	rk809-sound {
75		compatible = "simple-audio-card";
76		pinctrl-names = "default";
77		pinctrl-0 = <&hp_det_pin>;
78		simple-audio-card,name = "Analog RK817";
79		simple-audio-card,format = "i2s";
80		simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
81		simple-audio-card,mclk-fs = <256>;
82		simple-audio-card,widgets =
83			"Headphone", "Headphones",
84			"Speaker", "Speaker";
85		simple-audio-card,routing =
86			"Headphones", "HPOL",
87			"Headphones", "HPOR",
88			"Speaker", "SPKO";
89
90		simple-audio-card,cpu {
91			sound-dai = <&i2s1_8ch>;
92		};
93
94		simple-audio-card,codec {
95			sound-dai = <&rk809>;
96		};
97	};
98
99	vcc3v3_sys: vcc3v3-sys-regulator {
100		compatible = "regulator-fixed";
101		regulator-name = "vcc3v3_sys";
102		regulator-always-on;
103		regulator-boot-on;
104		regulator-min-microvolt = <3300000>;
105		regulator-max-microvolt = <3300000>;
106		vin-supply = <&dc_12v>;
107	};
108};
109
110&cpu0 {
111	cpu-supply = <&vdd_cpu>;
112};
113
114&cpu1 {
115	cpu-supply = <&vdd_cpu>;
116};
117
118&cpu2 {
119	cpu-supply = <&vdd_cpu>;
120};
121
122&cpu3 {
123	cpu-supply = <&vdd_cpu>;
124};
125
126&gmac0 {
127	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
128	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
129	assigned-clock-rates = <0>, <125000000>;
130	clock_in_out = "output";
131	phy-handle = <&rgmii_phy0>;
132	phy-mode = "rgmii";
133	phy-supply = <&vcc3v3_sys>;
134	pinctrl-names = "default";
135	pinctrl-0 = <&gmac0_miim
136		     &gmac0_tx_bus2
137		     &gmac0_rx_bus2
138		     &gmac0_rgmii_clk
139		     &gmac0_rgmii_bus>;
140	status = "okay";
141
142	tx_delay = <0x4f>;
143	rx_delay = <0x2d>;
144};
145
146&gpu {
147	mali-supply = <&vdd_gpu>;
148	status = "okay";
149};
150
151&hdmi {
152	avdd-0v9-supply = <&vdda0v9_image>;
153	avdd-1v8-supply = <&vcca1v8_image>;
154	status = "okay";
155};
156
157&hdmi_in {
158	hdmi_in_vp0: endpoint {
159		remote-endpoint = <&vp0_out_hdmi>;
160	};
161};
162
163&hdmi_out {
164	hdmi_out_con: endpoint {
165		remote-endpoint = <&hdmi_con_in>;
166	};
167};
168
169&hdmi_sound {
170	status = "okay";
171};
172
173&i2c0 {
174	status = "okay";
175
176	vdd_cpu: regulator@1c {
177		compatible = "tcs,tcs4525";
178		reg = <0x1c>;
179		fcs,suspend-voltage-selector = <1>;
180		regulator-name = "vdd_cpu";
181		regulator-always-on;
182		regulator-boot-on;
183		regulator-min-microvolt = <800000>;
184		regulator-max-microvolt = <1150000>;
185		regulator-ramp-delay = <2300>;
186		vin-supply = <&vcc3v3_sys>;
187
188		regulator-state-mem {
189			regulator-off-in-suspend;
190		};
191	};
192
193	rk809: pmic@20 {
194		compatible = "rockchip,rk809";
195		reg = <0x20>;
196		interrupt-parent = <&gpio0>;
197		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
198		assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
199		assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
200		#clock-cells = <1>;
201		clock-names = "mclk";
202		clocks = <&cru I2S1_MCLKOUT_TX>;
203		pinctrl-names = "default";
204		pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>;
205		rockchip,system-power-controller;
206		#sound-dai-cells = <0>;
207		vcc1-supply = <&vcc3v3_sys>;
208		vcc2-supply = <&vcc3v3_sys>;
209		vcc3-supply = <&vcc3v3_sys>;
210		vcc4-supply = <&vcc3v3_sys>;
211		vcc5-supply = <&vcc3v3_sys>;
212		vcc6-supply = <&vcc3v3_sys>;
213		vcc7-supply = <&vcc3v3_sys>;
214		vcc8-supply = <&vcc3v3_sys>;
215		vcc9-supply = <&vcc3v3_sys>;
216		wakeup-source;
217
218		regulators {
219			vdd_logic: DCDC_REG1 {
220				regulator-name = "vdd_logic";
221				regulator-always-on;
222				regulator-boot-on;
223				regulator-init-microvolt = <900000>;
224				regulator-initial-mode = <0x2>;
225				regulator-min-microvolt = <500000>;
226				regulator-max-microvolt = <1350000>;
227				regulator-ramp-delay = <6001>;
228
229				regulator-state-mem {
230					regulator-off-in-suspend;
231				};
232			};
233
234			vdd_gpu: DCDC_REG2 {
235				regulator-name = "vdd_gpu";
236				regulator-always-on;
237				regulator-init-microvolt = <900000>;
238				regulator-initial-mode = <0x2>;
239				regulator-min-microvolt = <500000>;
240				regulator-max-microvolt = <1350000>;
241				regulator-ramp-delay = <6001>;
242
243				regulator-state-mem {
244					regulator-off-in-suspend;
245				};
246			};
247
248			vcc_ddr: DCDC_REG3 {
249				regulator-name = "vcc_ddr";
250				regulator-always-on;
251				regulator-boot-on;
252				regulator-initial-mode = <0x2>;
253
254				regulator-state-mem {
255					regulator-on-in-suspend;
256				};
257			};
258
259			vdd_npu: DCDC_REG4 {
260				regulator-name = "vdd_npu";
261				regulator-init-microvolt = <900000>;
262				regulator-initial-mode = <0x2>;
263				regulator-min-microvolt = <500000>;
264				regulator-max-microvolt = <1350000>;
265				regulator-ramp-delay = <6001>;
266
267				regulator-state-mem {
268					regulator-off-in-suspend;
269				};
270			};
271
272			vcc_1v8: DCDC_REG5 {
273				regulator-name = "vcc_1v8";
274				regulator-always-on;
275				regulator-boot-on;
276				regulator-min-microvolt = <1800000>;
277				regulator-max-microvolt = <1800000>;
278
279				regulator-state-mem {
280					regulator-off-in-suspend;
281				};
282			};
283
284			vdda0v9_image: LDO_REG1 {
285				regulator-name = "vdda0v9_image";
286				regulator-always-on;
287				regulator-min-microvolt = <900000>;
288				regulator-max-microvolt = <900000>;
289
290				regulator-state-mem {
291					regulator-off-in-suspend;
292				};
293			};
294
295			vdda_0v9: LDO_REG2 {
296				regulator-name = "vdda_0v9";
297				regulator-always-on;
298				regulator-boot-on;
299				regulator-min-microvolt = <900000>;
300				regulator-max-microvolt = <900000>;
301
302				regulator-state-mem {
303					regulator-off-in-suspend;
304				};
305			};
306
307			vdda0v9_pmu: LDO_REG3 {
308				regulator-name = "vdda0v9_pmu";
309				regulator-always-on;
310				regulator-boot-on;
311				regulator-min-microvolt = <900000>;
312				regulator-max-microvolt = <900000>;
313
314				regulator-state-mem {
315					regulator-on-in-suspend;
316					regulator-suspend-microvolt = <900000>;
317				};
318			};
319
320			vccio_acodec: LDO_REG4 {
321				regulator-name = "vccio_acodec";
322				regulator-always-on;
323				regulator-boot-on;
324				regulator-min-microvolt = <3300000>;
325				regulator-max-microvolt = <3300000>;
326
327				regulator-state-mem {
328					regulator-off-in-suspend;
329				};
330			};
331
332			vccio_sd: LDO_REG5 {
333				regulator-name = "vccio_sd";
334				regulator-min-microvolt = <1800000>;
335				regulator-max-microvolt = <3300000>;
336
337				regulator-state-mem {
338					regulator-off-in-suspend;
339				};
340			};
341
342			vcc3v3_pmu: LDO_REG6 {
343				regulator-name = "vcc3v3_pmu";
344				regulator-always-on;
345				regulator-boot-on;
346				regulator-min-microvolt = <3300000>;
347				regulator-max-microvolt = <3300000>;
348
349				regulator-state-mem {
350					regulator-on-in-suspend;
351					regulator-suspend-microvolt = <3300000>;
352				};
353			};
354
355			vcca_1v8: LDO_REG7 {
356				regulator-name = "vcca_1v8";
357				regulator-always-on;
358				regulator-boot-on;
359				regulator-min-microvolt = <1800000>;
360				regulator-max-microvolt = <1800000>;
361
362				regulator-state-mem {
363					regulator-off-in-suspend;
364				};
365			};
366
367			vcca1v8_pmu: LDO_REG8 {
368				regulator-name = "vcca1v8_pmu";
369				regulator-always-on;
370				regulator-boot-on;
371				regulator-min-microvolt = <1800000>;
372				regulator-max-microvolt = <1800000>;
373
374				regulator-state-mem {
375					regulator-on-in-suspend;
376					regulator-suspend-microvolt = <1800000>;
377				};
378			};
379
380			vcca1v8_image: LDO_REG9 {
381				regulator-name = "vcca1v8_image";
382				regulator-always-on;
383				regulator-min-microvolt = <1800000>;
384				regulator-max-microvolt = <1800000>;
385
386				regulator-state-mem {
387					regulator-off-in-suspend;
388				};
389			};
390
391			vcc_3v3: SWITCH_REG1 {
392				regulator-name = "vcc_3v3";
393				regulator-always-on;
394				regulator-boot-on;
395
396				regulator-state-mem {
397					regulator-off-in-suspend;
398				};
399			};
400
401			vcc3v3_sd: SWITCH_REG2 {
402				regulator-name = "vcc3v3_sd";
403
404				regulator-state-mem {
405					regulator-off-in-suspend;
406				};
407			};
408		};
409	};
410};
411
412&i2s0_8ch {
413	status = "okay";
414};
415
416&i2s1_8ch {
417	rockchip,trcm-sync-tx-only;
418	status = "okay";
419};
420
421&mdio0 {
422	rgmii_phy0: ethernet-phy@0 {
423		compatible = "ethernet-phy-ieee802.3-c22";
424		reg = <0x0>;
425		reset-assert-us = <20000>;
426		reset-deassert-us = <100000>;
427		reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
428	};
429};
430
431&pinctrl {
432	fspi {
433		fspi_dual_io_pins: fspi-dual-io-pins {
434			rockchip,pins =
435				/* fspi_clk */
436				<1 RK_PD0 1 &pcfg_pull_none>,
437				/* fspi_cs0n */
438				<1 RK_PD3 1 &pcfg_pull_none>,
439				/* fspi_d0 */
440				<1 RK_PD1 1 &pcfg_pull_none>,
441				/* fspi_d1 */
442				<1 RK_PD2 1 &pcfg_pull_none>;
443		};
444	};
445
446	leds {
447		led_power_pin: led-power-pin {
448			rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
449		};
450		led_work_pin: led-work-pin {
451			rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
452		};
453	};
454
455	pmic {
456		pmic_int_l: pmic-int-l {
457			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
458		};
459	};
460
461	rk809 {
462		hp_det_pin: hp-det-pin {
463			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
464		};
465	};
466};
467
468&pmu_io_domains {
469	pmuio1-supply = <&vcc3v3_pmu>;
470	pmuio2-supply = <&vcc3v3_pmu>;
471	vccio1-supply = <&vccio_acodec>;
472	vccio2-supply = <&vcc_1v8>;
473	vccio3-supply = <&vccio_sd>;
474	vccio4-supply = <&vcc_1v8>;
475	vccio5-supply = <&vcc_3v3>;
476	vccio6-supply = <&vcc_3v3>;
477	vccio7-supply = <&vcc_3v3>;
478	status = "okay";
479};
480
481&saradc {
482	vref-supply = <&vcca_1v8>;
483	status = "okay";
484};
485
486&sdhci {
487	bus-width = <8>;
488	max-frequency = <200000000>;
489	non-removable;
490	pinctrl-names = "default";
491	pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe &emmc_rstnout>;
492	vmmc-supply = <&vcc_3v3>;
493	vqmmc-supply = <&vcc_1v8>;
494	status = "okay";
495};
496
497&sdmmc0 {
498	bus-width = <4>;
499	cap-sd-highspeed;
500	cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
501	disable-wp;
502	pinctrl-names = "default";
503	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
504	sd-uhs-sdr50;
505	vmmc-supply = <&vcc3v3_sd>;
506	vqmmc-supply = <&vccio_sd>;
507	status = "okay";
508};
509
510&sfc {
511	/* Dual I/O mode as the D2 pin conflicts with the eMMC */
512	pinctrl-0 = <&fspi_dual_io_pins>;
513	pinctrl-names = "default";
514	#address-cells = <1>;
515	#size-cells = <0>;
516	status = "okay";
517
518	flash@0 {
519		compatible = "jedec,spi-nor";
520		reg = <0>;
521		spi-max-frequency = <100000000>;
522		spi-rx-bus-width = <2>;
523		spi-tx-bus-width = <1>;
524
525		partitions {
526			compatible = "fixed-partitions";
527			#address-cells = <1>;
528			#size-cells = <1>;
529
530			partition@0 {
531				label = "SPL";
532				reg = <0x0 0xe0000>;
533			};
534			partition@e0000 {
535				label = "U-Boot Env";
536				reg = <0xe0000 0x20000>;
537			};
538			partition@100000 {
539				label = "U-Boot";
540				reg = <0x100000 0x200000>;
541			};
542			partition@300000 {
543				label = "splash";
544				reg = <0x300000 0x100000>;
545			};
546			partition@400000 {
547				label = "Filesystem";
548				reg = <0x400000 0xc00000>;
549			};
550		};
551	};
552};
553
554&tsadc {
555	rockchip,hw-tshut-mode = <1>;
556	rockchip,hw-tshut-polarity = <0>;
557	status = "okay";
558};
559
560&uart2 {
561	status = "okay";
562};
563
564&vop {
565	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
566	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
567	status = "okay";
568};
569
570&vop_mmu {
571	status = "okay";
572};
573
574&vp0 {
575	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
576		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
577		remote-endpoint = <&hdmi_in_vp0>;
578	};
579};
580