1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2022 Hardkernel Co., Ltd.
4 *
5 */
6
7/dts-v1/;
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/leds/common.h>
10#include <dt-bindings/pinctrl/rockchip.h>
11#include "rk3568.dtsi"
12
13/ {
14	model = "Hardkernel ODROID-M1";
15	compatible = "rockchip,rk3568-odroid-m1", "rockchip,rk3568";
16
17	aliases {
18		ethernet0 = &gmac0;
19		i2c0 = &i2c3;
20		i2c3 = &i2c0;
21		mmc0 = &sdhci;
22		mmc1 = &sdmmc0;
23		serial0 = &uart1;
24		serial1 = &uart0;
25	};
26
27	chosen {
28		stdout-path = "serial2:1500000n8";
29	};
30
31	dc_12v: dc-12v-regulator {
32		compatible = "regulator-fixed";
33		regulator-name = "dc_12v";
34		regulator-always-on;
35		regulator-boot-on;
36		regulator-min-microvolt = <12000000>;
37		regulator-max-microvolt = <12000000>;
38	};
39
40	leds {
41		compatible = "gpio-leds";
42
43		led_power: led-0 {
44			gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
45			function = LED_FUNCTION_POWER;
46			color = <LED_COLOR_ID_RED>;
47			default-state = "keep";
48			linux,default-trigger = "default-on";
49			pinctrl-names = "default";
50			pinctrl-0 = <&led_power_pin>;
51		};
52		led_work: led-1 {
53			gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
54			function = LED_FUNCTION_HEARTBEAT;
55			color = <LED_COLOR_ID_BLUE>;
56			linux,default-trigger = "heartbeat";
57			pinctrl-names = "default";
58			pinctrl-0 = <&led_work_pin>;
59		};
60	};
61
62	vcc3v3_sys: vcc3v3-sys-regulator {
63		compatible = "regulator-fixed";
64		regulator-name = "vcc3v3_sys";
65		regulator-always-on;
66		regulator-boot-on;
67		regulator-min-microvolt = <3300000>;
68		regulator-max-microvolt = <3300000>;
69		vin-supply = <&dc_12v>;
70	};
71};
72
73&cpu0 {
74	cpu-supply = <&vdd_cpu>;
75};
76
77&cpu1 {
78	cpu-supply = <&vdd_cpu>;
79};
80
81&cpu2 {
82	cpu-supply = <&vdd_cpu>;
83};
84
85&cpu3 {
86	cpu-supply = <&vdd_cpu>;
87};
88
89&gmac0 {
90	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
91	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
92	assigned-clock-rates = <0>, <125000000>;
93	clock_in_out = "output";
94	phy-handle = <&rgmii_phy0>;
95	phy-mode = "rgmii";
96	phy-supply = <&vcc3v3_sys>;
97	pinctrl-names = "default";
98	pinctrl-0 = <&gmac0_miim
99		     &gmac0_tx_bus2
100		     &gmac0_rx_bus2
101		     &gmac0_rgmii_clk
102		     &gmac0_rgmii_bus>;
103	status = "okay";
104
105	tx_delay = <0x4f>;
106	rx_delay = <0x2d>;
107};
108
109&i2c0 {
110	status = "okay";
111
112	vdd_cpu: regulator@1c {
113		compatible = "tcs,tcs4525";
114		reg = <0x1c>;
115		fcs,suspend-voltage-selector = <1>;
116		regulator-name = "vdd_cpu";
117		regulator-always-on;
118		regulator-boot-on;
119		regulator-min-microvolt = <800000>;
120		regulator-max-microvolt = <1150000>;
121		regulator-ramp-delay = <2300>;
122		vin-supply = <&vcc3v3_sys>;
123
124		regulator-state-mem {
125			regulator-off-in-suspend;
126		};
127	};
128
129	rk809: pmic@20 {
130		compatible = "rockchip,rk809";
131		reg = <0x20>;
132		interrupt-parent = <&gpio0>;
133		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
134		#clock-cells = <1>;
135		pinctrl-names = "default";
136		pinctrl-0 = <&pmic_int_l>;
137		rockchip,system-power-controller;
138		vcc1-supply = <&vcc3v3_sys>;
139		vcc2-supply = <&vcc3v3_sys>;
140		vcc3-supply = <&vcc3v3_sys>;
141		vcc4-supply = <&vcc3v3_sys>;
142		vcc5-supply = <&vcc3v3_sys>;
143		vcc6-supply = <&vcc3v3_sys>;
144		vcc7-supply = <&vcc3v3_sys>;
145		vcc8-supply = <&vcc3v3_sys>;
146		vcc9-supply = <&vcc3v3_sys>;
147		wakeup-source;
148
149		regulators {
150			vdd_logic: DCDC_REG1 {
151				regulator-name = "vdd_logic";
152				regulator-always-on;
153				regulator-boot-on;
154				regulator-init-microvolt = <900000>;
155				regulator-initial-mode = <0x2>;
156				regulator-min-microvolt = <500000>;
157				regulator-max-microvolt = <1350000>;
158				regulator-ramp-delay = <6001>;
159
160				regulator-state-mem {
161					regulator-off-in-suspend;
162				};
163			};
164
165			vdd_gpu: DCDC_REG2 {
166				regulator-name = "vdd_gpu";
167				regulator-always-on;
168				regulator-init-microvolt = <900000>;
169				regulator-initial-mode = <0x2>;
170				regulator-min-microvolt = <500000>;
171				regulator-max-microvolt = <1350000>;
172				regulator-ramp-delay = <6001>;
173
174				regulator-state-mem {
175					regulator-off-in-suspend;
176				};
177			};
178
179			vcc_ddr: DCDC_REG3 {
180				regulator-name = "vcc_ddr";
181				regulator-always-on;
182				regulator-boot-on;
183				regulator-initial-mode = <0x2>;
184
185				regulator-state-mem {
186					regulator-on-in-suspend;
187				};
188			};
189
190			vdd_npu: DCDC_REG4 {
191				regulator-name = "vdd_npu";
192				regulator-init-microvolt = <900000>;
193				regulator-initial-mode = <0x2>;
194				regulator-min-microvolt = <500000>;
195				regulator-max-microvolt = <1350000>;
196				regulator-ramp-delay = <6001>;
197
198				regulator-state-mem {
199					regulator-off-in-suspend;
200				};
201			};
202
203			vcc_1v8: DCDC_REG5 {
204				regulator-name = "vcc_1v8";
205				regulator-always-on;
206				regulator-boot-on;
207				regulator-min-microvolt = <1800000>;
208				regulator-max-microvolt = <1800000>;
209
210				regulator-state-mem {
211					regulator-off-in-suspend;
212				};
213			};
214
215			vdda0v9_image: LDO_REG1 {
216				regulator-name = "vdda0v9_image";
217				regulator-always-on;
218				regulator-min-microvolt = <900000>;
219				regulator-max-microvolt = <900000>;
220
221				regulator-state-mem {
222					regulator-off-in-suspend;
223				};
224			};
225
226			vdda_0v9: LDO_REG2 {
227				regulator-name = "vdda_0v9";
228				regulator-always-on;
229				regulator-boot-on;
230				regulator-min-microvolt = <900000>;
231				regulator-max-microvolt = <900000>;
232
233				regulator-state-mem {
234					regulator-off-in-suspend;
235				};
236			};
237
238			vdda0v9_pmu: LDO_REG3 {
239				regulator-name = "vdda0v9_pmu";
240				regulator-always-on;
241				regulator-boot-on;
242				regulator-min-microvolt = <900000>;
243				regulator-max-microvolt = <900000>;
244
245				regulator-state-mem {
246					regulator-on-in-suspend;
247					regulator-suspend-microvolt = <900000>;
248				};
249			};
250
251			vccio_acodec: LDO_REG4 {
252				regulator-name = "vccio_acodec";
253				regulator-always-on;
254				regulator-boot-on;
255				regulator-min-microvolt = <3300000>;
256				regulator-max-microvolt = <3300000>;
257
258				regulator-state-mem {
259					regulator-off-in-suspend;
260				};
261			};
262
263			vccio_sd: LDO_REG5 {
264				regulator-name = "vccio_sd";
265				regulator-min-microvolt = <1800000>;
266				regulator-max-microvolt = <3300000>;
267
268				regulator-state-mem {
269					regulator-off-in-suspend;
270				};
271			};
272
273			vcc3v3_pmu: LDO_REG6 {
274				regulator-name = "vcc3v3_pmu";
275				regulator-always-on;
276				regulator-boot-on;
277				regulator-min-microvolt = <3300000>;
278				regulator-max-microvolt = <3300000>;
279
280				regulator-state-mem {
281					regulator-on-in-suspend;
282					regulator-suspend-microvolt = <3300000>;
283				};
284			};
285
286			vcca_1v8: LDO_REG7 {
287				regulator-name = "vcca_1v8";
288				regulator-always-on;
289				regulator-boot-on;
290				regulator-min-microvolt = <1800000>;
291				regulator-max-microvolt = <1800000>;
292
293				regulator-state-mem {
294					regulator-off-in-suspend;
295				};
296			};
297
298			vcca1v8_pmu: LDO_REG8 {
299				regulator-name = "vcca1v8_pmu";
300				regulator-always-on;
301				regulator-boot-on;
302				regulator-min-microvolt = <1800000>;
303				regulator-max-microvolt = <1800000>;
304
305				regulator-state-mem {
306					regulator-on-in-suspend;
307					regulator-suspend-microvolt = <1800000>;
308				};
309			};
310
311			vcca1v8_image: LDO_REG9 {
312				regulator-name = "vcca1v8_image";
313				regulator-always-on;
314				regulator-min-microvolt = <1800000>;
315				regulator-max-microvolt = <1800000>;
316
317				regulator-state-mem {
318					regulator-off-in-suspend;
319				};
320			};
321
322			vcc_3v3: SWITCH_REG1 {
323				regulator-name = "vcc_3v3";
324				regulator-always-on;
325				regulator-boot-on;
326
327				regulator-state-mem {
328					regulator-off-in-suspend;
329				};
330			};
331
332			vcc3v3_sd: SWITCH_REG2 {
333				regulator-name = "vcc3v3_sd";
334
335				regulator-state-mem {
336					regulator-off-in-suspend;
337				};
338			};
339		};
340	};
341};
342
343&mdio0 {
344	rgmii_phy0: ethernet-phy@0 {
345		compatible = "ethernet-phy-ieee802.3-c22";
346		reg = <0x0>;
347		reset-assert-us = <20000>;
348		reset-deassert-us = <100000>;
349		reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
350	};
351};
352
353&pinctrl {
354	fspi {
355		fspi_dual_io_pins: fspi-dual-io-pins {
356			rockchip,pins =
357				/* fspi_clk */
358				<1 RK_PD0 1 &pcfg_pull_none>,
359				/* fspi_cs0n */
360				<1 RK_PD3 1 &pcfg_pull_none>,
361				/* fspi_d0 */
362				<1 RK_PD1 1 &pcfg_pull_none>,
363				/* fspi_d1 */
364				<1 RK_PD2 1 &pcfg_pull_none>;
365		};
366	};
367
368	leds {
369		led_power_pin: led-power-pin {
370			rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
371		};
372		led_work_pin: led-work-pin {
373			rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
374		};
375	};
376
377	pmic {
378		pmic_int_l: pmic-int-l {
379			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
380		};
381	};
382};
383
384&pmu_io_domains {
385	pmuio1-supply = <&vcc3v3_pmu>;
386	pmuio2-supply = <&vcc3v3_pmu>;
387	vccio1-supply = <&vccio_acodec>;
388	vccio2-supply = <&vcc_1v8>;
389	vccio3-supply = <&vccio_sd>;
390	vccio4-supply = <&vcc_1v8>;
391	vccio5-supply = <&vcc_3v3>;
392	vccio6-supply = <&vcc_3v3>;
393	vccio7-supply = <&vcc_3v3>;
394	status = "okay";
395};
396
397&saradc {
398	vref-supply = <&vcca_1v8>;
399	status = "okay";
400};
401
402&sdhci {
403	bus-width = <8>;
404	max-frequency = <200000000>;
405	non-removable;
406	pinctrl-names = "default";
407	pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe &emmc_rstnout>;
408	vmmc-supply = <&vcc_3v3>;
409	vqmmc-supply = <&vcc_1v8>;
410	status = "okay";
411};
412
413&sdmmc0 {
414	bus-width = <4>;
415	cap-sd-highspeed;
416	cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
417	disable-wp;
418	pinctrl-names = "default";
419	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
420	sd-uhs-sdr50;
421	vmmc-supply = <&vcc3v3_sd>;
422	vqmmc-supply = <&vccio_sd>;
423	status = "okay";
424};
425
426&sfc {
427	/* Dual I/O mode as the D2 pin conflicts with the eMMC */
428	pinctrl-0 = <&fspi_dual_io_pins>;
429	pinctrl-names = "default";
430	#address-cells = <1>;
431	#size-cells = <0>;
432	status = "okay";
433
434	flash@0 {
435		compatible = "jedec,spi-nor";
436		reg = <0>;
437		spi-max-frequency = <100000000>;
438		spi-rx-bus-width = <2>;
439		spi-tx-bus-width = <1>;
440
441		partitions {
442			compatible = "fixed-partitions";
443			#address-cells = <1>;
444			#size-cells = <1>;
445
446			partition@0 {
447				label = "SPL";
448				reg = <0x0 0xe0000>;
449			};
450			partition@e0000 {
451				label = "U-Boot Env";
452				reg = <0xe0000 0x20000>;
453			};
454			partition@100000 {
455				label = "U-Boot";
456				reg = <0x100000 0x200000>;
457			};
458			partition@300000 {
459				label = "splash";
460				reg = <0x300000 0x100000>;
461			};
462			partition@400000 {
463				label = "Filesystem";
464				reg = <0x400000 0xc00000>;
465			};
466		};
467	};
468};
469
470&tsadc {
471	rockchip,hw-tshut-mode = <1>;
472	rockchip,hw-tshut-polarity = <0>;
473	status = "okay";
474};
475
476&uart2 {
477	status = "okay";
478};
479