1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2022 Hardkernel Co., Ltd. 4 * 5 */ 6 7/dts-v1/; 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/leds/common.h> 10#include <dt-bindings/pinctrl/rockchip.h> 11#include <dt-bindings/soc/rockchip,vop2.h> 12#include "rk3568.dtsi" 13 14/ { 15 model = "Hardkernel ODROID-M1"; 16 compatible = "rockchip,rk3568-odroid-m1", "rockchip,rk3568"; 17 18 aliases { 19 ethernet0 = &gmac0; 20 i2c0 = &i2c3; 21 i2c3 = &i2c0; 22 mmc0 = &sdhci; 23 mmc1 = &sdmmc0; 24 serial0 = &uart1; 25 serial1 = &uart0; 26 }; 27 28 chosen { 29 stdout-path = "serial2:1500000n8"; 30 }; 31 32 dc_12v: dc-12v-regulator { 33 compatible = "regulator-fixed"; 34 regulator-name = "dc_12v"; 35 regulator-always-on; 36 regulator-boot-on; 37 regulator-min-microvolt = <12000000>; 38 regulator-max-microvolt = <12000000>; 39 }; 40 41 hdmi-con { 42 compatible = "hdmi-connector"; 43 type = "a"; 44 45 port { 46 hdmi_con_in: endpoint { 47 remote-endpoint = <&hdmi_out_con>; 48 }; 49 }; 50 }; 51 52 leds { 53 compatible = "gpio-leds"; 54 55 led_power: led-0 { 56 gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; 57 function = LED_FUNCTION_POWER; 58 color = <LED_COLOR_ID_RED>; 59 default-state = "keep"; 60 linux,default-trigger = "default-on"; 61 pinctrl-names = "default"; 62 pinctrl-0 = <&led_power_pin>; 63 }; 64 led_work: led-1 { 65 gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; 66 function = LED_FUNCTION_HEARTBEAT; 67 color = <LED_COLOR_ID_BLUE>; 68 linux,default-trigger = "heartbeat"; 69 pinctrl-names = "default"; 70 pinctrl-0 = <&led_work_pin>; 71 }; 72 }; 73 74 rk809-sound { 75 compatible = "simple-audio-card"; 76 pinctrl-names = "default"; 77 pinctrl-0 = <&hp_det_pin>; 78 simple-audio-card,name = "Analog RK817"; 79 simple-audio-card,format = "i2s"; 80 simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; 81 simple-audio-card,mclk-fs = <256>; 82 simple-audio-card,widgets = 83 "Headphone", "Headphones", 84 "Speaker", "Speaker"; 85 simple-audio-card,routing = 86 "Headphones", "HPOL", 87 "Headphones", "HPOR", 88 "Speaker", "SPKO"; 89 90 simple-audio-card,cpu { 91 sound-dai = <&i2s1_8ch>; 92 }; 93 94 simple-audio-card,codec { 95 sound-dai = <&rk809>; 96 }; 97 }; 98 99 vcc3v3_pcie: vcc3v3-pcie-regulator { 100 compatible = "regulator-fixed"; 101 regulator-name = "vcc3v3_pcie"; 102 enable-active-high; 103 gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; 104 pinctrl-names = "default"; 105 pinctrl-0 = <&vcc3v3_pcie_en_pin>; 106 regulator-min-microvolt = <3300000>; 107 regulator-max-microvolt = <3300000>; 108 startup-delay-us = <5000>; 109 vin-supply = <&vcc3v3_sys>; 110 }; 111 112 vcc3v3_sys: vcc3v3-sys-regulator { 113 compatible = "regulator-fixed"; 114 regulator-name = "vcc3v3_sys"; 115 regulator-always-on; 116 regulator-boot-on; 117 regulator-min-microvolt = <3300000>; 118 regulator-max-microvolt = <3300000>; 119 vin-supply = <&dc_12v>; 120 }; 121 122 vcc5v0_sys: vcc5v0-sys-regulator { 123 compatible = "regulator-fixed"; 124 regulator-name = "vcc5v0_sys"; 125 regulator-always-on; 126 regulator-boot-on; 127 regulator-min-microvolt = <5000000>; 128 regulator-max-microvolt = <5000000>; 129 vin-supply = <&dc_12v>; 130 }; 131 132 vcc5v0_usb_host: vcc5v0-usb-host-regulator { 133 compatible = "regulator-fixed"; 134 regulator-name = "vcc5v0_usb_host"; 135 enable-active-high; 136 gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; 137 pinctrl-names = "default"; 138 pinctrl-0 = <&vcc5v0_usb_host_en_pin>; 139 regulator-min-microvolt = <5000000>; 140 regulator-max-microvolt = <5000000>; 141 vin-supply = <&vcc5v0_sys>; 142 }; 143 144 vcc5v0_usb_otg: vcc5v0-usb-otg-regulator { 145 compatible = "regulator-fixed"; 146 regulator-name = "vcc5v0_usb_otg"; 147 enable-active-high; 148 gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; 149 pinctrl-names = "default"; 150 pinctrl-0 = <&vcc5v0_usb_otg_en_pin>; 151 regulator-min-microvolt = <5000000>; 152 regulator-max-microvolt = <5000000>; 153 vin-supply = <&vcc5v0_sys>; 154 }; 155}; 156 157&combphy0 { 158 /* Used for USB3 */ 159 phy-supply = <&vcc5v0_usb_host>; 160 status = "okay"; 161}; 162 163&combphy1 { 164 /* Used for USB3 */ 165 phy-supply = <&vcc5v0_usb_otg>; 166 status = "okay"; 167}; 168 169&combphy2 { 170 /* used for SATA */ 171 status = "okay"; 172}; 173 174&cpu0 { 175 cpu-supply = <&vdd_cpu>; 176}; 177 178&cpu1 { 179 cpu-supply = <&vdd_cpu>; 180}; 181 182&cpu2 { 183 cpu-supply = <&vdd_cpu>; 184}; 185 186&cpu3 { 187 cpu-supply = <&vdd_cpu>; 188}; 189 190&gmac0 { 191 assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; 192 assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>; 193 assigned-clock-rates = <0>, <125000000>; 194 clock_in_out = "output"; 195 phy-handle = <&rgmii_phy0>; 196 phy-mode = "rgmii"; 197 phy-supply = <&vcc3v3_sys>; 198 pinctrl-names = "default"; 199 pinctrl-0 = <&gmac0_miim 200 &gmac0_tx_bus2 201 &gmac0_rx_bus2 202 &gmac0_rgmii_clk 203 &gmac0_rgmii_bus>; 204 status = "okay"; 205 206 tx_delay = <0x4f>; 207 rx_delay = <0x2d>; 208}; 209 210&gpu { 211 mali-supply = <&vdd_gpu>; 212 status = "okay"; 213}; 214 215&hdmi { 216 avdd-0v9-supply = <&vdda0v9_image>; 217 avdd-1v8-supply = <&vcca1v8_image>; 218 status = "okay"; 219}; 220 221&hdmi_in { 222 hdmi_in_vp0: endpoint { 223 remote-endpoint = <&vp0_out_hdmi>; 224 }; 225}; 226 227&hdmi_out { 228 hdmi_out_con: endpoint { 229 remote-endpoint = <&hdmi_con_in>; 230 }; 231}; 232 233&hdmi_sound { 234 status = "okay"; 235}; 236 237&i2c0 { 238 status = "okay"; 239 240 vdd_cpu: regulator@1c { 241 compatible = "tcs,tcs4525"; 242 reg = <0x1c>; 243 fcs,suspend-voltage-selector = <1>; 244 regulator-name = "vdd_cpu"; 245 regulator-always-on; 246 regulator-boot-on; 247 regulator-min-microvolt = <800000>; 248 regulator-max-microvolt = <1150000>; 249 regulator-ramp-delay = <2300>; 250 vin-supply = <&vcc3v3_sys>; 251 252 regulator-state-mem { 253 regulator-off-in-suspend; 254 }; 255 }; 256 257 rk809: pmic@20 { 258 compatible = "rockchip,rk809"; 259 reg = <0x20>; 260 interrupt-parent = <&gpio0>; 261 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; 262 assigned-clocks = <&cru I2S1_MCLKOUT_TX>; 263 assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; 264 #clock-cells = <1>; 265 clock-names = "mclk"; 266 clocks = <&cru I2S1_MCLKOUT_TX>; 267 pinctrl-names = "default"; 268 pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>; 269 rockchip,system-power-controller; 270 #sound-dai-cells = <0>; 271 vcc1-supply = <&vcc3v3_sys>; 272 vcc2-supply = <&vcc3v3_sys>; 273 vcc3-supply = <&vcc3v3_sys>; 274 vcc4-supply = <&vcc3v3_sys>; 275 vcc5-supply = <&vcc3v3_sys>; 276 vcc6-supply = <&vcc3v3_sys>; 277 vcc7-supply = <&vcc3v3_sys>; 278 vcc8-supply = <&vcc3v3_sys>; 279 vcc9-supply = <&vcc3v3_sys>; 280 wakeup-source; 281 282 regulators { 283 vdd_logic: DCDC_REG1 { 284 regulator-name = "vdd_logic"; 285 regulator-always-on; 286 regulator-boot-on; 287 regulator-init-microvolt = <900000>; 288 regulator-initial-mode = <0x2>; 289 regulator-min-microvolt = <500000>; 290 regulator-max-microvolt = <1350000>; 291 regulator-ramp-delay = <6001>; 292 293 regulator-state-mem { 294 regulator-off-in-suspend; 295 }; 296 }; 297 298 vdd_gpu: DCDC_REG2 { 299 regulator-name = "vdd_gpu"; 300 regulator-always-on; 301 regulator-init-microvolt = <900000>; 302 regulator-initial-mode = <0x2>; 303 regulator-min-microvolt = <500000>; 304 regulator-max-microvolt = <1350000>; 305 regulator-ramp-delay = <6001>; 306 307 regulator-state-mem { 308 regulator-off-in-suspend; 309 }; 310 }; 311 312 vcc_ddr: DCDC_REG3 { 313 regulator-name = "vcc_ddr"; 314 regulator-always-on; 315 regulator-boot-on; 316 regulator-initial-mode = <0x2>; 317 318 regulator-state-mem { 319 regulator-on-in-suspend; 320 }; 321 }; 322 323 vdd_npu: DCDC_REG4 { 324 regulator-name = "vdd_npu"; 325 regulator-init-microvolt = <900000>; 326 regulator-initial-mode = <0x2>; 327 regulator-min-microvolt = <500000>; 328 regulator-max-microvolt = <1350000>; 329 regulator-ramp-delay = <6001>; 330 331 regulator-state-mem { 332 regulator-off-in-suspend; 333 }; 334 }; 335 336 vcc_1v8: DCDC_REG5 { 337 regulator-name = "vcc_1v8"; 338 regulator-always-on; 339 regulator-boot-on; 340 regulator-min-microvolt = <1800000>; 341 regulator-max-microvolt = <1800000>; 342 343 regulator-state-mem { 344 regulator-off-in-suspend; 345 }; 346 }; 347 348 vdda0v9_image: LDO_REG1 { 349 regulator-name = "vdda0v9_image"; 350 regulator-always-on; 351 regulator-min-microvolt = <900000>; 352 regulator-max-microvolt = <900000>; 353 354 regulator-state-mem { 355 regulator-off-in-suspend; 356 }; 357 }; 358 359 vdda_0v9: LDO_REG2 { 360 regulator-name = "vdda_0v9"; 361 regulator-always-on; 362 regulator-boot-on; 363 regulator-min-microvolt = <900000>; 364 regulator-max-microvolt = <900000>; 365 366 regulator-state-mem { 367 regulator-off-in-suspend; 368 }; 369 }; 370 371 vdda0v9_pmu: LDO_REG3 { 372 regulator-name = "vdda0v9_pmu"; 373 regulator-always-on; 374 regulator-boot-on; 375 regulator-min-microvolt = <900000>; 376 regulator-max-microvolt = <900000>; 377 378 regulator-state-mem { 379 regulator-on-in-suspend; 380 regulator-suspend-microvolt = <900000>; 381 }; 382 }; 383 384 vccio_acodec: LDO_REG4 { 385 regulator-name = "vccio_acodec"; 386 regulator-always-on; 387 regulator-boot-on; 388 regulator-min-microvolt = <3300000>; 389 regulator-max-microvolt = <3300000>; 390 391 regulator-state-mem { 392 regulator-off-in-suspend; 393 }; 394 }; 395 396 vccio_sd: LDO_REG5 { 397 regulator-name = "vccio_sd"; 398 regulator-min-microvolt = <1800000>; 399 regulator-max-microvolt = <3300000>; 400 401 regulator-state-mem { 402 regulator-off-in-suspend; 403 }; 404 }; 405 406 vcc3v3_pmu: LDO_REG6 { 407 regulator-name = "vcc3v3_pmu"; 408 regulator-always-on; 409 regulator-boot-on; 410 regulator-min-microvolt = <3300000>; 411 regulator-max-microvolt = <3300000>; 412 413 regulator-state-mem { 414 regulator-on-in-suspend; 415 regulator-suspend-microvolt = <3300000>; 416 }; 417 }; 418 419 vcca_1v8: LDO_REG7 { 420 regulator-name = "vcca_1v8"; 421 regulator-always-on; 422 regulator-boot-on; 423 regulator-min-microvolt = <1800000>; 424 regulator-max-microvolt = <1800000>; 425 426 regulator-state-mem { 427 regulator-off-in-suspend; 428 }; 429 }; 430 431 vcca1v8_pmu: LDO_REG8 { 432 regulator-name = "vcca1v8_pmu"; 433 regulator-always-on; 434 regulator-boot-on; 435 regulator-min-microvolt = <1800000>; 436 regulator-max-microvolt = <1800000>; 437 438 regulator-state-mem { 439 regulator-on-in-suspend; 440 regulator-suspend-microvolt = <1800000>; 441 }; 442 }; 443 444 vcca1v8_image: LDO_REG9 { 445 regulator-name = "vcca1v8_image"; 446 regulator-always-on; 447 regulator-min-microvolt = <1800000>; 448 regulator-max-microvolt = <1800000>; 449 450 regulator-state-mem { 451 regulator-off-in-suspend; 452 }; 453 }; 454 455 vcc_3v3: SWITCH_REG1 { 456 regulator-name = "vcc_3v3"; 457 regulator-always-on; 458 regulator-boot-on; 459 460 regulator-state-mem { 461 regulator-off-in-suspend; 462 }; 463 }; 464 465 vcc3v3_sd: SWITCH_REG2 { 466 regulator-name = "vcc3v3_sd"; 467 468 regulator-state-mem { 469 regulator-off-in-suspend; 470 }; 471 }; 472 }; 473 }; 474}; 475 476&i2s0_8ch { 477 status = "okay"; 478}; 479 480&i2s1_8ch { 481 rockchip,trcm-sync-tx-only; 482 status = "okay"; 483}; 484 485&mdio0 { 486 rgmii_phy0: ethernet-phy@0 { 487 compatible = "ethernet-phy-ieee802.3-c22"; 488 reg = <0x0>; 489 reset-assert-us = <20000>; 490 reset-deassert-us = <100000>; 491 reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 492 }; 493}; 494 495&pcie30phy { 496 status = "okay"; 497}; 498 499&pcie3x2 { 500 pinctrl-names = "default"; 501 pinctrl-0 = <&pcie_reset_pin>; 502 reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; 503 vpcie3v3-supply = <&vcc3v3_pcie>; 504 status = "okay"; 505}; 506 507&pinctrl { 508 fspi { 509 fspi_dual_io_pins: fspi-dual-io-pins { 510 rockchip,pins = 511 /* fspi_clk */ 512 <1 RK_PD0 1 &pcfg_pull_none>, 513 /* fspi_cs0n */ 514 <1 RK_PD3 1 &pcfg_pull_none>, 515 /* fspi_d0 */ 516 <1 RK_PD1 1 &pcfg_pull_none>, 517 /* fspi_d1 */ 518 <1 RK_PD2 1 &pcfg_pull_none>; 519 }; 520 }; 521 522 leds { 523 led_power_pin: led-power-pin { 524 rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; 525 }; 526 led_work_pin: led-work-pin { 527 rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 528 }; 529 }; 530 531 pcie { 532 pcie_reset_pin: pcie-reset-pin { 533 rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; 534 }; 535 vcc3v3_pcie_en_pin: vcc3v3-pcie-en-pin { 536 rockchip,pins = <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; 537 }; 538 }; 539 540 pmic { 541 pmic_int_l: pmic-int-l { 542 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 543 }; 544 }; 545 546 rk809 { 547 hp_det_pin: hp-det-pin { 548 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 549 }; 550 }; 551 552 usb { 553 vcc5v0_usb_host_en_pin: vcc5v0-usb-host-en-pin { 554 rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; 555 }; 556 vcc5v0_usb_otg_en_pin: vcc5v0-usb-dr-en-pin { 557 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; 558 }; 559 }; 560}; 561 562&pmu_io_domains { 563 pmuio1-supply = <&vcc3v3_pmu>; 564 pmuio2-supply = <&vcc3v3_pmu>; 565 vccio1-supply = <&vccio_acodec>; 566 vccio2-supply = <&vcc_1v8>; 567 vccio3-supply = <&vccio_sd>; 568 vccio4-supply = <&vcc_1v8>; 569 vccio5-supply = <&vcc_3v3>; 570 vccio6-supply = <&vcc_3v3>; 571 vccio7-supply = <&vcc_3v3>; 572 status = "okay"; 573}; 574 575&saradc { 576 vref-supply = <&vcca_1v8>; 577 status = "okay"; 578}; 579 580&sata2 { 581 status = "okay"; 582}; 583 584&sdhci { 585 bus-width = <8>; 586 max-frequency = <200000000>; 587 non-removable; 588 pinctrl-names = "default"; 589 pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe &emmc_rstnout>; 590 vmmc-supply = <&vcc_3v3>; 591 vqmmc-supply = <&vcc_1v8>; 592 status = "okay"; 593}; 594 595&sdmmc0 { 596 bus-width = <4>; 597 cap-sd-highspeed; 598 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; 599 disable-wp; 600 pinctrl-names = "default"; 601 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; 602 sd-uhs-sdr50; 603 vmmc-supply = <&vcc3v3_sd>; 604 vqmmc-supply = <&vccio_sd>; 605 status = "okay"; 606}; 607 608&sfc { 609 /* Dual I/O mode as the D2 pin conflicts with the eMMC */ 610 pinctrl-0 = <&fspi_dual_io_pins>; 611 pinctrl-names = "default"; 612 #address-cells = <1>; 613 #size-cells = <0>; 614 status = "okay"; 615 616 flash@0 { 617 compatible = "jedec,spi-nor"; 618 reg = <0>; 619 spi-max-frequency = <100000000>; 620 spi-rx-bus-width = <2>; 621 spi-tx-bus-width = <1>; 622 623 partitions { 624 compatible = "fixed-partitions"; 625 #address-cells = <1>; 626 #size-cells = <1>; 627 628 partition@0 { 629 label = "SPL"; 630 reg = <0x0 0xe0000>; 631 }; 632 partition@e0000 { 633 label = "U-Boot Env"; 634 reg = <0xe0000 0x20000>; 635 }; 636 partition@100000 { 637 label = "U-Boot"; 638 reg = <0x100000 0x200000>; 639 }; 640 partition@300000 { 641 label = "splash"; 642 reg = <0x300000 0x100000>; 643 }; 644 partition@400000 { 645 label = "Filesystem"; 646 reg = <0x400000 0xc00000>; 647 }; 648 }; 649 }; 650}; 651 652&tsadc { 653 rockchip,hw-tshut-mode = <1>; 654 rockchip,hw-tshut-polarity = <0>; 655 status = "okay"; 656}; 657 658&uart2 { 659 status = "okay"; 660}; 661 662&usb_host0_ehci { 663 status = "okay"; 664}; 665 666&usb_host0_ohci { 667 status = "okay"; 668}; 669 670&usb_host0_xhci { 671 dr_mode = "host"; 672 status = "okay"; 673}; 674 675&usb_host1_ehci { 676 status = "okay"; 677}; 678 679&usb_host1_ohci { 680 status = "okay"; 681}; 682 683&usb_host1_xhci { 684 status = "okay"; 685}; 686 687&usb2phy0 { 688 status = "okay"; 689}; 690 691&usb2phy0_host { 692 phy-supply = <&vcc5v0_usb_host>; 693 status = "okay"; 694}; 695 696&usb2phy0_otg { 697 phy-supply = <&vcc5v0_usb_otg>; 698 status = "okay"; 699}; 700 701&usb2phy1 { 702 status = "okay"; 703}; 704 705&usb2phy1_host { 706 phy-supply = <&vcc5v0_usb_host>; 707 status = "okay"; 708}; 709 710&usb2phy1_otg { 711 phy-supply = <&vcc5v0_usb_host>; 712 status = "okay"; 713}; 714 715&vop { 716 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; 717 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; 718 status = "okay"; 719}; 720 721&vop_mmu { 722 status = "okay"; 723}; 724 725&vp0 { 726 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 727 reg = <ROCKCHIP_VOP2_EP_HDMI0>; 728 remote-endpoint = <&hdmi_in_vp0>; 729 }; 730}; 731