1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2022 Hardkernel Co., Ltd.
4 *
5 */
6
7/dts-v1/;
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/leds/common.h>
10#include <dt-bindings/pinctrl/rockchip.h>
11#include <dt-bindings/soc/rockchip,vop2.h>
12#include "rk3568.dtsi"
13
14/ {
15	model = "Hardkernel ODROID-M1";
16	compatible = "rockchip,rk3568-odroid-m1", "rockchip,rk3568";
17
18	aliases {
19		ethernet0 = &gmac0;
20		i2c0 = &i2c3;
21		i2c3 = &i2c0;
22		mmc0 = &sdhci;
23		mmc1 = &sdmmc0;
24		serial0 = &uart1;
25		serial1 = &uart0;
26	};
27
28	chosen {
29		stdout-path = "serial2:1500000n8";
30	};
31
32	dc_12v: dc-12v-regulator {
33		compatible = "regulator-fixed";
34		regulator-name = "dc_12v";
35		regulator-always-on;
36		regulator-boot-on;
37		regulator-min-microvolt = <12000000>;
38		regulator-max-microvolt = <12000000>;
39	};
40
41	hdmi-con {
42		compatible = "hdmi-connector";
43		type = "a";
44
45		port {
46			hdmi_con_in: endpoint {
47				remote-endpoint = <&hdmi_out_con>;
48			};
49		};
50	};
51
52	ir-receiver {
53		compatible = "gpio-ir-receiver";
54		gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
55		pinctrl-names = "default";
56		pinctrl-0 = <&ir_receiver_pin>;
57	};
58
59	leds {
60		compatible = "gpio-leds";
61
62		led_power: led-0 {
63			gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
64			function = LED_FUNCTION_POWER;
65			color = <LED_COLOR_ID_RED>;
66			default-state = "keep";
67			linux,default-trigger = "default-on";
68			pinctrl-names = "default";
69			pinctrl-0 = <&led_power_pin>;
70		};
71		led_work: led-1 {
72			gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
73			function = LED_FUNCTION_HEARTBEAT;
74			color = <LED_COLOR_ID_BLUE>;
75			linux,default-trigger = "heartbeat";
76			pinctrl-names = "default";
77			pinctrl-0 = <&led_work_pin>;
78		};
79	};
80
81	rk809-sound {
82		compatible = "simple-audio-card";
83		pinctrl-names = "default";
84		pinctrl-0 = <&hp_det_pin>;
85		simple-audio-card,name = "Analog RK817";
86		simple-audio-card,format = "i2s";
87		simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
88		simple-audio-card,mclk-fs = <256>;
89		simple-audio-card,widgets =
90			"Headphone", "Headphones",
91			"Speaker", "Speaker";
92		simple-audio-card,routing =
93			"Headphones", "HPOL",
94			"Headphones", "HPOR",
95			"Speaker", "SPKO";
96
97		simple-audio-card,cpu {
98			sound-dai = <&i2s1_8ch>;
99		};
100
101		simple-audio-card,codec {
102			sound-dai = <&rk809>;
103		};
104	};
105
106	vcc3v3_pcie: vcc3v3-pcie-regulator {
107		compatible = "regulator-fixed";
108		regulator-name = "vcc3v3_pcie";
109		enable-active-high;
110		gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
111		pinctrl-names = "default";
112		pinctrl-0 = <&vcc3v3_pcie_en_pin>;
113		regulator-min-microvolt = <3300000>;
114		regulator-max-microvolt = <3300000>;
115		startup-delay-us = <5000>;
116		vin-supply = <&vcc3v3_sys>;
117	};
118
119	vcc3v3_sys: vcc3v3-sys-regulator {
120		compatible = "regulator-fixed";
121		regulator-name = "vcc3v3_sys";
122		regulator-always-on;
123		regulator-boot-on;
124		regulator-min-microvolt = <3300000>;
125		regulator-max-microvolt = <3300000>;
126		vin-supply = <&dc_12v>;
127	};
128
129	vcc5v0_sys: vcc5v0-sys-regulator {
130		compatible = "regulator-fixed";
131		regulator-name = "vcc5v0_sys";
132		regulator-always-on;
133		regulator-boot-on;
134		regulator-min-microvolt = <5000000>;
135		regulator-max-microvolt = <5000000>;
136		vin-supply = <&dc_12v>;
137	};
138
139	vcc5v0_usb_host: vcc5v0-usb-host-regulator {
140		compatible = "regulator-fixed";
141		regulator-name = "vcc5v0_usb_host";
142		enable-active-high;
143		gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
144		pinctrl-names = "default";
145		pinctrl-0 = <&vcc5v0_usb_host_en_pin>;
146		regulator-min-microvolt = <5000000>;
147		regulator-max-microvolt = <5000000>;
148		vin-supply = <&vcc5v0_sys>;
149	};
150
151	vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
152		compatible = "regulator-fixed";
153		regulator-name = "vcc5v0_usb_otg";
154		enable-active-high;
155		gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
156		pinctrl-names = "default";
157		pinctrl-0 = <&vcc5v0_usb_otg_en_pin>;
158		regulator-min-microvolt = <5000000>;
159		regulator-max-microvolt = <5000000>;
160		vin-supply = <&vcc5v0_sys>;
161	};
162};
163
164&combphy0 {
165	/* Used for USB3 */
166	phy-supply = <&vcc5v0_usb_host>;
167	status = "okay";
168};
169
170&combphy1 {
171	/* Used for USB3 */
172	phy-supply = <&vcc5v0_usb_otg>;
173	status = "okay";
174};
175
176&combphy2 {
177	/* used for SATA */
178	status = "okay";
179};
180
181&cpu0 {
182	cpu-supply = <&vdd_cpu>;
183};
184
185&cpu1 {
186	cpu-supply = <&vdd_cpu>;
187};
188
189&cpu2 {
190	cpu-supply = <&vdd_cpu>;
191};
192
193&cpu3 {
194	cpu-supply = <&vdd_cpu>;
195};
196
197&gmac0 {
198	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
199	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
200	assigned-clock-rates = <0>, <125000000>;
201	clock_in_out = "output";
202	phy-handle = <&rgmii_phy0>;
203	phy-mode = "rgmii";
204	phy-supply = <&vcc3v3_sys>;
205	pinctrl-names = "default";
206	pinctrl-0 = <&gmac0_miim
207		     &gmac0_tx_bus2
208		     &gmac0_rx_bus2
209		     &gmac0_rgmii_clk
210		     &gmac0_rgmii_bus>;
211	status = "okay";
212
213	tx_delay = <0x4f>;
214	rx_delay = <0x2d>;
215};
216
217&gpu {
218	mali-supply = <&vdd_gpu>;
219	status = "okay";
220};
221
222&hdmi {
223	avdd-0v9-supply = <&vdda0v9_image>;
224	avdd-1v8-supply = <&vcca1v8_image>;
225	status = "okay";
226};
227
228&hdmi_in {
229	hdmi_in_vp0: endpoint {
230		remote-endpoint = <&vp0_out_hdmi>;
231	};
232};
233
234&hdmi_out {
235	hdmi_out_con: endpoint {
236		remote-endpoint = <&hdmi_con_in>;
237	};
238};
239
240&hdmi_sound {
241	status = "okay";
242};
243
244&i2c0 {
245	status = "okay";
246
247	vdd_cpu: regulator@1c {
248		compatible = "tcs,tcs4525";
249		reg = <0x1c>;
250		fcs,suspend-voltage-selector = <1>;
251		regulator-name = "vdd_cpu";
252		regulator-always-on;
253		regulator-boot-on;
254		regulator-min-microvolt = <800000>;
255		regulator-max-microvolt = <1150000>;
256		regulator-ramp-delay = <2300>;
257		vin-supply = <&vcc3v3_sys>;
258
259		regulator-state-mem {
260			regulator-off-in-suspend;
261		};
262	};
263
264	rk809: pmic@20 {
265		compatible = "rockchip,rk809";
266		reg = <0x20>;
267		interrupt-parent = <&gpio0>;
268		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
269		assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
270		assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
271		#clock-cells = <1>;
272		clock-names = "mclk";
273		clocks = <&cru I2S1_MCLKOUT_TX>;
274		pinctrl-names = "default";
275		pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>;
276		rockchip,system-power-controller;
277		#sound-dai-cells = <0>;
278		vcc1-supply = <&vcc3v3_sys>;
279		vcc2-supply = <&vcc3v3_sys>;
280		vcc3-supply = <&vcc3v3_sys>;
281		vcc4-supply = <&vcc3v3_sys>;
282		vcc5-supply = <&vcc3v3_sys>;
283		vcc6-supply = <&vcc3v3_sys>;
284		vcc7-supply = <&vcc3v3_sys>;
285		vcc8-supply = <&vcc3v3_sys>;
286		vcc9-supply = <&vcc3v3_sys>;
287		wakeup-source;
288
289		regulators {
290			vdd_logic: DCDC_REG1 {
291				regulator-name = "vdd_logic";
292				regulator-always-on;
293				regulator-boot-on;
294				regulator-init-microvolt = <900000>;
295				regulator-initial-mode = <0x2>;
296				regulator-min-microvolt = <500000>;
297				regulator-max-microvolt = <1350000>;
298				regulator-ramp-delay = <6001>;
299
300				regulator-state-mem {
301					regulator-off-in-suspend;
302				};
303			};
304
305			vdd_gpu: DCDC_REG2 {
306				regulator-name = "vdd_gpu";
307				regulator-always-on;
308				regulator-init-microvolt = <900000>;
309				regulator-initial-mode = <0x2>;
310				regulator-min-microvolt = <500000>;
311				regulator-max-microvolt = <1350000>;
312				regulator-ramp-delay = <6001>;
313
314				regulator-state-mem {
315					regulator-off-in-suspend;
316				};
317			};
318
319			vcc_ddr: DCDC_REG3 {
320				regulator-name = "vcc_ddr";
321				regulator-always-on;
322				regulator-boot-on;
323				regulator-initial-mode = <0x2>;
324
325				regulator-state-mem {
326					regulator-on-in-suspend;
327				};
328			};
329
330			vdd_npu: DCDC_REG4 {
331				regulator-name = "vdd_npu";
332				regulator-init-microvolt = <900000>;
333				regulator-initial-mode = <0x2>;
334				regulator-min-microvolt = <500000>;
335				regulator-max-microvolt = <1350000>;
336				regulator-ramp-delay = <6001>;
337
338				regulator-state-mem {
339					regulator-off-in-suspend;
340				};
341			};
342
343			vcc_1v8: DCDC_REG5 {
344				regulator-name = "vcc_1v8";
345				regulator-always-on;
346				regulator-boot-on;
347				regulator-min-microvolt = <1800000>;
348				regulator-max-microvolt = <1800000>;
349
350				regulator-state-mem {
351					regulator-off-in-suspend;
352				};
353			};
354
355			vdda0v9_image: LDO_REG1 {
356				regulator-name = "vdda0v9_image";
357				regulator-always-on;
358				regulator-min-microvolt = <900000>;
359				regulator-max-microvolt = <900000>;
360
361				regulator-state-mem {
362					regulator-off-in-suspend;
363				};
364			};
365
366			vdda_0v9: LDO_REG2 {
367				regulator-name = "vdda_0v9";
368				regulator-always-on;
369				regulator-boot-on;
370				regulator-min-microvolt = <900000>;
371				regulator-max-microvolt = <900000>;
372
373				regulator-state-mem {
374					regulator-off-in-suspend;
375				};
376			};
377
378			vdda0v9_pmu: LDO_REG3 {
379				regulator-name = "vdda0v9_pmu";
380				regulator-always-on;
381				regulator-boot-on;
382				regulator-min-microvolt = <900000>;
383				regulator-max-microvolt = <900000>;
384
385				regulator-state-mem {
386					regulator-on-in-suspend;
387					regulator-suspend-microvolt = <900000>;
388				};
389			};
390
391			vccio_acodec: LDO_REG4 {
392				regulator-name = "vccio_acodec";
393				regulator-always-on;
394				regulator-boot-on;
395				regulator-min-microvolt = <3300000>;
396				regulator-max-microvolt = <3300000>;
397
398				regulator-state-mem {
399					regulator-off-in-suspend;
400				};
401			};
402
403			vccio_sd: LDO_REG5 {
404				regulator-name = "vccio_sd";
405				regulator-min-microvolt = <1800000>;
406				regulator-max-microvolt = <3300000>;
407
408				regulator-state-mem {
409					regulator-off-in-suspend;
410				};
411			};
412
413			vcc3v3_pmu: LDO_REG6 {
414				regulator-name = "vcc3v3_pmu";
415				regulator-always-on;
416				regulator-boot-on;
417				regulator-min-microvolt = <3300000>;
418				regulator-max-microvolt = <3300000>;
419
420				regulator-state-mem {
421					regulator-on-in-suspend;
422					regulator-suspend-microvolt = <3300000>;
423				};
424			};
425
426			vcca_1v8: LDO_REG7 {
427				regulator-name = "vcca_1v8";
428				regulator-always-on;
429				regulator-boot-on;
430				regulator-min-microvolt = <1800000>;
431				regulator-max-microvolt = <1800000>;
432
433				regulator-state-mem {
434					regulator-off-in-suspend;
435				};
436			};
437
438			vcca1v8_pmu: LDO_REG8 {
439				regulator-name = "vcca1v8_pmu";
440				regulator-always-on;
441				regulator-boot-on;
442				regulator-min-microvolt = <1800000>;
443				regulator-max-microvolt = <1800000>;
444
445				regulator-state-mem {
446					regulator-on-in-suspend;
447					regulator-suspend-microvolt = <1800000>;
448				};
449			};
450
451			vcca1v8_image: LDO_REG9 {
452				regulator-name = "vcca1v8_image";
453				regulator-always-on;
454				regulator-min-microvolt = <1800000>;
455				regulator-max-microvolt = <1800000>;
456
457				regulator-state-mem {
458					regulator-off-in-suspend;
459				};
460			};
461
462			vcc_3v3: SWITCH_REG1 {
463				regulator-name = "vcc_3v3";
464				regulator-always-on;
465				regulator-boot-on;
466
467				regulator-state-mem {
468					regulator-off-in-suspend;
469				};
470			};
471
472			vcc3v3_sd: SWITCH_REG2 {
473				regulator-name = "vcc3v3_sd";
474
475				regulator-state-mem {
476					regulator-off-in-suspend;
477				};
478			};
479		};
480	};
481};
482
483&i2s0_8ch {
484	status = "okay";
485};
486
487&i2s1_8ch {
488	rockchip,trcm-sync-tx-only;
489	status = "okay";
490};
491
492&mdio0 {
493	rgmii_phy0: ethernet-phy@0 {
494		compatible = "ethernet-phy-ieee802.3-c22";
495		reg = <0x0>;
496		reset-assert-us = <20000>;
497		reset-deassert-us = <100000>;
498		reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
499	};
500};
501
502&pcie30phy {
503	status = "okay";
504};
505
506&pcie3x2 {
507	pinctrl-names = "default";
508	pinctrl-0 = <&pcie_reset_pin>;
509	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
510	vpcie3v3-supply = <&vcc3v3_pcie>;
511	status = "okay";
512};
513
514&pinctrl {
515	fspi {
516		fspi_dual_io_pins: fspi-dual-io-pins {
517			rockchip,pins =
518				/* fspi_clk */
519				<1 RK_PD0 1 &pcfg_pull_none>,
520				/* fspi_cs0n */
521				<1 RK_PD3 1 &pcfg_pull_none>,
522				/* fspi_d0 */
523				<1 RK_PD1 1 &pcfg_pull_none>,
524				/* fspi_d1 */
525				<1 RK_PD2 1 &pcfg_pull_none>;
526		};
527	};
528
529	ir-receiver {
530		ir_receiver_pin: ir-receiver-pin {
531			/* external pullup to VCC3V3_SYS */
532			rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
533		};
534	};
535
536	leds {
537		led_power_pin: led-power-pin {
538			rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
539		};
540		led_work_pin: led-work-pin {
541			rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
542		};
543	};
544
545	pcie {
546		pcie_reset_pin: pcie-reset-pin {
547			rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
548		};
549		vcc3v3_pcie_en_pin: vcc3v3-pcie-en-pin {
550			rockchip,pins = <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
551		};
552	};
553
554	pmic {
555		pmic_int_l: pmic-int-l {
556			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
557		};
558	};
559
560	rk809 {
561		hp_det_pin: hp-det-pin {
562			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
563		};
564	};
565
566	usb {
567		vcc5v0_usb_host_en_pin: vcc5v0-usb-host-en-pin {
568			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
569		};
570		vcc5v0_usb_otg_en_pin: vcc5v0-usb-dr-en-pin {
571			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
572		};
573	};
574};
575
576&pmu_io_domains {
577	pmuio1-supply = <&vcc3v3_pmu>;
578	pmuio2-supply = <&vcc3v3_pmu>;
579	vccio1-supply = <&vccio_acodec>;
580	vccio2-supply = <&vcc_1v8>;
581	vccio3-supply = <&vccio_sd>;
582	vccio4-supply = <&vcc_1v8>;
583	vccio5-supply = <&vcc_3v3>;
584	vccio6-supply = <&vcc_3v3>;
585	vccio7-supply = <&vcc_3v3>;
586	status = "okay";
587};
588
589&saradc {
590	vref-supply = <&vcca_1v8>;
591	status = "okay";
592};
593
594&sata2 {
595	status = "okay";
596};
597
598&sdhci {
599	bus-width = <8>;
600	max-frequency = <200000000>;
601	non-removable;
602	pinctrl-names = "default";
603	pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe &emmc_rstnout>;
604	vmmc-supply = <&vcc_3v3>;
605	vqmmc-supply = <&vcc_1v8>;
606	status = "okay";
607};
608
609&sdmmc0 {
610	bus-width = <4>;
611	cap-sd-highspeed;
612	cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
613	disable-wp;
614	pinctrl-names = "default";
615	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
616	sd-uhs-sdr50;
617	vmmc-supply = <&vcc3v3_sd>;
618	vqmmc-supply = <&vccio_sd>;
619	status = "okay";
620};
621
622&sfc {
623	/* Dual I/O mode as the D2 pin conflicts with the eMMC */
624	pinctrl-0 = <&fspi_dual_io_pins>;
625	pinctrl-names = "default";
626	#address-cells = <1>;
627	#size-cells = <0>;
628	status = "okay";
629
630	flash@0 {
631		compatible = "jedec,spi-nor";
632		reg = <0>;
633		spi-max-frequency = <100000000>;
634		spi-rx-bus-width = <2>;
635		spi-tx-bus-width = <1>;
636
637		partitions {
638			compatible = "fixed-partitions";
639			#address-cells = <1>;
640			#size-cells = <1>;
641
642			partition@0 {
643				label = "SPL";
644				reg = <0x0 0xe0000>;
645			};
646			partition@e0000 {
647				label = "U-Boot Env";
648				reg = <0xe0000 0x20000>;
649			};
650			partition@100000 {
651				label = "U-Boot";
652				reg = <0x100000 0x200000>;
653			};
654			partition@300000 {
655				label = "splash";
656				reg = <0x300000 0x100000>;
657			};
658			partition@400000 {
659				label = "Filesystem";
660				reg = <0x400000 0xc00000>;
661			};
662		};
663	};
664};
665
666&tsadc {
667	rockchip,hw-tshut-mode = <1>;
668	rockchip,hw-tshut-polarity = <0>;
669	status = "okay";
670};
671
672&uart2 {
673	status = "okay";
674};
675
676&usb_host0_ehci {
677	status = "okay";
678};
679
680&usb_host0_ohci {
681	status = "okay";
682};
683
684&usb_host0_xhci {
685	dr_mode = "host";
686	status = "okay";
687};
688
689&usb_host1_ehci {
690	status = "okay";
691};
692
693&usb_host1_ohci {
694	status = "okay";
695};
696
697&usb_host1_xhci {
698	status = "okay";
699};
700
701&usb2phy0 {
702	status = "okay";
703};
704
705&usb2phy0_host {
706	phy-supply = <&vcc5v0_usb_host>;
707	status = "okay";
708};
709
710&usb2phy0_otg {
711	phy-supply = <&vcc5v0_usb_otg>;
712	status = "okay";
713};
714
715&usb2phy1 {
716	status = "okay";
717};
718
719&usb2phy1_host {
720	phy-supply = <&vcc5v0_usb_host>;
721	status = "okay";
722};
723
724&usb2phy1_otg {
725	phy-supply = <&vcc5v0_usb_host>;
726	status = "okay";
727};
728
729&vop {
730	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
731	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
732	status = "okay";
733};
734
735&vop_mmu {
736	status = "okay";
737};
738
739&vp0 {
740	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
741		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
742		remote-endpoint = <&hdmi_in_vp0>;
743	};
744};
745