1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2022 Hardkernel Co., Ltd. 4 * 5 */ 6 7/dts-v1/; 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/leds/common.h> 10#include <dt-bindings/pinctrl/rockchip.h> 11#include <dt-bindings/soc/rockchip,vop2.h> 12#include "rk3568.dtsi" 13 14/ { 15 model = "Hardkernel ODROID-M1"; 16 compatible = "hardkernel,odroid-m1", "rockchip,rk3568"; 17 18 aliases { 19 ethernet0 = &gmac0; 20 i2c0 = &i2c3; 21 i2c3 = &i2c0; 22 mmc0 = &sdhci; 23 mmc1 = &sdmmc0; 24 serial0 = &uart1; 25 serial1 = &uart0; 26 }; 27 28 chosen { 29 stdout-path = "serial2:1500000n8"; 30 }; 31 32 dc_12v: dc-12v-regulator { 33 compatible = "regulator-fixed"; 34 regulator-name = "dc_12v"; 35 regulator-always-on; 36 regulator-boot-on; 37 regulator-min-microvolt = <12000000>; 38 regulator-max-microvolt = <12000000>; 39 }; 40 41 hdmi-con { 42 compatible = "hdmi-connector"; 43 type = "a"; 44 45 port { 46 hdmi_con_in: endpoint { 47 remote-endpoint = <&hdmi_out_con>; 48 }; 49 }; 50 }; 51 52 ir-receiver { 53 compatible = "gpio-ir-receiver"; 54 gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>; 55 pinctrl-names = "default"; 56 pinctrl-0 = <&ir_receiver_pin>; 57 }; 58 59 leds { 60 compatible = "gpio-leds"; 61 62 led_power: led-0 { 63 gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; 64 function = LED_FUNCTION_POWER; 65 color = <LED_COLOR_ID_RED>; 66 default-state = "keep"; 67 linux,default-trigger = "default-on"; 68 pinctrl-names = "default"; 69 pinctrl-0 = <&led_power_pin>; 70 }; 71 led_work: led-1 { 72 gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; 73 function = LED_FUNCTION_HEARTBEAT; 74 color = <LED_COLOR_ID_BLUE>; 75 linux,default-trigger = "heartbeat"; 76 pinctrl-names = "default"; 77 pinctrl-0 = <&led_work_pin>; 78 }; 79 }; 80 81 rk809-sound { 82 compatible = "simple-audio-card"; 83 pinctrl-names = "default"; 84 pinctrl-0 = <&hp_det_pin>; 85 simple-audio-card,name = "Analog RK817"; 86 simple-audio-card,format = "i2s"; 87 simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; 88 simple-audio-card,mclk-fs = <256>; 89 simple-audio-card,widgets = 90 "Headphone", "Headphones", 91 "Speaker", "Speaker"; 92 simple-audio-card,routing = 93 "Headphones", "HPOL", 94 "Headphones", "HPOR", 95 "Speaker", "SPKO"; 96 97 simple-audio-card,cpu { 98 sound-dai = <&i2s1_8ch>; 99 }; 100 101 simple-audio-card,codec { 102 sound-dai = <&rk809>; 103 }; 104 }; 105 106 vcc3v3_pcie: vcc3v3-pcie-regulator { 107 compatible = "regulator-fixed"; 108 regulator-name = "vcc3v3_pcie"; 109 enable-active-high; 110 gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; 111 pinctrl-names = "default"; 112 pinctrl-0 = <&vcc3v3_pcie_en_pin>; 113 regulator-min-microvolt = <3300000>; 114 regulator-max-microvolt = <3300000>; 115 startup-delay-us = <5000>; 116 vin-supply = <&vcc3v3_sys>; 117 }; 118 119 vcc3v3_sys: vcc3v3-sys-regulator { 120 compatible = "regulator-fixed"; 121 regulator-name = "vcc3v3_sys"; 122 regulator-always-on; 123 regulator-boot-on; 124 regulator-min-microvolt = <3300000>; 125 regulator-max-microvolt = <3300000>; 126 vin-supply = <&dc_12v>; 127 }; 128 129 vcc5v0_sys: vcc5v0-sys-regulator { 130 compatible = "regulator-fixed"; 131 regulator-name = "vcc5v0_sys"; 132 regulator-always-on; 133 regulator-boot-on; 134 regulator-min-microvolt = <5000000>; 135 regulator-max-microvolt = <5000000>; 136 vin-supply = <&dc_12v>; 137 }; 138 139 vcc5v0_usb_host: vcc5v0-usb-host-regulator { 140 compatible = "regulator-fixed"; 141 regulator-name = "vcc5v0_usb_host"; 142 enable-active-high; 143 gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; 144 pinctrl-names = "default"; 145 pinctrl-0 = <&vcc5v0_usb_host_en_pin>; 146 regulator-min-microvolt = <5000000>; 147 regulator-max-microvolt = <5000000>; 148 vin-supply = <&vcc5v0_sys>; 149 }; 150 151 vcc5v0_usb_otg: vcc5v0-usb-otg-regulator { 152 compatible = "regulator-fixed"; 153 regulator-name = "vcc5v0_usb_otg"; 154 enable-active-high; 155 gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; 156 pinctrl-names = "default"; 157 pinctrl-0 = <&vcc5v0_usb_otg_en_pin>; 158 regulator-min-microvolt = <5000000>; 159 regulator-max-microvolt = <5000000>; 160 vin-supply = <&vcc5v0_sys>; 161 }; 162}; 163 164&combphy0 { 165 /* Used for USB3 */ 166 phy-supply = <&vcc5v0_usb_host>; 167 status = "okay"; 168}; 169 170&combphy1 { 171 /* Used for USB3 */ 172 phy-supply = <&vcc5v0_usb_otg>; 173 status = "okay"; 174}; 175 176&combphy2 { 177 /* used for SATA */ 178 status = "okay"; 179}; 180 181&cpu0 { 182 cpu-supply = <&vdd_cpu>; 183}; 184 185&cpu1 { 186 cpu-supply = <&vdd_cpu>; 187}; 188 189&cpu2 { 190 cpu-supply = <&vdd_cpu>; 191}; 192 193&cpu3 { 194 cpu-supply = <&vdd_cpu>; 195}; 196 197&gmac0 { 198 assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; 199 assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>; 200 assigned-clock-rates = <0>, <125000000>; 201 clock_in_out = "output"; 202 phy-handle = <&rgmii_phy0>; 203 phy-mode = "rgmii"; 204 phy-supply = <&vcc3v3_sys>; 205 pinctrl-names = "default"; 206 pinctrl-0 = <&gmac0_miim 207 &gmac0_tx_bus2 208 &gmac0_rx_bus2 209 &gmac0_rgmii_clk 210 &gmac0_rgmii_bus>; 211 status = "okay"; 212 213 tx_delay = <0x4f>; 214 rx_delay = <0x2d>; 215}; 216 217&gpu { 218 mali-supply = <&vdd_gpu>; 219 status = "okay"; 220}; 221 222&hdmi { 223 avdd-0v9-supply = <&vdda0v9_image>; 224 avdd-1v8-supply = <&vcca1v8_image>; 225 status = "okay"; 226}; 227 228&hdmi_in { 229 hdmi_in_vp0: endpoint { 230 remote-endpoint = <&vp0_out_hdmi>; 231 }; 232}; 233 234&hdmi_out { 235 hdmi_out_con: endpoint { 236 remote-endpoint = <&hdmi_con_in>; 237 }; 238}; 239 240&hdmi_sound { 241 status = "okay"; 242}; 243 244&i2c0 { 245 status = "okay"; 246 247 vdd_cpu: regulator@1c { 248 compatible = "tcs,tcs4525"; 249 reg = <0x1c>; 250 fcs,suspend-voltage-selector = <1>; 251 regulator-name = "vdd_cpu"; 252 regulator-always-on; 253 regulator-boot-on; 254 regulator-min-microvolt = <800000>; 255 regulator-max-microvolt = <1150000>; 256 regulator-ramp-delay = <2300>; 257 vin-supply = <&vcc3v3_sys>; 258 259 regulator-state-mem { 260 regulator-off-in-suspend; 261 }; 262 }; 263 264 rk809: pmic@20 { 265 compatible = "rockchip,rk809"; 266 reg = <0x20>; 267 interrupt-parent = <&gpio0>; 268 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; 269 assigned-clocks = <&cru I2S1_MCLKOUT_TX>; 270 assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; 271 #clock-cells = <1>; 272 clock-names = "mclk"; 273 clocks = <&cru I2S1_MCLKOUT_TX>; 274 pinctrl-names = "default"; 275 pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>; 276 rockchip,system-power-controller; 277 #sound-dai-cells = <0>; 278 vcc1-supply = <&vcc3v3_sys>; 279 vcc2-supply = <&vcc3v3_sys>; 280 vcc3-supply = <&vcc3v3_sys>; 281 vcc4-supply = <&vcc3v3_sys>; 282 vcc5-supply = <&vcc3v3_sys>; 283 vcc6-supply = <&vcc3v3_sys>; 284 vcc7-supply = <&vcc3v3_sys>; 285 vcc8-supply = <&vcc3v3_sys>; 286 vcc9-supply = <&vcc3v3_sys>; 287 wakeup-source; 288 289 regulators { 290 vdd_logic: DCDC_REG1 { 291 regulator-name = "vdd_logic"; 292 regulator-always-on; 293 regulator-boot-on; 294 regulator-initial-mode = <0x2>; 295 regulator-min-microvolt = <500000>; 296 regulator-max-microvolt = <1350000>; 297 regulator-ramp-delay = <6001>; 298 299 regulator-state-mem { 300 regulator-off-in-suspend; 301 }; 302 }; 303 304 vdd_gpu: DCDC_REG2 { 305 regulator-name = "vdd_gpu"; 306 regulator-always-on; 307 regulator-initial-mode = <0x2>; 308 regulator-min-microvolt = <500000>; 309 regulator-max-microvolt = <1350000>; 310 regulator-ramp-delay = <6001>; 311 312 regulator-state-mem { 313 regulator-off-in-suspend; 314 }; 315 }; 316 317 vcc_ddr: DCDC_REG3 { 318 regulator-name = "vcc_ddr"; 319 regulator-always-on; 320 regulator-boot-on; 321 regulator-initial-mode = <0x2>; 322 323 regulator-state-mem { 324 regulator-on-in-suspend; 325 }; 326 }; 327 328 vdd_npu: DCDC_REG4 { 329 regulator-name = "vdd_npu"; 330 regulator-initial-mode = <0x2>; 331 regulator-min-microvolt = <500000>; 332 regulator-max-microvolt = <1350000>; 333 regulator-ramp-delay = <6001>; 334 335 regulator-state-mem { 336 regulator-off-in-suspend; 337 }; 338 }; 339 340 vcc_1v8: DCDC_REG5 { 341 regulator-name = "vcc_1v8"; 342 regulator-always-on; 343 regulator-boot-on; 344 regulator-min-microvolt = <1800000>; 345 regulator-max-microvolt = <1800000>; 346 347 regulator-state-mem { 348 regulator-off-in-suspend; 349 }; 350 }; 351 352 vdda0v9_image: LDO_REG1 { 353 regulator-name = "vdda0v9_image"; 354 regulator-always-on; 355 regulator-min-microvolt = <900000>; 356 regulator-max-microvolt = <900000>; 357 358 regulator-state-mem { 359 regulator-off-in-suspend; 360 }; 361 }; 362 363 vdda_0v9: LDO_REG2 { 364 regulator-name = "vdda_0v9"; 365 regulator-always-on; 366 regulator-boot-on; 367 regulator-min-microvolt = <900000>; 368 regulator-max-microvolt = <900000>; 369 370 regulator-state-mem { 371 regulator-off-in-suspend; 372 }; 373 }; 374 375 vdda0v9_pmu: LDO_REG3 { 376 regulator-name = "vdda0v9_pmu"; 377 regulator-always-on; 378 regulator-boot-on; 379 regulator-min-microvolt = <900000>; 380 regulator-max-microvolt = <900000>; 381 382 regulator-state-mem { 383 regulator-on-in-suspend; 384 regulator-suspend-microvolt = <900000>; 385 }; 386 }; 387 388 vccio_acodec: LDO_REG4 { 389 regulator-name = "vccio_acodec"; 390 regulator-always-on; 391 regulator-boot-on; 392 regulator-min-microvolt = <3300000>; 393 regulator-max-microvolt = <3300000>; 394 395 regulator-state-mem { 396 regulator-off-in-suspend; 397 }; 398 }; 399 400 vccio_sd: LDO_REG5 { 401 regulator-name = "vccio_sd"; 402 regulator-min-microvolt = <1800000>; 403 regulator-max-microvolt = <3300000>; 404 405 regulator-state-mem { 406 regulator-off-in-suspend; 407 }; 408 }; 409 410 vcc3v3_pmu: LDO_REG6 { 411 regulator-name = "vcc3v3_pmu"; 412 regulator-always-on; 413 regulator-boot-on; 414 regulator-min-microvolt = <3300000>; 415 regulator-max-microvolt = <3300000>; 416 417 regulator-state-mem { 418 regulator-on-in-suspend; 419 regulator-suspend-microvolt = <3300000>; 420 }; 421 }; 422 423 vcca_1v8: LDO_REG7 { 424 regulator-name = "vcca_1v8"; 425 regulator-always-on; 426 regulator-boot-on; 427 regulator-min-microvolt = <1800000>; 428 regulator-max-microvolt = <1800000>; 429 430 regulator-state-mem { 431 regulator-off-in-suspend; 432 }; 433 }; 434 435 vcca1v8_pmu: LDO_REG8 { 436 regulator-name = "vcca1v8_pmu"; 437 regulator-always-on; 438 regulator-boot-on; 439 regulator-min-microvolt = <1800000>; 440 regulator-max-microvolt = <1800000>; 441 442 regulator-state-mem { 443 regulator-on-in-suspend; 444 regulator-suspend-microvolt = <1800000>; 445 }; 446 }; 447 448 vcca1v8_image: LDO_REG9 { 449 regulator-name = "vcca1v8_image"; 450 regulator-always-on; 451 regulator-min-microvolt = <1800000>; 452 regulator-max-microvolt = <1800000>; 453 454 regulator-state-mem { 455 regulator-off-in-suspend; 456 }; 457 }; 458 459 vcc_3v3: SWITCH_REG1 { 460 regulator-name = "vcc_3v3"; 461 regulator-always-on; 462 regulator-boot-on; 463 464 regulator-state-mem { 465 regulator-off-in-suspend; 466 }; 467 }; 468 469 vcc3v3_sd: SWITCH_REG2 { 470 regulator-name = "vcc3v3_sd"; 471 472 regulator-state-mem { 473 regulator-off-in-suspend; 474 }; 475 }; 476 }; 477 }; 478}; 479 480&i2s0_8ch { 481 status = "okay"; 482}; 483 484&i2s1_8ch { 485 rockchip,trcm-sync-tx-only; 486 status = "okay"; 487}; 488 489&mdio0 { 490 rgmii_phy0: ethernet-phy@0 { 491 compatible = "ethernet-phy-ieee802.3-c22"; 492 reg = <0x0>; 493 reset-assert-us = <20000>; 494 reset-deassert-us = <100000>; 495 reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 496 }; 497}; 498 499&pcie30phy { 500 status = "okay"; 501}; 502 503&pcie3x2 { 504 pinctrl-names = "default"; 505 pinctrl-0 = <&pcie_reset_pin>; 506 reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; 507 vpcie3v3-supply = <&vcc3v3_pcie>; 508 status = "okay"; 509}; 510 511&pinctrl { 512 fspi { 513 fspi_dual_io_pins: fspi-dual-io-pins { 514 rockchip,pins = 515 /* fspi_clk */ 516 <1 RK_PD0 1 &pcfg_pull_none>, 517 /* fspi_cs0n */ 518 <1 RK_PD3 1 &pcfg_pull_none>, 519 /* fspi_d0 */ 520 <1 RK_PD1 1 &pcfg_pull_none>, 521 /* fspi_d1 */ 522 <1 RK_PD2 1 &pcfg_pull_none>; 523 }; 524 }; 525 526 ir-receiver { 527 ir_receiver_pin: ir-receiver-pin { 528 /* external pullup to VCC3V3_SYS */ 529 rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 530 }; 531 }; 532 533 leds { 534 led_power_pin: led-power-pin { 535 rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; 536 }; 537 led_work_pin: led-work-pin { 538 rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 539 }; 540 }; 541 542 pcie { 543 pcie_reset_pin: pcie-reset-pin { 544 rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; 545 }; 546 vcc3v3_pcie_en_pin: vcc3v3-pcie-en-pin { 547 rockchip,pins = <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; 548 }; 549 }; 550 551 pmic { 552 pmic_int_l: pmic-int-l { 553 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 554 }; 555 }; 556 557 rk809 { 558 hp_det_pin: hp-det-pin { 559 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 560 }; 561 }; 562 563 usb { 564 vcc5v0_usb_host_en_pin: vcc5v0-usb-host-en-pin { 565 rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; 566 }; 567 vcc5v0_usb_otg_en_pin: vcc5v0-usb-dr-en-pin { 568 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; 569 }; 570 }; 571}; 572 573&pmu_io_domains { 574 pmuio1-supply = <&vcc3v3_pmu>; 575 pmuio2-supply = <&vcc3v3_pmu>; 576 vccio1-supply = <&vccio_acodec>; 577 vccio2-supply = <&vcc_1v8>; 578 vccio3-supply = <&vccio_sd>; 579 vccio4-supply = <&vcc_1v8>; 580 vccio5-supply = <&vcc_3v3>; 581 vccio6-supply = <&vcc_3v3>; 582 vccio7-supply = <&vcc_3v3>; 583 status = "okay"; 584}; 585 586&saradc { 587 vref-supply = <&vcca_1v8>; 588 status = "okay"; 589}; 590 591&sata2 { 592 status = "okay"; 593}; 594 595&sdhci { 596 bus-width = <8>; 597 max-frequency = <200000000>; 598 non-removable; 599 pinctrl-names = "default"; 600 pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe &emmc_rstnout>; 601 vmmc-supply = <&vcc_3v3>; 602 vqmmc-supply = <&vcc_1v8>; 603 status = "okay"; 604}; 605 606&sdmmc0 { 607 bus-width = <4>; 608 cap-sd-highspeed; 609 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; 610 disable-wp; 611 pinctrl-names = "default"; 612 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; 613 sd-uhs-sdr50; 614 vmmc-supply = <&vcc3v3_sd>; 615 vqmmc-supply = <&vccio_sd>; 616 status = "okay"; 617}; 618 619&sfc { 620 /* Dual I/O mode as the D2 pin conflicts with the eMMC */ 621 pinctrl-0 = <&fspi_dual_io_pins>; 622 pinctrl-names = "default"; 623 #address-cells = <1>; 624 #size-cells = <0>; 625 status = "okay"; 626 627 flash@0 { 628 compatible = "jedec,spi-nor"; 629 reg = <0>; 630 spi-max-frequency = <100000000>; 631 spi-rx-bus-width = <2>; 632 spi-tx-bus-width = <1>; 633 634 partitions { 635 compatible = "fixed-partitions"; 636 #address-cells = <1>; 637 #size-cells = <1>; 638 639 partition@0 { 640 label = "SPL"; 641 reg = <0x0 0xe0000>; 642 }; 643 partition@e0000 { 644 label = "U-Boot Env"; 645 reg = <0xe0000 0x20000>; 646 }; 647 partition@100000 { 648 label = "U-Boot"; 649 reg = <0x100000 0x200000>; 650 }; 651 partition@300000 { 652 label = "splash"; 653 reg = <0x300000 0x100000>; 654 }; 655 partition@400000 { 656 label = "Filesystem"; 657 reg = <0x400000 0xc00000>; 658 }; 659 }; 660 }; 661}; 662 663&tsadc { 664 rockchip,hw-tshut-mode = <1>; 665 rockchip,hw-tshut-polarity = <0>; 666 status = "okay"; 667}; 668 669&uart2 { 670 status = "okay"; 671}; 672 673&usb_host0_ehci { 674 status = "okay"; 675}; 676 677&usb_host0_ohci { 678 status = "okay"; 679}; 680 681&usb_host0_xhci { 682 dr_mode = "host"; 683 status = "okay"; 684}; 685 686&usb_host1_ehci { 687 status = "okay"; 688}; 689 690&usb_host1_ohci { 691 status = "okay"; 692}; 693 694&usb_host1_xhci { 695 status = "okay"; 696}; 697 698&usb2phy0 { 699 status = "okay"; 700}; 701 702&usb2phy0_host { 703 phy-supply = <&vcc5v0_usb_host>; 704 status = "okay"; 705}; 706 707&usb2phy0_otg { 708 phy-supply = <&vcc5v0_usb_otg>; 709 status = "okay"; 710}; 711 712&usb2phy1 { 713 status = "okay"; 714}; 715 716&usb2phy1_host { 717 phy-supply = <&vcc5v0_usb_host>; 718 status = "okay"; 719}; 720 721&usb2phy1_otg { 722 phy-supply = <&vcc5v0_usb_host>; 723 status = "okay"; 724}; 725 726&vop { 727 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; 728 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; 729 status = "okay"; 730}; 731 732&vop_mmu { 733 status = "okay"; 734}; 735 736&vp0 { 737 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 738 reg = <ROCKCHIP_VOP2_EP_HDMI0>; 739 remote-endpoint = <&hdmi_in_vp0>; 740 }; 741}; 742