1*fd358326SDongjin Kim// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*fd358326SDongjin Kim/*
3*fd358326SDongjin Kim * Copyright (c) 2022 Hardkernel Co., Ltd.
4*fd358326SDongjin Kim *
5*fd358326SDongjin Kim */
6*fd358326SDongjin Kim
7*fd358326SDongjin Kim/dts-v1/;
8*fd358326SDongjin Kim#include <dt-bindings/gpio/gpio.h>
9*fd358326SDongjin Kim#include <dt-bindings/leds/common.h>
10*fd358326SDongjin Kim#include <dt-bindings/pinctrl/rockchip.h>
11*fd358326SDongjin Kim#include "rk3568.dtsi"
12*fd358326SDongjin Kim
13*fd358326SDongjin Kim/ {
14*fd358326SDongjin Kim	model = "Hardkernel ODROID-M1";
15*fd358326SDongjin Kim	compatible = "rockchip,rk3568-odroid-m1", "rockchip,rk3568";
16*fd358326SDongjin Kim
17*fd358326SDongjin Kim	aliases {
18*fd358326SDongjin Kim		ethernet0 = &gmac0;
19*fd358326SDongjin Kim		i2c0 = &i2c3;
20*fd358326SDongjin Kim		i2c3 = &i2c0;
21*fd358326SDongjin Kim		mmc0 = &sdhci;
22*fd358326SDongjin Kim		mmc1 = &sdmmc0;
23*fd358326SDongjin Kim		serial0 = &uart1;
24*fd358326SDongjin Kim		serial1 = &uart0;
25*fd358326SDongjin Kim	};
26*fd358326SDongjin Kim
27*fd358326SDongjin Kim	chosen {
28*fd358326SDongjin Kim		stdout-path = "serial2:1500000n8";
29*fd358326SDongjin Kim	};
30*fd358326SDongjin Kim
31*fd358326SDongjin Kim	dc_12v: dc-12v-regulator {
32*fd358326SDongjin Kim		compatible = "regulator-fixed";
33*fd358326SDongjin Kim		regulator-name = "dc_12v";
34*fd358326SDongjin Kim		regulator-always-on;
35*fd358326SDongjin Kim		regulator-boot-on;
36*fd358326SDongjin Kim		regulator-min-microvolt = <12000000>;
37*fd358326SDongjin Kim		regulator-max-microvolt = <12000000>;
38*fd358326SDongjin Kim	};
39*fd358326SDongjin Kim
40*fd358326SDongjin Kim	leds {
41*fd358326SDongjin Kim		compatible = "gpio-leds";
42*fd358326SDongjin Kim
43*fd358326SDongjin Kim		led_power: led-0 {
44*fd358326SDongjin Kim			gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
45*fd358326SDongjin Kim			function = LED_FUNCTION_POWER;
46*fd358326SDongjin Kim			color = <LED_COLOR_ID_RED>;
47*fd358326SDongjin Kim			default-state = "keep";
48*fd358326SDongjin Kim			linux,default-trigger = "default-on";
49*fd358326SDongjin Kim			pinctrl-names = "default";
50*fd358326SDongjin Kim			pinctrl-0 = <&led_power_pin>;
51*fd358326SDongjin Kim		};
52*fd358326SDongjin Kim		led_work: led-1 {
53*fd358326SDongjin Kim			gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
54*fd358326SDongjin Kim			function = LED_FUNCTION_HEARTBEAT;
55*fd358326SDongjin Kim			color = <LED_COLOR_ID_BLUE>;
56*fd358326SDongjin Kim			linux,default-trigger = "heartbeat";
57*fd358326SDongjin Kim			pinctrl-names = "default";
58*fd358326SDongjin Kim			pinctrl-0 = <&led_work_pin>;
59*fd358326SDongjin Kim		};
60*fd358326SDongjin Kim	};
61*fd358326SDongjin Kim
62*fd358326SDongjin Kim	vcc3v3_sys: vcc3v3-sys-regulator {
63*fd358326SDongjin Kim		compatible = "regulator-fixed";
64*fd358326SDongjin Kim		regulator-name = "vcc3v3_sys";
65*fd358326SDongjin Kim		regulator-always-on;
66*fd358326SDongjin Kim		regulator-boot-on;
67*fd358326SDongjin Kim		regulator-min-microvolt = <3300000>;
68*fd358326SDongjin Kim		regulator-max-microvolt = <3300000>;
69*fd358326SDongjin Kim		vin-supply = <&dc_12v>;
70*fd358326SDongjin Kim	};
71*fd358326SDongjin Kim};
72*fd358326SDongjin Kim
73*fd358326SDongjin Kim&cpu0 {
74*fd358326SDongjin Kim	cpu-supply = <&vdd_cpu>;
75*fd358326SDongjin Kim};
76*fd358326SDongjin Kim
77*fd358326SDongjin Kim&cpu1 {
78*fd358326SDongjin Kim	cpu-supply = <&vdd_cpu>;
79*fd358326SDongjin Kim};
80*fd358326SDongjin Kim
81*fd358326SDongjin Kim&cpu2 {
82*fd358326SDongjin Kim	cpu-supply = <&vdd_cpu>;
83*fd358326SDongjin Kim};
84*fd358326SDongjin Kim
85*fd358326SDongjin Kim&cpu3 {
86*fd358326SDongjin Kim	cpu-supply = <&vdd_cpu>;
87*fd358326SDongjin Kim};
88*fd358326SDongjin Kim
89*fd358326SDongjin Kim&gmac0 {
90*fd358326SDongjin Kim	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
91*fd358326SDongjin Kim	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
92*fd358326SDongjin Kim	assigned-clock-rates = <0>, <125000000>;
93*fd358326SDongjin Kim	clock_in_out = "output";
94*fd358326SDongjin Kim	phy-handle = <&rgmii_phy0>;
95*fd358326SDongjin Kim	phy-mode = "rgmii";
96*fd358326SDongjin Kim	phy-supply = <&vcc3v3_sys>;
97*fd358326SDongjin Kim	pinctrl-names = "default";
98*fd358326SDongjin Kim	pinctrl-0 = <&gmac0_miim
99*fd358326SDongjin Kim		     &gmac0_tx_bus2
100*fd358326SDongjin Kim		     &gmac0_rx_bus2
101*fd358326SDongjin Kim		     &gmac0_rgmii_clk
102*fd358326SDongjin Kim		     &gmac0_rgmii_bus>;
103*fd358326SDongjin Kim	status = "okay";
104*fd358326SDongjin Kim
105*fd358326SDongjin Kim	tx_delay = <0x4f>;
106*fd358326SDongjin Kim	rx_delay = <0x2d>;
107*fd358326SDongjin Kim};
108*fd358326SDongjin Kim
109*fd358326SDongjin Kim&i2c0 {
110*fd358326SDongjin Kim	status = "okay";
111*fd358326SDongjin Kim
112*fd358326SDongjin Kim	vdd_cpu: regulator@1c {
113*fd358326SDongjin Kim		compatible = "tcs,tcs4525";
114*fd358326SDongjin Kim		reg = <0x1c>;
115*fd358326SDongjin Kim		fcs,suspend-voltage-selector = <1>;
116*fd358326SDongjin Kim		regulator-name = "vdd_cpu";
117*fd358326SDongjin Kim		regulator-always-on;
118*fd358326SDongjin Kim		regulator-boot-on;
119*fd358326SDongjin Kim		regulator-min-microvolt = <800000>;
120*fd358326SDongjin Kim		regulator-max-microvolt = <1150000>;
121*fd358326SDongjin Kim		regulator-ramp-delay = <2300>;
122*fd358326SDongjin Kim		vin-supply = <&vcc3v3_sys>;
123*fd358326SDongjin Kim
124*fd358326SDongjin Kim		regulator-state-mem {
125*fd358326SDongjin Kim			regulator-off-in-suspend;
126*fd358326SDongjin Kim		};
127*fd358326SDongjin Kim	};
128*fd358326SDongjin Kim
129*fd358326SDongjin Kim	rk809: pmic@20 {
130*fd358326SDongjin Kim		compatible = "rockchip,rk809";
131*fd358326SDongjin Kim		reg = <0x20>;
132*fd358326SDongjin Kim		interrupt-parent = <&gpio0>;
133*fd358326SDongjin Kim		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
134*fd358326SDongjin Kim		#clock-cells = <1>;
135*fd358326SDongjin Kim		pinctrl-names = "default";
136*fd358326SDongjin Kim		pinctrl-0 = <&pmic_int_l>;
137*fd358326SDongjin Kim		rockchip,system-power-controller;
138*fd358326SDongjin Kim		vcc1-supply = <&vcc3v3_sys>;
139*fd358326SDongjin Kim		vcc2-supply = <&vcc3v3_sys>;
140*fd358326SDongjin Kim		vcc3-supply = <&vcc3v3_sys>;
141*fd358326SDongjin Kim		vcc4-supply = <&vcc3v3_sys>;
142*fd358326SDongjin Kim		vcc5-supply = <&vcc3v3_sys>;
143*fd358326SDongjin Kim		vcc6-supply = <&vcc3v3_sys>;
144*fd358326SDongjin Kim		vcc7-supply = <&vcc3v3_sys>;
145*fd358326SDongjin Kim		vcc8-supply = <&vcc3v3_sys>;
146*fd358326SDongjin Kim		vcc9-supply = <&vcc3v3_sys>;
147*fd358326SDongjin Kim		wakeup-source;
148*fd358326SDongjin Kim
149*fd358326SDongjin Kim		regulators {
150*fd358326SDongjin Kim			vdd_logic: DCDC_REG1 {
151*fd358326SDongjin Kim				regulator-name = "vdd_logic";
152*fd358326SDongjin Kim				regulator-always-on;
153*fd358326SDongjin Kim				regulator-boot-on;
154*fd358326SDongjin Kim				regulator-init-microvolt = <900000>;
155*fd358326SDongjin Kim				regulator-initial-mode = <0x2>;
156*fd358326SDongjin Kim				regulator-min-microvolt = <500000>;
157*fd358326SDongjin Kim				regulator-max-microvolt = <1350000>;
158*fd358326SDongjin Kim				regulator-ramp-delay = <6001>;
159*fd358326SDongjin Kim
160*fd358326SDongjin Kim				regulator-state-mem {
161*fd358326SDongjin Kim					regulator-off-in-suspend;
162*fd358326SDongjin Kim				};
163*fd358326SDongjin Kim			};
164*fd358326SDongjin Kim
165*fd358326SDongjin Kim			vdd_gpu: DCDC_REG2 {
166*fd358326SDongjin Kim				regulator-name = "vdd_gpu";
167*fd358326SDongjin Kim				regulator-always-on;
168*fd358326SDongjin Kim				regulator-init-microvolt = <900000>;
169*fd358326SDongjin Kim				regulator-initial-mode = <0x2>;
170*fd358326SDongjin Kim				regulator-min-microvolt = <500000>;
171*fd358326SDongjin Kim				regulator-max-microvolt = <1350000>;
172*fd358326SDongjin Kim				regulator-ramp-delay = <6001>;
173*fd358326SDongjin Kim
174*fd358326SDongjin Kim				regulator-state-mem {
175*fd358326SDongjin Kim					regulator-off-in-suspend;
176*fd358326SDongjin Kim				};
177*fd358326SDongjin Kim			};
178*fd358326SDongjin Kim
179*fd358326SDongjin Kim			vcc_ddr: DCDC_REG3 {
180*fd358326SDongjin Kim				regulator-name = "vcc_ddr";
181*fd358326SDongjin Kim				regulator-always-on;
182*fd358326SDongjin Kim				regulator-boot-on;
183*fd358326SDongjin Kim				regulator-initial-mode = <0x2>;
184*fd358326SDongjin Kim
185*fd358326SDongjin Kim				regulator-state-mem {
186*fd358326SDongjin Kim					regulator-on-in-suspend;
187*fd358326SDongjin Kim				};
188*fd358326SDongjin Kim			};
189*fd358326SDongjin Kim
190*fd358326SDongjin Kim			vdd_npu: DCDC_REG4 {
191*fd358326SDongjin Kim				regulator-name = "vdd_npu";
192*fd358326SDongjin Kim				regulator-init-microvolt = <900000>;
193*fd358326SDongjin Kim				regulator-initial-mode = <0x2>;
194*fd358326SDongjin Kim				regulator-min-microvolt = <500000>;
195*fd358326SDongjin Kim				regulator-max-microvolt = <1350000>;
196*fd358326SDongjin Kim				regulator-ramp-delay = <6001>;
197*fd358326SDongjin Kim
198*fd358326SDongjin Kim				regulator-state-mem {
199*fd358326SDongjin Kim					regulator-off-in-suspend;
200*fd358326SDongjin Kim				};
201*fd358326SDongjin Kim			};
202*fd358326SDongjin Kim
203*fd358326SDongjin Kim			vcc_1v8: DCDC_REG5 {
204*fd358326SDongjin Kim				regulator-name = "vcc_1v8";
205*fd358326SDongjin Kim				regulator-always-on;
206*fd358326SDongjin Kim				regulator-boot-on;
207*fd358326SDongjin Kim				regulator-min-microvolt = <1800000>;
208*fd358326SDongjin Kim				regulator-max-microvolt = <1800000>;
209*fd358326SDongjin Kim
210*fd358326SDongjin Kim				regulator-state-mem {
211*fd358326SDongjin Kim					regulator-off-in-suspend;
212*fd358326SDongjin Kim				};
213*fd358326SDongjin Kim			};
214*fd358326SDongjin Kim
215*fd358326SDongjin Kim			vdda0v9_image: LDO_REG1 {
216*fd358326SDongjin Kim				regulator-name = "vdda0v9_image";
217*fd358326SDongjin Kim				regulator-always-on;
218*fd358326SDongjin Kim				regulator-min-microvolt = <900000>;
219*fd358326SDongjin Kim				regulator-max-microvolt = <900000>;
220*fd358326SDongjin Kim
221*fd358326SDongjin Kim				regulator-state-mem {
222*fd358326SDongjin Kim					regulator-off-in-suspend;
223*fd358326SDongjin Kim				};
224*fd358326SDongjin Kim			};
225*fd358326SDongjin Kim
226*fd358326SDongjin Kim			vdda_0v9: LDO_REG2 {
227*fd358326SDongjin Kim				regulator-name = "vdda_0v9";
228*fd358326SDongjin Kim				regulator-always-on;
229*fd358326SDongjin Kim				regulator-boot-on;
230*fd358326SDongjin Kim				regulator-min-microvolt = <900000>;
231*fd358326SDongjin Kim				regulator-max-microvolt = <900000>;
232*fd358326SDongjin Kim
233*fd358326SDongjin Kim				regulator-state-mem {
234*fd358326SDongjin Kim					regulator-off-in-suspend;
235*fd358326SDongjin Kim				};
236*fd358326SDongjin Kim			};
237*fd358326SDongjin Kim
238*fd358326SDongjin Kim			vdda0v9_pmu: LDO_REG3 {
239*fd358326SDongjin Kim				regulator-name = "vdda0v9_pmu";
240*fd358326SDongjin Kim				regulator-always-on;
241*fd358326SDongjin Kim				regulator-boot-on;
242*fd358326SDongjin Kim				regulator-min-microvolt = <900000>;
243*fd358326SDongjin Kim				regulator-max-microvolt = <900000>;
244*fd358326SDongjin Kim
245*fd358326SDongjin Kim				regulator-state-mem {
246*fd358326SDongjin Kim					regulator-on-in-suspend;
247*fd358326SDongjin Kim					regulator-suspend-microvolt = <900000>;
248*fd358326SDongjin Kim				};
249*fd358326SDongjin Kim			};
250*fd358326SDongjin Kim
251*fd358326SDongjin Kim			vccio_acodec: LDO_REG4 {
252*fd358326SDongjin Kim				regulator-name = "vccio_acodec";
253*fd358326SDongjin Kim				regulator-always-on;
254*fd358326SDongjin Kim				regulator-boot-on;
255*fd358326SDongjin Kim				regulator-min-microvolt = <3300000>;
256*fd358326SDongjin Kim				regulator-max-microvolt = <3300000>;
257*fd358326SDongjin Kim
258*fd358326SDongjin Kim				regulator-state-mem {
259*fd358326SDongjin Kim					regulator-off-in-suspend;
260*fd358326SDongjin Kim				};
261*fd358326SDongjin Kim			};
262*fd358326SDongjin Kim
263*fd358326SDongjin Kim			vccio_sd: LDO_REG5 {
264*fd358326SDongjin Kim				regulator-name = "vccio_sd";
265*fd358326SDongjin Kim				regulator-min-microvolt = <1800000>;
266*fd358326SDongjin Kim				regulator-max-microvolt = <3300000>;
267*fd358326SDongjin Kim
268*fd358326SDongjin Kim				regulator-state-mem {
269*fd358326SDongjin Kim					regulator-off-in-suspend;
270*fd358326SDongjin Kim				};
271*fd358326SDongjin Kim			};
272*fd358326SDongjin Kim
273*fd358326SDongjin Kim			vcc3v3_pmu: LDO_REG6 {
274*fd358326SDongjin Kim				regulator-name = "vcc3v3_pmu";
275*fd358326SDongjin Kim				regulator-always-on;
276*fd358326SDongjin Kim				regulator-boot-on;
277*fd358326SDongjin Kim				regulator-min-microvolt = <3300000>;
278*fd358326SDongjin Kim				regulator-max-microvolt = <3300000>;
279*fd358326SDongjin Kim
280*fd358326SDongjin Kim				regulator-state-mem {
281*fd358326SDongjin Kim					regulator-on-in-suspend;
282*fd358326SDongjin Kim					regulator-suspend-microvolt = <3300000>;
283*fd358326SDongjin Kim				};
284*fd358326SDongjin Kim			};
285*fd358326SDongjin Kim
286*fd358326SDongjin Kim			vcca_1v8: LDO_REG7 {
287*fd358326SDongjin Kim				regulator-name = "vcca_1v8";
288*fd358326SDongjin Kim				regulator-always-on;
289*fd358326SDongjin Kim				regulator-boot-on;
290*fd358326SDongjin Kim				regulator-min-microvolt = <1800000>;
291*fd358326SDongjin Kim				regulator-max-microvolt = <1800000>;
292*fd358326SDongjin Kim
293*fd358326SDongjin Kim				regulator-state-mem {
294*fd358326SDongjin Kim					regulator-off-in-suspend;
295*fd358326SDongjin Kim				};
296*fd358326SDongjin Kim			};
297*fd358326SDongjin Kim
298*fd358326SDongjin Kim			vcca1v8_pmu: LDO_REG8 {
299*fd358326SDongjin Kim				regulator-name = "vcca1v8_pmu";
300*fd358326SDongjin Kim				regulator-always-on;
301*fd358326SDongjin Kim				regulator-boot-on;
302*fd358326SDongjin Kim				regulator-min-microvolt = <1800000>;
303*fd358326SDongjin Kim				regulator-max-microvolt = <1800000>;
304*fd358326SDongjin Kim
305*fd358326SDongjin Kim				regulator-state-mem {
306*fd358326SDongjin Kim					regulator-on-in-suspend;
307*fd358326SDongjin Kim					regulator-suspend-microvolt = <1800000>;
308*fd358326SDongjin Kim				};
309*fd358326SDongjin Kim			};
310*fd358326SDongjin Kim
311*fd358326SDongjin Kim			vcca1v8_image: LDO_REG9 {
312*fd358326SDongjin Kim				regulator-name = "vcca1v8_image";
313*fd358326SDongjin Kim				regulator-always-on;
314*fd358326SDongjin Kim				regulator-min-microvolt = <1800000>;
315*fd358326SDongjin Kim				regulator-max-microvolt = <1800000>;
316*fd358326SDongjin Kim
317*fd358326SDongjin Kim				regulator-state-mem {
318*fd358326SDongjin Kim					regulator-off-in-suspend;
319*fd358326SDongjin Kim				};
320*fd358326SDongjin Kim			};
321*fd358326SDongjin Kim
322*fd358326SDongjin Kim			vcc_3v3: SWITCH_REG1 {
323*fd358326SDongjin Kim				regulator-name = "vcc_3v3";
324*fd358326SDongjin Kim				regulator-always-on;
325*fd358326SDongjin Kim				regulator-boot-on;
326*fd358326SDongjin Kim
327*fd358326SDongjin Kim				regulator-state-mem {
328*fd358326SDongjin Kim					regulator-off-in-suspend;
329*fd358326SDongjin Kim				};
330*fd358326SDongjin Kim			};
331*fd358326SDongjin Kim
332*fd358326SDongjin Kim			vcc3v3_sd: SWITCH_REG2 {
333*fd358326SDongjin Kim				regulator-name = "vcc3v3_sd";
334*fd358326SDongjin Kim
335*fd358326SDongjin Kim				regulator-state-mem {
336*fd358326SDongjin Kim					regulator-off-in-suspend;
337*fd358326SDongjin Kim				};
338*fd358326SDongjin Kim			};
339*fd358326SDongjin Kim		};
340*fd358326SDongjin Kim	};
341*fd358326SDongjin Kim};
342*fd358326SDongjin Kim
343*fd358326SDongjin Kim&mdio0 {
344*fd358326SDongjin Kim	rgmii_phy0: ethernet-phy@0 {
345*fd358326SDongjin Kim		compatible = "ethernet-phy-ieee802.3-c22";
346*fd358326SDongjin Kim		reg = <0x0>;
347*fd358326SDongjin Kim		reset-assert-us = <20000>;
348*fd358326SDongjin Kim		reset-deassert-us = <100000>;
349*fd358326SDongjin Kim		reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
350*fd358326SDongjin Kim	};
351*fd358326SDongjin Kim};
352*fd358326SDongjin Kim
353*fd358326SDongjin Kim&pinctrl {
354*fd358326SDongjin Kim	leds {
355*fd358326SDongjin Kim		led_power_pin: led-power-pin {
356*fd358326SDongjin Kim			rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
357*fd358326SDongjin Kim		};
358*fd358326SDongjin Kim		led_work_pin: led-work-pin {
359*fd358326SDongjin Kim			rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
360*fd358326SDongjin Kim		};
361*fd358326SDongjin Kim	};
362*fd358326SDongjin Kim
363*fd358326SDongjin Kim	pmic {
364*fd358326SDongjin Kim		pmic_int_l: pmic-int-l {
365*fd358326SDongjin Kim			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
366*fd358326SDongjin Kim		};
367*fd358326SDongjin Kim	};
368*fd358326SDongjin Kim};
369*fd358326SDongjin Kim
370*fd358326SDongjin Kim&pmu_io_domains {
371*fd358326SDongjin Kim	pmuio1-supply = <&vcc3v3_pmu>;
372*fd358326SDongjin Kim	pmuio2-supply = <&vcc3v3_pmu>;
373*fd358326SDongjin Kim	vccio1-supply = <&vccio_acodec>;
374*fd358326SDongjin Kim	vccio2-supply = <&vcc_1v8>;
375*fd358326SDongjin Kim	vccio3-supply = <&vccio_sd>;
376*fd358326SDongjin Kim	vccio4-supply = <&vcc_1v8>;
377*fd358326SDongjin Kim	vccio5-supply = <&vcc_3v3>;
378*fd358326SDongjin Kim	vccio6-supply = <&vcc_3v3>;
379*fd358326SDongjin Kim	vccio7-supply = <&vcc_3v3>;
380*fd358326SDongjin Kim	status = "okay";
381*fd358326SDongjin Kim};
382*fd358326SDongjin Kim
383*fd358326SDongjin Kim&saradc {
384*fd358326SDongjin Kim	vref-supply = <&vcca_1v8>;
385*fd358326SDongjin Kim	status = "okay";
386*fd358326SDongjin Kim};
387*fd358326SDongjin Kim
388*fd358326SDongjin Kim&sdhci {
389*fd358326SDongjin Kim	bus-width = <8>;
390*fd358326SDongjin Kim	max-frequency = <200000000>;
391*fd358326SDongjin Kim	non-removable;
392*fd358326SDongjin Kim	pinctrl-names = "default";
393*fd358326SDongjin Kim	pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe &emmc_rstnout>;
394*fd358326SDongjin Kim	vmmc-supply = <&vcc_3v3>;
395*fd358326SDongjin Kim	vqmmc-supply = <&vcc_1v8>;
396*fd358326SDongjin Kim	status = "okay";
397*fd358326SDongjin Kim};
398*fd358326SDongjin Kim
399*fd358326SDongjin Kim&sdmmc0 {
400*fd358326SDongjin Kim	bus-width = <4>;
401*fd358326SDongjin Kim	cap-sd-highspeed;
402*fd358326SDongjin Kim	cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
403*fd358326SDongjin Kim	disable-wp;
404*fd358326SDongjin Kim	pinctrl-names = "default";
405*fd358326SDongjin Kim	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
406*fd358326SDongjin Kim	sd-uhs-sdr50;
407*fd358326SDongjin Kim	vmmc-supply = <&vcc3v3_sd>;
408*fd358326SDongjin Kim	vqmmc-supply = <&vccio_sd>;
409*fd358326SDongjin Kim	status = "okay";
410*fd358326SDongjin Kim};
411*fd358326SDongjin Kim
412*fd358326SDongjin Kim&uart2 {
413*fd358326SDongjin Kim	status = "okay";
414*fd358326SDongjin Kim};
415