1fd358326SDongjin Kim// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2fd358326SDongjin Kim/*
3fd358326SDongjin Kim * Copyright (c) 2022 Hardkernel Co., Ltd.
4fd358326SDongjin Kim *
5fd358326SDongjin Kim */
6fd358326SDongjin Kim
7fd358326SDongjin Kim/dts-v1/;
8fd358326SDongjin Kim#include <dt-bindings/gpio/gpio.h>
9fd358326SDongjin Kim#include <dt-bindings/leds/common.h>
10fd358326SDongjin Kim#include <dt-bindings/pinctrl/rockchip.h>
11913404aaSAurelien Jarno#include <dt-bindings/soc/rockchip,vop2.h>
12fd358326SDongjin Kim#include "rk3568.dtsi"
13fd358326SDongjin Kim
14fd358326SDongjin Kim/ {
15fd358326SDongjin Kim	model = "Hardkernel ODROID-M1";
16fd358326SDongjin Kim	compatible = "rockchip,rk3568-odroid-m1", "rockchip,rk3568";
17fd358326SDongjin Kim
18fd358326SDongjin Kim	aliases {
19fd358326SDongjin Kim		ethernet0 = &gmac0;
20fd358326SDongjin Kim		i2c0 = &i2c3;
21fd358326SDongjin Kim		i2c3 = &i2c0;
22fd358326SDongjin Kim		mmc0 = &sdhci;
23fd358326SDongjin Kim		mmc1 = &sdmmc0;
24fd358326SDongjin Kim		serial0 = &uart1;
25fd358326SDongjin Kim		serial1 = &uart0;
26fd358326SDongjin Kim	};
27fd358326SDongjin Kim
28fd358326SDongjin Kim	chosen {
29fd358326SDongjin Kim		stdout-path = "serial2:1500000n8";
30fd358326SDongjin Kim	};
31fd358326SDongjin Kim
32fd358326SDongjin Kim	dc_12v: dc-12v-regulator {
33fd358326SDongjin Kim		compatible = "regulator-fixed";
34fd358326SDongjin Kim		regulator-name = "dc_12v";
35fd358326SDongjin Kim		regulator-always-on;
36fd358326SDongjin Kim		regulator-boot-on;
37fd358326SDongjin Kim		regulator-min-microvolt = <12000000>;
38fd358326SDongjin Kim		regulator-max-microvolt = <12000000>;
39fd358326SDongjin Kim	};
40fd358326SDongjin Kim
41913404aaSAurelien Jarno	hdmi-con {
42913404aaSAurelien Jarno		compatible = "hdmi-connector";
43913404aaSAurelien Jarno		type = "a";
44913404aaSAurelien Jarno
45913404aaSAurelien Jarno		port {
46913404aaSAurelien Jarno			hdmi_con_in: endpoint {
47913404aaSAurelien Jarno				remote-endpoint = <&hdmi_out_con>;
48913404aaSAurelien Jarno			};
49913404aaSAurelien Jarno		};
50913404aaSAurelien Jarno	};
51913404aaSAurelien Jarno
52fd358326SDongjin Kim	leds {
53fd358326SDongjin Kim		compatible = "gpio-leds";
54fd358326SDongjin Kim
55fd358326SDongjin Kim		led_power: led-0 {
56fd358326SDongjin Kim			gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
57fd358326SDongjin Kim			function = LED_FUNCTION_POWER;
58fd358326SDongjin Kim			color = <LED_COLOR_ID_RED>;
59fd358326SDongjin Kim			default-state = "keep";
60fd358326SDongjin Kim			linux,default-trigger = "default-on";
61fd358326SDongjin Kim			pinctrl-names = "default";
62fd358326SDongjin Kim			pinctrl-0 = <&led_power_pin>;
63fd358326SDongjin Kim		};
64fd358326SDongjin Kim		led_work: led-1 {
65fd358326SDongjin Kim			gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
66fd358326SDongjin Kim			function = LED_FUNCTION_HEARTBEAT;
67fd358326SDongjin Kim			color = <LED_COLOR_ID_BLUE>;
68fd358326SDongjin Kim			linux,default-trigger = "heartbeat";
69fd358326SDongjin Kim			pinctrl-names = "default";
70fd358326SDongjin Kim			pinctrl-0 = <&led_work_pin>;
71fd358326SDongjin Kim		};
72fd358326SDongjin Kim	};
73fd358326SDongjin Kim
7478f85844SAurelien Jarno	rk809-sound {
7578f85844SAurelien Jarno		compatible = "simple-audio-card";
7678f85844SAurelien Jarno		pinctrl-names = "default";
7778f85844SAurelien Jarno		pinctrl-0 = <&hp_det_pin>;
7878f85844SAurelien Jarno		simple-audio-card,name = "Analog RK817";
7978f85844SAurelien Jarno		simple-audio-card,format = "i2s";
8078f85844SAurelien Jarno		simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
8178f85844SAurelien Jarno		simple-audio-card,mclk-fs = <256>;
8278f85844SAurelien Jarno		simple-audio-card,widgets =
8378f85844SAurelien Jarno			"Headphone", "Headphones",
8478f85844SAurelien Jarno			"Speaker", "Speaker";
8578f85844SAurelien Jarno		simple-audio-card,routing =
8678f85844SAurelien Jarno			"Headphones", "HPOL",
8778f85844SAurelien Jarno			"Headphones", "HPOR",
8878f85844SAurelien Jarno			"Speaker", "SPKO";
8978f85844SAurelien Jarno
9078f85844SAurelien Jarno		simple-audio-card,cpu {
9178f85844SAurelien Jarno			sound-dai = <&i2s1_8ch>;
9278f85844SAurelien Jarno		};
9378f85844SAurelien Jarno
9478f85844SAurelien Jarno		simple-audio-card,codec {
9578f85844SAurelien Jarno			sound-dai = <&rk809>;
9678f85844SAurelien Jarno		};
9778f85844SAurelien Jarno	};
9878f85844SAurelien Jarno
99fd358326SDongjin Kim	vcc3v3_sys: vcc3v3-sys-regulator {
100fd358326SDongjin Kim		compatible = "regulator-fixed";
101fd358326SDongjin Kim		regulator-name = "vcc3v3_sys";
102fd358326SDongjin Kim		regulator-always-on;
103fd358326SDongjin Kim		regulator-boot-on;
104fd358326SDongjin Kim		regulator-min-microvolt = <3300000>;
105fd358326SDongjin Kim		regulator-max-microvolt = <3300000>;
106fd358326SDongjin Kim		vin-supply = <&dc_12v>;
107fd358326SDongjin Kim	};
1084685d7b6SAurelien Jarno
1094685d7b6SAurelien Jarno	vcc5v0_sys: vcc5v0-sys-regulator {
1104685d7b6SAurelien Jarno		compatible = "regulator-fixed";
1114685d7b6SAurelien Jarno		regulator-name = "vcc5v0_sys";
1124685d7b6SAurelien Jarno		regulator-always-on;
1134685d7b6SAurelien Jarno		regulator-boot-on;
1144685d7b6SAurelien Jarno		regulator-min-microvolt = <5000000>;
1154685d7b6SAurelien Jarno		regulator-max-microvolt = <5000000>;
1164685d7b6SAurelien Jarno		vin-supply = <&dc_12v>;
1174685d7b6SAurelien Jarno	};
1184685d7b6SAurelien Jarno
1194685d7b6SAurelien Jarno	vcc5v0_usb_host: vcc5v0-usb-host-regulator {
1204685d7b6SAurelien Jarno		compatible = "regulator-fixed";
1214685d7b6SAurelien Jarno		regulator-name = "vcc5v0_usb_host";
1224685d7b6SAurelien Jarno		enable-active-high;
1234685d7b6SAurelien Jarno		gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
1244685d7b6SAurelien Jarno		pinctrl-names = "default";
1254685d7b6SAurelien Jarno		pinctrl-0 = <&vcc5v0_usb_host_en_pin>;
1264685d7b6SAurelien Jarno		regulator-min-microvolt = <5000000>;
1274685d7b6SAurelien Jarno		regulator-max-microvolt = <5000000>;
1284685d7b6SAurelien Jarno		vin-supply = <&vcc5v0_sys>;
1294685d7b6SAurelien Jarno	};
130*9984ef56SAurelien Jarno
131*9984ef56SAurelien Jarno	vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
132*9984ef56SAurelien Jarno		compatible = "regulator-fixed";
133*9984ef56SAurelien Jarno		regulator-name = "vcc5v0_usb_otg";
134*9984ef56SAurelien Jarno		enable-active-high;
135*9984ef56SAurelien Jarno		gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
136*9984ef56SAurelien Jarno		pinctrl-names = "default";
137*9984ef56SAurelien Jarno		pinctrl-0 = <&vcc5v0_usb_otg_en_pin>;
138*9984ef56SAurelien Jarno		regulator-min-microvolt = <5000000>;
139*9984ef56SAurelien Jarno		regulator-max-microvolt = <5000000>;
140*9984ef56SAurelien Jarno		vin-supply = <&vcc5v0_sys>;
141*9984ef56SAurelien Jarno	};
142*9984ef56SAurelien Jarno};
143*9984ef56SAurelien Jarno
144*9984ef56SAurelien Jarno&combphy0 {
145*9984ef56SAurelien Jarno	/* Used for USB3 */
146*9984ef56SAurelien Jarno	phy-supply = <&vcc5v0_usb_host>;
147*9984ef56SAurelien Jarno	status = "okay";
148*9984ef56SAurelien Jarno};
149*9984ef56SAurelien Jarno
150*9984ef56SAurelien Jarno&combphy1 {
151*9984ef56SAurelien Jarno	/* Used for USB3 */
152*9984ef56SAurelien Jarno	phy-supply = <&vcc5v0_usb_otg>;
153*9984ef56SAurelien Jarno	status = "okay";
154fd358326SDongjin Kim};
155fd358326SDongjin Kim
156fd358326SDongjin Kim&cpu0 {
157fd358326SDongjin Kim	cpu-supply = <&vdd_cpu>;
158fd358326SDongjin Kim};
159fd358326SDongjin Kim
160fd358326SDongjin Kim&cpu1 {
161fd358326SDongjin Kim	cpu-supply = <&vdd_cpu>;
162fd358326SDongjin Kim};
163fd358326SDongjin Kim
164fd358326SDongjin Kim&cpu2 {
165fd358326SDongjin Kim	cpu-supply = <&vdd_cpu>;
166fd358326SDongjin Kim};
167fd358326SDongjin Kim
168fd358326SDongjin Kim&cpu3 {
169fd358326SDongjin Kim	cpu-supply = <&vdd_cpu>;
170fd358326SDongjin Kim};
171fd358326SDongjin Kim
172fd358326SDongjin Kim&gmac0 {
173fd358326SDongjin Kim	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
174fd358326SDongjin Kim	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
175fd358326SDongjin Kim	assigned-clock-rates = <0>, <125000000>;
176fd358326SDongjin Kim	clock_in_out = "output";
177fd358326SDongjin Kim	phy-handle = <&rgmii_phy0>;
178fd358326SDongjin Kim	phy-mode = "rgmii";
179fd358326SDongjin Kim	phy-supply = <&vcc3v3_sys>;
180fd358326SDongjin Kim	pinctrl-names = "default";
181fd358326SDongjin Kim	pinctrl-0 = <&gmac0_miim
182fd358326SDongjin Kim		     &gmac0_tx_bus2
183fd358326SDongjin Kim		     &gmac0_rx_bus2
184fd358326SDongjin Kim		     &gmac0_rgmii_clk
185fd358326SDongjin Kim		     &gmac0_rgmii_bus>;
186fd358326SDongjin Kim	status = "okay";
187fd358326SDongjin Kim
188fd358326SDongjin Kim	tx_delay = <0x4f>;
189fd358326SDongjin Kim	rx_delay = <0x2d>;
190fd358326SDongjin Kim};
191fd358326SDongjin Kim
192cb80b345SAurelien Jarno&gpu {
193cb80b345SAurelien Jarno	mali-supply = <&vdd_gpu>;
194cb80b345SAurelien Jarno	status = "okay";
195cb80b345SAurelien Jarno};
196cb80b345SAurelien Jarno
197913404aaSAurelien Jarno&hdmi {
198913404aaSAurelien Jarno	avdd-0v9-supply = <&vdda0v9_image>;
199913404aaSAurelien Jarno	avdd-1v8-supply = <&vcca1v8_image>;
200913404aaSAurelien Jarno	status = "okay";
201913404aaSAurelien Jarno};
202913404aaSAurelien Jarno
203913404aaSAurelien Jarno&hdmi_in {
204913404aaSAurelien Jarno	hdmi_in_vp0: endpoint {
205913404aaSAurelien Jarno		remote-endpoint = <&vp0_out_hdmi>;
206913404aaSAurelien Jarno	};
207913404aaSAurelien Jarno};
208913404aaSAurelien Jarno
209913404aaSAurelien Jarno&hdmi_out {
210913404aaSAurelien Jarno	hdmi_out_con: endpoint {
211913404aaSAurelien Jarno		remote-endpoint = <&hdmi_con_in>;
212913404aaSAurelien Jarno	};
213913404aaSAurelien Jarno};
214913404aaSAurelien Jarno
2151ca7ddddSAurelien Jarno&hdmi_sound {
2161ca7ddddSAurelien Jarno	status = "okay";
2171ca7ddddSAurelien Jarno};
2181ca7ddddSAurelien Jarno
219fd358326SDongjin Kim&i2c0 {
220fd358326SDongjin Kim	status = "okay";
221fd358326SDongjin Kim
222fd358326SDongjin Kim	vdd_cpu: regulator@1c {
223fd358326SDongjin Kim		compatible = "tcs,tcs4525";
224fd358326SDongjin Kim		reg = <0x1c>;
225fd358326SDongjin Kim		fcs,suspend-voltage-selector = <1>;
226fd358326SDongjin Kim		regulator-name = "vdd_cpu";
227fd358326SDongjin Kim		regulator-always-on;
228fd358326SDongjin Kim		regulator-boot-on;
229fd358326SDongjin Kim		regulator-min-microvolt = <800000>;
230fd358326SDongjin Kim		regulator-max-microvolt = <1150000>;
231fd358326SDongjin Kim		regulator-ramp-delay = <2300>;
232fd358326SDongjin Kim		vin-supply = <&vcc3v3_sys>;
233fd358326SDongjin Kim
234fd358326SDongjin Kim		regulator-state-mem {
235fd358326SDongjin Kim			regulator-off-in-suspend;
236fd358326SDongjin Kim		};
237fd358326SDongjin Kim	};
238fd358326SDongjin Kim
239fd358326SDongjin Kim	rk809: pmic@20 {
240fd358326SDongjin Kim		compatible = "rockchip,rk809";
241fd358326SDongjin Kim		reg = <0x20>;
242fd358326SDongjin Kim		interrupt-parent = <&gpio0>;
243fd358326SDongjin Kim		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
24478f85844SAurelien Jarno		assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
24578f85844SAurelien Jarno		assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
246fd358326SDongjin Kim		#clock-cells = <1>;
24778f85844SAurelien Jarno		clock-names = "mclk";
24878f85844SAurelien Jarno		clocks = <&cru I2S1_MCLKOUT_TX>;
249fd358326SDongjin Kim		pinctrl-names = "default";
25078f85844SAurelien Jarno		pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>;
251fd358326SDongjin Kim		rockchip,system-power-controller;
25278f85844SAurelien Jarno		#sound-dai-cells = <0>;
253fd358326SDongjin Kim		vcc1-supply = <&vcc3v3_sys>;
254fd358326SDongjin Kim		vcc2-supply = <&vcc3v3_sys>;
255fd358326SDongjin Kim		vcc3-supply = <&vcc3v3_sys>;
256fd358326SDongjin Kim		vcc4-supply = <&vcc3v3_sys>;
257fd358326SDongjin Kim		vcc5-supply = <&vcc3v3_sys>;
258fd358326SDongjin Kim		vcc6-supply = <&vcc3v3_sys>;
259fd358326SDongjin Kim		vcc7-supply = <&vcc3v3_sys>;
260fd358326SDongjin Kim		vcc8-supply = <&vcc3v3_sys>;
261fd358326SDongjin Kim		vcc9-supply = <&vcc3v3_sys>;
262fd358326SDongjin Kim		wakeup-source;
263fd358326SDongjin Kim
264fd358326SDongjin Kim		regulators {
265fd358326SDongjin Kim			vdd_logic: DCDC_REG1 {
266fd358326SDongjin Kim				regulator-name = "vdd_logic";
267fd358326SDongjin Kim				regulator-always-on;
268fd358326SDongjin Kim				regulator-boot-on;
269fd358326SDongjin Kim				regulator-init-microvolt = <900000>;
270fd358326SDongjin Kim				regulator-initial-mode = <0x2>;
271fd358326SDongjin Kim				regulator-min-microvolt = <500000>;
272fd358326SDongjin Kim				regulator-max-microvolt = <1350000>;
273fd358326SDongjin Kim				regulator-ramp-delay = <6001>;
274fd358326SDongjin Kim
275fd358326SDongjin Kim				regulator-state-mem {
276fd358326SDongjin Kim					regulator-off-in-suspend;
277fd358326SDongjin Kim				};
278fd358326SDongjin Kim			};
279fd358326SDongjin Kim
280fd358326SDongjin Kim			vdd_gpu: DCDC_REG2 {
281fd358326SDongjin Kim				regulator-name = "vdd_gpu";
282fd358326SDongjin Kim				regulator-always-on;
283fd358326SDongjin Kim				regulator-init-microvolt = <900000>;
284fd358326SDongjin Kim				regulator-initial-mode = <0x2>;
285fd358326SDongjin Kim				regulator-min-microvolt = <500000>;
286fd358326SDongjin Kim				regulator-max-microvolt = <1350000>;
287fd358326SDongjin Kim				regulator-ramp-delay = <6001>;
288fd358326SDongjin Kim
289fd358326SDongjin Kim				regulator-state-mem {
290fd358326SDongjin Kim					regulator-off-in-suspend;
291fd358326SDongjin Kim				};
292fd358326SDongjin Kim			};
293fd358326SDongjin Kim
294fd358326SDongjin Kim			vcc_ddr: DCDC_REG3 {
295fd358326SDongjin Kim				regulator-name = "vcc_ddr";
296fd358326SDongjin Kim				regulator-always-on;
297fd358326SDongjin Kim				regulator-boot-on;
298fd358326SDongjin Kim				regulator-initial-mode = <0x2>;
299fd358326SDongjin Kim
300fd358326SDongjin Kim				regulator-state-mem {
301fd358326SDongjin Kim					regulator-on-in-suspend;
302fd358326SDongjin Kim				};
303fd358326SDongjin Kim			};
304fd358326SDongjin Kim
305fd358326SDongjin Kim			vdd_npu: DCDC_REG4 {
306fd358326SDongjin Kim				regulator-name = "vdd_npu";
307fd358326SDongjin Kim				regulator-init-microvolt = <900000>;
308fd358326SDongjin Kim				regulator-initial-mode = <0x2>;
309fd358326SDongjin Kim				regulator-min-microvolt = <500000>;
310fd358326SDongjin Kim				regulator-max-microvolt = <1350000>;
311fd358326SDongjin Kim				regulator-ramp-delay = <6001>;
312fd358326SDongjin Kim
313fd358326SDongjin Kim				regulator-state-mem {
314fd358326SDongjin Kim					regulator-off-in-suspend;
315fd358326SDongjin Kim				};
316fd358326SDongjin Kim			};
317fd358326SDongjin Kim
318fd358326SDongjin Kim			vcc_1v8: DCDC_REG5 {
319fd358326SDongjin Kim				regulator-name = "vcc_1v8";
320fd358326SDongjin Kim				regulator-always-on;
321fd358326SDongjin Kim				regulator-boot-on;
322fd358326SDongjin Kim				regulator-min-microvolt = <1800000>;
323fd358326SDongjin Kim				regulator-max-microvolt = <1800000>;
324fd358326SDongjin Kim
325fd358326SDongjin Kim				regulator-state-mem {
326fd358326SDongjin Kim					regulator-off-in-suspend;
327fd358326SDongjin Kim				};
328fd358326SDongjin Kim			};
329fd358326SDongjin Kim
330fd358326SDongjin Kim			vdda0v9_image: LDO_REG1 {
331fd358326SDongjin Kim				regulator-name = "vdda0v9_image";
332fd358326SDongjin Kim				regulator-always-on;
333fd358326SDongjin Kim				regulator-min-microvolt = <900000>;
334fd358326SDongjin Kim				regulator-max-microvolt = <900000>;
335fd358326SDongjin Kim
336fd358326SDongjin Kim				regulator-state-mem {
337fd358326SDongjin Kim					regulator-off-in-suspend;
338fd358326SDongjin Kim				};
339fd358326SDongjin Kim			};
340fd358326SDongjin Kim
341fd358326SDongjin Kim			vdda_0v9: LDO_REG2 {
342fd358326SDongjin Kim				regulator-name = "vdda_0v9";
343fd358326SDongjin Kim				regulator-always-on;
344fd358326SDongjin Kim				regulator-boot-on;
345fd358326SDongjin Kim				regulator-min-microvolt = <900000>;
346fd358326SDongjin Kim				regulator-max-microvolt = <900000>;
347fd358326SDongjin Kim
348fd358326SDongjin Kim				regulator-state-mem {
349fd358326SDongjin Kim					regulator-off-in-suspend;
350fd358326SDongjin Kim				};
351fd358326SDongjin Kim			};
352fd358326SDongjin Kim
353fd358326SDongjin Kim			vdda0v9_pmu: LDO_REG3 {
354fd358326SDongjin Kim				regulator-name = "vdda0v9_pmu";
355fd358326SDongjin Kim				regulator-always-on;
356fd358326SDongjin Kim				regulator-boot-on;
357fd358326SDongjin Kim				regulator-min-microvolt = <900000>;
358fd358326SDongjin Kim				regulator-max-microvolt = <900000>;
359fd358326SDongjin Kim
360fd358326SDongjin Kim				regulator-state-mem {
361fd358326SDongjin Kim					regulator-on-in-suspend;
362fd358326SDongjin Kim					regulator-suspend-microvolt = <900000>;
363fd358326SDongjin Kim				};
364fd358326SDongjin Kim			};
365fd358326SDongjin Kim
366fd358326SDongjin Kim			vccio_acodec: LDO_REG4 {
367fd358326SDongjin Kim				regulator-name = "vccio_acodec";
368fd358326SDongjin Kim				regulator-always-on;
369fd358326SDongjin Kim				regulator-boot-on;
370fd358326SDongjin Kim				regulator-min-microvolt = <3300000>;
371fd358326SDongjin Kim				regulator-max-microvolt = <3300000>;
372fd358326SDongjin Kim
373fd358326SDongjin Kim				regulator-state-mem {
374fd358326SDongjin Kim					regulator-off-in-suspend;
375fd358326SDongjin Kim				};
376fd358326SDongjin Kim			};
377fd358326SDongjin Kim
378fd358326SDongjin Kim			vccio_sd: LDO_REG5 {
379fd358326SDongjin Kim				regulator-name = "vccio_sd";
380fd358326SDongjin Kim				regulator-min-microvolt = <1800000>;
381fd358326SDongjin Kim				regulator-max-microvolt = <3300000>;
382fd358326SDongjin Kim
383fd358326SDongjin Kim				regulator-state-mem {
384fd358326SDongjin Kim					regulator-off-in-suspend;
385fd358326SDongjin Kim				};
386fd358326SDongjin Kim			};
387fd358326SDongjin Kim
388fd358326SDongjin Kim			vcc3v3_pmu: LDO_REG6 {
389fd358326SDongjin Kim				regulator-name = "vcc3v3_pmu";
390fd358326SDongjin Kim				regulator-always-on;
391fd358326SDongjin Kim				regulator-boot-on;
392fd358326SDongjin Kim				regulator-min-microvolt = <3300000>;
393fd358326SDongjin Kim				regulator-max-microvolt = <3300000>;
394fd358326SDongjin Kim
395fd358326SDongjin Kim				regulator-state-mem {
396fd358326SDongjin Kim					regulator-on-in-suspend;
397fd358326SDongjin Kim					regulator-suspend-microvolt = <3300000>;
398fd358326SDongjin Kim				};
399fd358326SDongjin Kim			};
400fd358326SDongjin Kim
401fd358326SDongjin Kim			vcca_1v8: LDO_REG7 {
402fd358326SDongjin Kim				regulator-name = "vcca_1v8";
403fd358326SDongjin Kim				regulator-always-on;
404fd358326SDongjin Kim				regulator-boot-on;
405fd358326SDongjin Kim				regulator-min-microvolt = <1800000>;
406fd358326SDongjin Kim				regulator-max-microvolt = <1800000>;
407fd358326SDongjin Kim
408fd358326SDongjin Kim				regulator-state-mem {
409fd358326SDongjin Kim					regulator-off-in-suspend;
410fd358326SDongjin Kim				};
411fd358326SDongjin Kim			};
412fd358326SDongjin Kim
413fd358326SDongjin Kim			vcca1v8_pmu: LDO_REG8 {
414fd358326SDongjin Kim				regulator-name = "vcca1v8_pmu";
415fd358326SDongjin Kim				regulator-always-on;
416fd358326SDongjin Kim				regulator-boot-on;
417fd358326SDongjin Kim				regulator-min-microvolt = <1800000>;
418fd358326SDongjin Kim				regulator-max-microvolt = <1800000>;
419fd358326SDongjin Kim
420fd358326SDongjin Kim				regulator-state-mem {
421fd358326SDongjin Kim					regulator-on-in-suspend;
422fd358326SDongjin Kim					regulator-suspend-microvolt = <1800000>;
423fd358326SDongjin Kim				};
424fd358326SDongjin Kim			};
425fd358326SDongjin Kim
426fd358326SDongjin Kim			vcca1v8_image: LDO_REG9 {
427fd358326SDongjin Kim				regulator-name = "vcca1v8_image";
428fd358326SDongjin Kim				regulator-always-on;
429fd358326SDongjin Kim				regulator-min-microvolt = <1800000>;
430fd358326SDongjin Kim				regulator-max-microvolt = <1800000>;
431fd358326SDongjin Kim
432fd358326SDongjin Kim				regulator-state-mem {
433fd358326SDongjin Kim					regulator-off-in-suspend;
434fd358326SDongjin Kim				};
435fd358326SDongjin Kim			};
436fd358326SDongjin Kim
437fd358326SDongjin Kim			vcc_3v3: SWITCH_REG1 {
438fd358326SDongjin Kim				regulator-name = "vcc_3v3";
439fd358326SDongjin Kim				regulator-always-on;
440fd358326SDongjin Kim				regulator-boot-on;
441fd358326SDongjin Kim
442fd358326SDongjin Kim				regulator-state-mem {
443fd358326SDongjin Kim					regulator-off-in-suspend;
444fd358326SDongjin Kim				};
445fd358326SDongjin Kim			};
446fd358326SDongjin Kim
447fd358326SDongjin Kim			vcc3v3_sd: SWITCH_REG2 {
448fd358326SDongjin Kim				regulator-name = "vcc3v3_sd";
449fd358326SDongjin Kim
450fd358326SDongjin Kim				regulator-state-mem {
451fd358326SDongjin Kim					regulator-off-in-suspend;
452fd358326SDongjin Kim				};
453fd358326SDongjin Kim			};
454fd358326SDongjin Kim		};
455fd358326SDongjin Kim	};
456fd358326SDongjin Kim};
457fd358326SDongjin Kim
4581ca7ddddSAurelien Jarno&i2s0_8ch {
4591ca7ddddSAurelien Jarno	status = "okay";
4601ca7ddddSAurelien Jarno};
4611ca7ddddSAurelien Jarno
46278f85844SAurelien Jarno&i2s1_8ch {
46378f85844SAurelien Jarno	rockchip,trcm-sync-tx-only;
46478f85844SAurelien Jarno	status = "okay";
46578f85844SAurelien Jarno};
46678f85844SAurelien Jarno
467fd358326SDongjin Kim&mdio0 {
468fd358326SDongjin Kim	rgmii_phy0: ethernet-phy@0 {
469fd358326SDongjin Kim		compatible = "ethernet-phy-ieee802.3-c22";
470fd358326SDongjin Kim		reg = <0x0>;
471fd358326SDongjin Kim		reset-assert-us = <20000>;
472fd358326SDongjin Kim		reset-deassert-us = <100000>;
473fd358326SDongjin Kim		reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
474fd358326SDongjin Kim	};
475fd358326SDongjin Kim};
476fd358326SDongjin Kim
477fd358326SDongjin Kim&pinctrl {
4789f96204bSAurelien Jarno	fspi {
4799f96204bSAurelien Jarno		fspi_dual_io_pins: fspi-dual-io-pins {
4809f96204bSAurelien Jarno			rockchip,pins =
4819f96204bSAurelien Jarno				/* fspi_clk */
4829f96204bSAurelien Jarno				<1 RK_PD0 1 &pcfg_pull_none>,
4839f96204bSAurelien Jarno				/* fspi_cs0n */
4849f96204bSAurelien Jarno				<1 RK_PD3 1 &pcfg_pull_none>,
4859f96204bSAurelien Jarno				/* fspi_d0 */
4869f96204bSAurelien Jarno				<1 RK_PD1 1 &pcfg_pull_none>,
4879f96204bSAurelien Jarno				/* fspi_d1 */
4889f96204bSAurelien Jarno				<1 RK_PD2 1 &pcfg_pull_none>;
4899f96204bSAurelien Jarno		};
4909f96204bSAurelien Jarno	};
4919f96204bSAurelien Jarno
492fd358326SDongjin Kim	leds {
493fd358326SDongjin Kim		led_power_pin: led-power-pin {
494fd358326SDongjin Kim			rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
495fd358326SDongjin Kim		};
496fd358326SDongjin Kim		led_work_pin: led-work-pin {
497fd358326SDongjin Kim			rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
498fd358326SDongjin Kim		};
499fd358326SDongjin Kim	};
500fd358326SDongjin Kim
501fd358326SDongjin Kim	pmic {
502fd358326SDongjin Kim		pmic_int_l: pmic-int-l {
503fd358326SDongjin Kim			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
504fd358326SDongjin Kim		};
505fd358326SDongjin Kim	};
50678f85844SAurelien Jarno
50778f85844SAurelien Jarno	rk809 {
50878f85844SAurelien Jarno		hp_det_pin: hp-det-pin {
50978f85844SAurelien Jarno			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
51078f85844SAurelien Jarno		};
51178f85844SAurelien Jarno	};
5124685d7b6SAurelien Jarno
5134685d7b6SAurelien Jarno	usb {
5144685d7b6SAurelien Jarno		vcc5v0_usb_host_en_pin: vcc5v0-usb-host-en-pin {
5154685d7b6SAurelien Jarno			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
5164685d7b6SAurelien Jarno		};
517*9984ef56SAurelien Jarno		vcc5v0_usb_otg_en_pin: vcc5v0-usb-dr-en-pin {
5184685d7b6SAurelien Jarno			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
5194685d7b6SAurelien Jarno		};
5204685d7b6SAurelien Jarno	};
521fd358326SDongjin Kim};
522fd358326SDongjin Kim
523fd358326SDongjin Kim&pmu_io_domains {
524fd358326SDongjin Kim	pmuio1-supply = <&vcc3v3_pmu>;
525fd358326SDongjin Kim	pmuio2-supply = <&vcc3v3_pmu>;
526fd358326SDongjin Kim	vccio1-supply = <&vccio_acodec>;
527fd358326SDongjin Kim	vccio2-supply = <&vcc_1v8>;
528fd358326SDongjin Kim	vccio3-supply = <&vccio_sd>;
529fd358326SDongjin Kim	vccio4-supply = <&vcc_1v8>;
530fd358326SDongjin Kim	vccio5-supply = <&vcc_3v3>;
531fd358326SDongjin Kim	vccio6-supply = <&vcc_3v3>;
532fd358326SDongjin Kim	vccio7-supply = <&vcc_3v3>;
533fd358326SDongjin Kim	status = "okay";
534fd358326SDongjin Kim};
535fd358326SDongjin Kim
536fd358326SDongjin Kim&saradc {
537fd358326SDongjin Kim	vref-supply = <&vcca_1v8>;
538fd358326SDongjin Kim	status = "okay";
539fd358326SDongjin Kim};
540fd358326SDongjin Kim
541fd358326SDongjin Kim&sdhci {
542fd358326SDongjin Kim	bus-width = <8>;
543fd358326SDongjin Kim	max-frequency = <200000000>;
544fd358326SDongjin Kim	non-removable;
545fd358326SDongjin Kim	pinctrl-names = "default";
546fd358326SDongjin Kim	pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe &emmc_rstnout>;
547fd358326SDongjin Kim	vmmc-supply = <&vcc_3v3>;
548fd358326SDongjin Kim	vqmmc-supply = <&vcc_1v8>;
549fd358326SDongjin Kim	status = "okay";
550fd358326SDongjin Kim};
551fd358326SDongjin Kim
552fd358326SDongjin Kim&sdmmc0 {
553fd358326SDongjin Kim	bus-width = <4>;
554fd358326SDongjin Kim	cap-sd-highspeed;
555fd358326SDongjin Kim	cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
556fd358326SDongjin Kim	disable-wp;
557fd358326SDongjin Kim	pinctrl-names = "default";
558fd358326SDongjin Kim	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
559fd358326SDongjin Kim	sd-uhs-sdr50;
560fd358326SDongjin Kim	vmmc-supply = <&vcc3v3_sd>;
561fd358326SDongjin Kim	vqmmc-supply = <&vccio_sd>;
562fd358326SDongjin Kim	status = "okay";
563fd358326SDongjin Kim};
564fd358326SDongjin Kim
5659f96204bSAurelien Jarno&sfc {
5669f96204bSAurelien Jarno	/* Dual I/O mode as the D2 pin conflicts with the eMMC */
5679f96204bSAurelien Jarno	pinctrl-0 = <&fspi_dual_io_pins>;
5689f96204bSAurelien Jarno	pinctrl-names = "default";
5699f96204bSAurelien Jarno	#address-cells = <1>;
5709f96204bSAurelien Jarno	#size-cells = <0>;
5719f96204bSAurelien Jarno	status = "okay";
5729f96204bSAurelien Jarno
5739f96204bSAurelien Jarno	flash@0 {
5749f96204bSAurelien Jarno		compatible = "jedec,spi-nor";
5759f96204bSAurelien Jarno		reg = <0>;
5769f96204bSAurelien Jarno		spi-max-frequency = <100000000>;
5779f96204bSAurelien Jarno		spi-rx-bus-width = <2>;
5789f96204bSAurelien Jarno		spi-tx-bus-width = <1>;
5799f96204bSAurelien Jarno
5809f96204bSAurelien Jarno		partitions {
5819f96204bSAurelien Jarno			compatible = "fixed-partitions";
5829f96204bSAurelien Jarno			#address-cells = <1>;
5839f96204bSAurelien Jarno			#size-cells = <1>;
5849f96204bSAurelien Jarno
5859f96204bSAurelien Jarno			partition@0 {
5869f96204bSAurelien Jarno				label = "SPL";
5879f96204bSAurelien Jarno				reg = <0x0 0xe0000>;
5889f96204bSAurelien Jarno			};
5899f96204bSAurelien Jarno			partition@e0000 {
5909f96204bSAurelien Jarno				label = "U-Boot Env";
5919f96204bSAurelien Jarno				reg = <0xe0000 0x20000>;
5929f96204bSAurelien Jarno			};
5939f96204bSAurelien Jarno			partition@100000 {
5949f96204bSAurelien Jarno				label = "U-Boot";
5959f96204bSAurelien Jarno				reg = <0x100000 0x200000>;
5969f96204bSAurelien Jarno			};
5979f96204bSAurelien Jarno			partition@300000 {
5989f96204bSAurelien Jarno				label = "splash";
5999f96204bSAurelien Jarno				reg = <0x300000 0x100000>;
6009f96204bSAurelien Jarno			};
6019f96204bSAurelien Jarno			partition@400000 {
6029f96204bSAurelien Jarno				label = "Filesystem";
6039f96204bSAurelien Jarno				reg = <0x400000 0xc00000>;
6049f96204bSAurelien Jarno			};
6059f96204bSAurelien Jarno		};
6069f96204bSAurelien Jarno	};
6079f96204bSAurelien Jarno};
6089f96204bSAurelien Jarno
609f5511bd8SAurelien Jarno&tsadc {
610f5511bd8SAurelien Jarno	rockchip,hw-tshut-mode = <1>;
611f5511bd8SAurelien Jarno	rockchip,hw-tshut-polarity = <0>;
612f5511bd8SAurelien Jarno	status = "okay";
613f5511bd8SAurelien Jarno};
614f5511bd8SAurelien Jarno
615fd358326SDongjin Kim&uart2 {
616fd358326SDongjin Kim	status = "okay";
617fd358326SDongjin Kim};
618913404aaSAurelien Jarno
6194685d7b6SAurelien Jarno&usb_host0_ehci {
6204685d7b6SAurelien Jarno	status = "okay";
6214685d7b6SAurelien Jarno};
6224685d7b6SAurelien Jarno
6234685d7b6SAurelien Jarno&usb_host0_ohci {
6244685d7b6SAurelien Jarno	status = "okay";
6254685d7b6SAurelien Jarno};
6264685d7b6SAurelien Jarno
627*9984ef56SAurelien Jarno&usb_host0_xhci {
628*9984ef56SAurelien Jarno	dr_mode = "host";
629*9984ef56SAurelien Jarno	status = "okay";
630*9984ef56SAurelien Jarno};
631*9984ef56SAurelien Jarno
6324685d7b6SAurelien Jarno&usb_host1_ehci {
6334685d7b6SAurelien Jarno	status = "okay";
6344685d7b6SAurelien Jarno};
6354685d7b6SAurelien Jarno
6364685d7b6SAurelien Jarno&usb_host1_ohci {
6374685d7b6SAurelien Jarno	status = "okay";
6384685d7b6SAurelien Jarno};
6394685d7b6SAurelien Jarno
640*9984ef56SAurelien Jarno&usb_host1_xhci {
641*9984ef56SAurelien Jarno	status = "okay";
642*9984ef56SAurelien Jarno};
643*9984ef56SAurelien Jarno
644*9984ef56SAurelien Jarno&usb2phy0 {
645*9984ef56SAurelien Jarno	status = "okay";
646*9984ef56SAurelien Jarno};
647*9984ef56SAurelien Jarno
648*9984ef56SAurelien Jarno&usb2phy0_host {
649*9984ef56SAurelien Jarno	phy-supply = <&vcc5v0_usb_host>;
650*9984ef56SAurelien Jarno	status = "okay";
651*9984ef56SAurelien Jarno};
652*9984ef56SAurelien Jarno
653*9984ef56SAurelien Jarno&usb2phy0_otg {
654*9984ef56SAurelien Jarno	phy-supply = <&vcc5v0_usb_otg>;
655*9984ef56SAurelien Jarno	status = "okay";
656*9984ef56SAurelien Jarno};
657*9984ef56SAurelien Jarno
6584685d7b6SAurelien Jarno&usb2phy1 {
6594685d7b6SAurelien Jarno	status = "okay";
6604685d7b6SAurelien Jarno};
6614685d7b6SAurelien Jarno
6624685d7b6SAurelien Jarno&usb2phy1_host {
6634685d7b6SAurelien Jarno	phy-supply = <&vcc5v0_usb_host>;
6644685d7b6SAurelien Jarno	status = "okay";
6654685d7b6SAurelien Jarno};
6664685d7b6SAurelien Jarno
6674685d7b6SAurelien Jarno&usb2phy1_otg {
6684685d7b6SAurelien Jarno	phy-supply = <&vcc5v0_usb_host>;
6694685d7b6SAurelien Jarno	status = "okay";
6704685d7b6SAurelien Jarno};
6714685d7b6SAurelien Jarno
672913404aaSAurelien Jarno&vop {
673913404aaSAurelien Jarno	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
674913404aaSAurelien Jarno	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
675913404aaSAurelien Jarno	status = "okay";
676913404aaSAurelien Jarno};
677913404aaSAurelien Jarno
678913404aaSAurelien Jarno&vop_mmu {
679913404aaSAurelien Jarno	status = "okay";
680913404aaSAurelien Jarno};
681913404aaSAurelien Jarno
682913404aaSAurelien Jarno&vp0 {
683913404aaSAurelien Jarno	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
684913404aaSAurelien Jarno		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
685913404aaSAurelien Jarno		remote-endpoint = <&hdmi_in_vp0>;
686913404aaSAurelien Jarno	};
687913404aaSAurelien Jarno};
688