1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7/dts-v1/; 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/pinctrl/rockchip.h> 10#include "rk3568.dtsi" 11 12/ { 13 model = "Rockchip RK3568 EVB1 DDR4 V10 Board"; 14 compatible = "rockchip,rk3568-evb1-v10", "rockchip,rk3568"; 15 16 aliases { 17 ethernet0 = &gmac0; 18 ethernet1 = &gmac1; 19 mmc0 = &sdmmc0; 20 mmc1 = &sdhci; 21 }; 22 23 chosen: chosen { 24 stdout-path = "serial2:1500000n8"; 25 }; 26 27 dc_12v: dc-12v { 28 compatible = "regulator-fixed"; 29 regulator-name = "dc_12v"; 30 regulator-always-on; 31 regulator-boot-on; 32 regulator-min-microvolt = <12000000>; 33 regulator-max-microvolt = <12000000>; 34 }; 35 36 vcc3v3_sys: vcc3v3-sys { 37 compatible = "regulator-fixed"; 38 regulator-name = "vcc3v3_sys"; 39 regulator-always-on; 40 regulator-boot-on; 41 regulator-min-microvolt = <3300000>; 42 regulator-max-microvolt = <3300000>; 43 vin-supply = <&dc_12v>; 44 }; 45 46 vcc5v0_sys: vcc5v0-sys { 47 compatible = "regulator-fixed"; 48 regulator-name = "vcc5v0_sys"; 49 regulator-always-on; 50 regulator-boot-on; 51 regulator-min-microvolt = <5000000>; 52 regulator-max-microvolt = <5000000>; 53 vin-supply = <&dc_12v>; 54 }; 55 56 vcc3v3_lcd0_n: vcc3v3-lcd0-n { 57 compatible = "regulator-fixed"; 58 regulator-name = "vcc3v3_lcd0_n"; 59 regulator-boot-on; 60 61 regulator-state-mem { 62 regulator-off-in-suspend; 63 }; 64 }; 65 66 vcc3v3_lcd1_n: vcc3v3-lcd1-n { 67 compatible = "regulator-fixed"; 68 regulator-name = "vcc3v3_lcd1_n"; 69 regulator-boot-on; 70 71 regulator-state-mem { 72 regulator-off-in-suspend; 73 }; 74 }; 75}; 76 77&gmac0 { 78 assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; 79 assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>; 80 assigned-clock-rates = <0>, <125000000>; 81 clock_in_out = "output"; 82 phy-handle = <&rgmii_phy0>; 83 phy-mode = "rgmii-id"; 84 pinctrl-names = "default"; 85 pinctrl-0 = <&gmac0_miim 86 &gmac0_tx_bus2 87 &gmac0_rx_bus2 88 &gmac0_rgmii_clk 89 &gmac0_rgmii_bus>; 90 status = "okay"; 91}; 92 93&gmac1 { 94 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; 95 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>; 96 assigned-clock-rates = <0>, <125000000>; 97 clock_in_out = "output"; 98 phy-handle = <&rgmii_phy1>; 99 phy-mode = "rgmii-id"; 100 pinctrl-names = "default"; 101 pinctrl-0 = <&gmac1m1_miim 102 &gmac1m1_tx_bus2 103 &gmac1m1_rx_bus2 104 &gmac1m1_rgmii_clk 105 &gmac1m1_rgmii_bus>; 106 status = "okay"; 107}; 108 109&i2c0 { 110 status = "okay"; 111 112 rk809: pmic@20 { 113 compatible = "rockchip,rk809"; 114 reg = <0x20>; 115 interrupt-parent = <&gpio0>; 116 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; 117 #clock-cells = <1>; 118 pinctrl-names = "default"; 119 pinctrl-0 = <&pmic_int>; 120 rockchip,system-power-controller; 121 vcc1-supply = <&vcc3v3_sys>; 122 vcc2-supply = <&vcc3v3_sys>; 123 vcc3-supply = <&vcc3v3_sys>; 124 vcc4-supply = <&vcc3v3_sys>; 125 vcc5-supply = <&vcc3v3_sys>; 126 vcc6-supply = <&vcc3v3_sys>; 127 vcc7-supply = <&vcc3v3_sys>; 128 vcc8-supply = <&vcc3v3_sys>; 129 vcc9-supply = <&vcc3v3_sys>; 130 wakeup-source; 131 132 regulators { 133 vdd_logic: DCDC_REG1 { 134 regulator-name = "vdd_logic"; 135 regulator-always-on; 136 regulator-boot-on; 137 regulator-init-microvolt = <900000>; 138 regulator-initial-mode = <0x2>; 139 regulator-min-microvolt = <500000>; 140 regulator-max-microvolt = <1350000>; 141 regulator-ramp-delay = <6001>; 142 143 regulator-state-mem { 144 regulator-off-in-suspend; 145 }; 146 }; 147 148 vdd_gpu: DCDC_REG2 { 149 regulator-name = "vdd_gpu"; 150 regulator-init-microvolt = <900000>; 151 regulator-initial-mode = <0x2>; 152 regulator-min-microvolt = <500000>; 153 regulator-max-microvolt = <1350000>; 154 regulator-ramp-delay = <6001>; 155 156 regulator-state-mem { 157 regulator-off-in-suspend; 158 }; 159 }; 160 161 vcc_ddr: DCDC_REG3 { 162 regulator-name = "vcc_ddr"; 163 regulator-always-on; 164 regulator-boot-on; 165 regulator-initial-mode = <0x2>; 166 167 regulator-state-mem { 168 regulator-on-in-suspend; 169 }; 170 }; 171 172 vdd_npu: DCDC_REG4 { 173 regulator-name = "vdd_npu"; 174 regulator-init-microvolt = <900000>; 175 regulator-initial-mode = <0x2>; 176 regulator-min-microvolt = <500000>; 177 regulator-max-microvolt = <1350000>; 178 regulator-ramp-delay = <6001>; 179 180 regulator-state-mem { 181 regulator-off-in-suspend; 182 }; 183 }; 184 185 vcc_1v8: DCDC_REG5 { 186 regulator-name = "vcc_1v8"; 187 regulator-always-on; 188 regulator-boot-on; 189 regulator-min-microvolt = <1800000>; 190 regulator-max-microvolt = <1800000>; 191 192 regulator-state-mem { 193 regulator-off-in-suspend; 194 }; 195 }; 196 197 vdda0v9_image: LDO_REG1 { 198 regulator-name = "vdda0v9_image"; 199 regulator-min-microvolt = <900000>; 200 regulator-max-microvolt = <900000>; 201 202 regulator-state-mem { 203 regulator-off-in-suspend; 204 }; 205 }; 206 207 vdda_0v9: LDO_REG2 { 208 regulator-name = "vdda_0v9"; 209 regulator-always-on; 210 regulator-boot-on; 211 regulator-min-microvolt = <900000>; 212 regulator-max-microvolt = <900000>; 213 214 regulator-state-mem { 215 regulator-off-in-suspend; 216 }; 217 }; 218 219 vdda0v9_pmu: LDO_REG3 { 220 regulator-name = "vdda0v9_pmu"; 221 regulator-always-on; 222 regulator-boot-on; 223 regulator-min-microvolt = <900000>; 224 regulator-max-microvolt = <900000>; 225 226 regulator-state-mem { 227 regulator-on-in-suspend; 228 regulator-suspend-microvolt = <900000>; 229 }; 230 }; 231 232 vccio_acodec: LDO_REG4 { 233 regulator-name = "vccio_acodec"; 234 regulator-min-microvolt = <3300000>; 235 regulator-max-microvolt = <3300000>; 236 237 regulator-state-mem { 238 regulator-off-in-suspend; 239 }; 240 }; 241 242 vccio_sd: LDO_REG5 { 243 regulator-name = "vccio_sd"; 244 regulator-min-microvolt = <1800000>; 245 regulator-max-microvolt = <3300000>; 246 247 regulator-state-mem { 248 regulator-off-in-suspend; 249 }; 250 }; 251 252 vcc3v3_pmu: LDO_REG6 { 253 regulator-name = "vcc3v3_pmu"; 254 regulator-always-on; 255 regulator-boot-on; 256 regulator-min-microvolt = <3300000>; 257 regulator-max-microvolt = <3300000>; 258 259 regulator-state-mem { 260 regulator-on-in-suspend; 261 regulator-suspend-microvolt = <3300000>; 262 }; 263 }; 264 265 vcca_1v8: LDO_REG7 { 266 regulator-name = "vcca_1v8"; 267 regulator-always-on; 268 regulator-boot-on; 269 regulator-min-microvolt = <1800000>; 270 regulator-max-microvolt = <1800000>; 271 272 regulator-state-mem { 273 regulator-off-in-suspend; 274 }; 275 }; 276 277 vcca1v8_pmu: LDO_REG8 { 278 regulator-name = "vcca1v8_pmu"; 279 regulator-always-on; 280 regulator-boot-on; 281 regulator-min-microvolt = <1800000>; 282 regulator-max-microvolt = <1800000>; 283 284 regulator-state-mem { 285 regulator-on-in-suspend; 286 regulator-suspend-microvolt = <1800000>; 287 }; 288 }; 289 290 vcca1v8_image: LDO_REG9 { 291 regulator-name = "vcca1v8_image"; 292 regulator-min-microvolt = <1800000>; 293 regulator-max-microvolt = <1800000>; 294 295 regulator-state-mem { 296 regulator-off-in-suspend; 297 }; 298 }; 299 300 vcc_3v3: SWITCH_REG1 { 301 regulator-name = "vcc_3v3"; 302 regulator-always-on; 303 regulator-boot-on; 304 305 regulator-state-mem { 306 regulator-off-in-suspend; 307 }; 308 }; 309 310 vcc3v3_sd: SWITCH_REG2 { 311 regulator-name = "vcc3v3_sd"; 312 313 regulator-state-mem { 314 regulator-off-in-suspend; 315 }; 316 }; 317 }; 318 }; 319}; 320 321&mdio0 { 322 rgmii_phy0: ethernet-phy@0 { 323 compatible = "ethernet-phy-ieee802.3-c22"; 324 reg = <0x0>; 325 reset-assert-us = <20000>; 326 reset-deassert-us = <100000>; 327 reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; 328 }; 329}; 330 331&mdio1 { 332 rgmii_phy1: ethernet-phy@0 { 333 compatible = "ethernet-phy-ieee802.3-c22"; 334 reg = <0x0>; 335 reset-assert-us = <20000>; 336 reset-deassert-us = <100000>; 337 reset-gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>; 338 }; 339}; 340 341&pinctrl { 342 pmic { 343 pmic_int: pmic_int { 344 rockchip,pins = 345 <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 346 }; 347 }; 348}; 349 350&pmu_io_domains { 351 pmuio1-supply = <&vcc3v3_pmu>; 352 pmuio2-supply = <&vcc3v3_pmu>; 353 vccio1-supply = <&vccio_acodec>; 354 vccio2-supply = <&vcc_1v8>; 355 vccio3-supply = <&vccio_sd>; 356 vccio4-supply = <&vcc_1v8>; 357 vccio5-supply = <&vcc_3v3>; 358 vccio6-supply = <&vcc_1v8>; 359 vccio7-supply = <&vcc_3v3>; 360 status = "okay"; 361}; 362 363&saradc { 364 vref-supply = <&vcca_1v8>; 365 status = "okay"; 366}; 367 368&sdhci { 369 bus-width = <8>; 370 max-frequency = <200000000>; 371 non-removable; 372 pinctrl-names = "default"; 373 pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; 374 status = "okay"; 375}; 376 377&sdmmc0 { 378 bus-width = <4>; 379 cap-sd-highspeed; 380 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; 381 disable-wp; 382 pinctrl-names = "default"; 383 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; 384 sd-uhs-sdr104; 385 vmmc-supply = <&vcc3v3_sd>; 386 vqmmc-supply = <&vccio_sd>; 387 status = "okay"; 388}; 389 390&uart2 { 391 status = "okay"; 392}; 393