1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Author: Frank Wunderlich <frank-w@public-files.de>
4 *
5 */
6
7/dts-v1/;
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/leds/common.h>
10#include <dt-bindings/pinctrl/rockchip.h>
11#include <dt-bindings/soc/rockchip,vop2.h>
12#include "rk3568.dtsi"
13
14/ {
15	model = "Bananapi-R2 Pro (RK3568) DDR4 Board";
16	compatible = "rockchip,rk3568-bpi-r2pro", "rockchip,rk3568";
17
18	aliases {
19		ethernet0 = &gmac0;
20		ethernet1 = &gmac1;
21		mmc0 = &sdmmc0;
22		mmc1 = &sdhci;
23	};
24
25	chosen: chosen {
26		stdout-path = "serial2:1500000n8";
27	};
28
29	leds {
30		compatible = "gpio-leds";
31		pinctrl-names = "default";
32		pinctrl-0 = <&blue_led_pin &green_led_pin>;
33
34		blue_led: led-0 {
35			color = <LED_COLOR_ID_BLUE>;
36			default-state = "off";
37			function = LED_FUNCTION_STATUS;
38			gpios = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
39		};
40
41		green_led: led-1 {
42			color = <LED_COLOR_ID_GREEN>;
43			default-state = "on";
44			function = LED_FUNCTION_POWER;
45			gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
46		};
47	};
48
49	dc_12v: dc-12v {
50		compatible = "regulator-fixed";
51		regulator-name = "dc_12v";
52		regulator-always-on;
53		regulator-boot-on;
54		regulator-min-microvolt = <12000000>;
55		regulator-max-microvolt = <12000000>;
56	};
57
58	hdmi-con {
59		compatible = "hdmi-connector";
60		type = "a";
61
62		port {
63			hdmi_con_in: endpoint {
64				remote-endpoint = <&hdmi_out_con>;
65			};
66		};
67	};
68
69	vcc3v3_sys: vcc3v3-sys {
70		compatible = "regulator-fixed";
71		regulator-name = "vcc3v3_sys";
72		regulator-always-on;
73		regulator-boot-on;
74		regulator-min-microvolt = <3300000>;
75		regulator-max-microvolt = <3300000>;
76		vin-supply = <&dc_12v>;
77	};
78
79	vcc5v0_sys: vcc5v0-sys {
80		compatible = "regulator-fixed";
81		regulator-name = "vcc5v0_sys";
82		regulator-always-on;
83		regulator-boot-on;
84		regulator-min-microvolt = <5000000>;
85		regulator-max-microvolt = <5000000>;
86		vin-supply = <&dc_12v>;
87	};
88
89	vcc5v0_usb: vcc5v0_usb {
90		compatible = "regulator-fixed";
91		regulator-name = "vcc5v0_usb";
92		regulator-always-on;
93		regulator-boot-on;
94		regulator-min-microvolt = <5000000>;
95		regulator-max-microvolt = <5000000>;
96		vin-supply = <&dc_12v>;
97	};
98
99	vcc5v0_usb_host: vcc5v0-usb-host {
100		compatible = "regulator-fixed";
101		enable-active-high;
102		gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
103		pinctrl-names = "default";
104		pinctrl-0 = <&vcc5v0_usb_host_en>;
105		regulator-name = "vcc5v0_usb_host";
106		regulator-min-microvolt = <5000000>;
107		regulator-max-microvolt = <5000000>;
108		vin-supply = <&vcc5v0_usb>;
109	};
110
111	vcc5v0_usb_otg: vcc5v0-usb-otg {
112		compatible = "regulator-fixed";
113		enable-active-high;
114		gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
115		pinctrl-names = "default";
116		pinctrl-0 = <&vcc5v0_usb_otg_en>;
117		regulator-name = "vcc5v0_usb_otg";
118		regulator-min-microvolt = <5000000>;
119		regulator-max-microvolt = <5000000>;
120		vin-supply = <&vcc5v0_usb>;
121	};
122};
123
124&combphy0 {
125	/* used for USB3 */
126	status = "okay";
127};
128
129&combphy1 {
130	/* used for USB3 */
131	status = "okay";
132};
133
134&combphy2 {
135	/* used for SATA */
136	status = "okay";
137};
138
139&gmac0 {
140	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
141	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
142	clock_in_out = "input";
143	phy-mode = "rgmii";
144	pinctrl-names = "default";
145	pinctrl-0 = <&gmac0_miim
146		     &gmac0_tx_bus2
147		     &gmac0_rx_bus2
148		     &gmac0_rgmii_clk
149		     &gmac0_rgmii_bus>;
150	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
151	snps,reset-active-low;
152	/* Reset time is 20ms, 100ms for rtl8211f */
153	snps,reset-delays-us = <0 20000 100000>;
154	tx_delay = <0x4f>;
155	rx_delay = <0x0f>;
156	status = "okay";
157
158	fixed-link {
159		speed = <1000>;
160		full-duplex;
161		pause;
162	};
163};
164
165&gmac1 {
166	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
167	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
168	clock_in_out = "output";
169	phy-handle = <&rgmii_phy1>;
170	phy-mode = "rgmii";
171	pinctrl-names = "default";
172	pinctrl-0 = <&gmac1m1_miim
173		     &gmac1m1_tx_bus2
174		     &gmac1m1_rx_bus2
175		     &gmac1m1_rgmii_clk
176		     &gmac1m1_rgmii_bus>;
177
178	snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
179	snps,reset-active-low;
180	/* Reset time is 20ms, 100ms for rtl8211f */
181	snps,reset-delays-us = <0 20000 100000>;
182
183	tx_delay = <0x3c>;
184	rx_delay = <0x2f>;
185
186	status = "okay";
187};
188
189&gpu {
190	mali-supply = <&vdd_gpu>;
191	status = "okay";
192};
193
194&hdmi {
195	avdd-0v9-supply = <&vdda0v9_image>;
196	avdd-1v8-supply = <&vcca1v8_image>;
197	status = "okay";
198};
199
200&hdmi_in {
201	hdmi_in_vp0: endpoint {
202		remote-endpoint = <&vp0_out_hdmi>;
203	};
204};
205
206&hdmi_out {
207	hdmi_out_con: endpoint {
208		remote-endpoint = <&hdmi_con_in>;
209	};
210};
211
212&hdmi_sound {
213	status = "okay";
214};
215
216&i2c0 {
217	status = "okay";
218
219	rk809: pmic@20 {
220		compatible = "rockchip,rk809";
221		reg = <0x20>;
222		interrupt-parent = <&gpio0>;
223		interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
224		#clock-cells = <1>;
225		pinctrl-names = "default";
226		pinctrl-0 = <&pmic_int>;
227		rockchip,system-power-controller;
228		vcc1-supply = <&vcc3v3_sys>;
229		vcc2-supply = <&vcc3v3_sys>;
230		vcc3-supply = <&vcc3v3_sys>;
231		vcc4-supply = <&vcc3v3_sys>;
232		vcc5-supply = <&vcc3v3_sys>;
233		vcc6-supply = <&vcc3v3_sys>;
234		vcc7-supply = <&vcc3v3_sys>;
235		vcc8-supply = <&vcc3v3_sys>;
236		vcc9-supply = <&vcc3v3_sys>;
237		wakeup-source;
238
239		regulators {
240			vdd_logic: DCDC_REG1 {
241				regulator-name = "vdd_logic";
242				regulator-always-on;
243				regulator-boot-on;
244				regulator-init-microvolt = <900000>;
245				regulator-initial-mode = <0x2>;
246				regulator-min-microvolt = <500000>;
247				regulator-max-microvolt = <1350000>;
248				regulator-ramp-delay = <6001>;
249
250				regulator-state-mem {
251					regulator-off-in-suspend;
252				};
253			};
254
255			vdd_gpu: DCDC_REG2 {
256				regulator-name = "vdd_gpu";
257				regulator-always-on;
258				regulator-init-microvolt = <900000>;
259				regulator-initial-mode = <0x2>;
260				regulator-min-microvolt = <500000>;
261				regulator-max-microvolt = <1350000>;
262				regulator-ramp-delay = <6001>;
263
264				regulator-state-mem {
265					regulator-off-in-suspend;
266				};
267			};
268
269			vcc_ddr: DCDC_REG3 {
270				regulator-name = "vcc_ddr";
271				regulator-always-on;
272				regulator-boot-on;
273				regulator-initial-mode = <0x2>;
274
275				regulator-state-mem {
276					regulator-on-in-suspend;
277				};
278			};
279
280			vdd_npu: DCDC_REG4 {
281				regulator-name = "vdd_npu";
282				regulator-init-microvolt = <900000>;
283				regulator-initial-mode = <0x2>;
284				regulator-min-microvolt = <500000>;
285				regulator-max-microvolt = <1350000>;
286				regulator-ramp-delay = <6001>;
287
288				regulator-state-mem {
289					regulator-off-in-suspend;
290				};
291			};
292
293			vcc_1v8: DCDC_REG5 {
294				regulator-name = "vcc_1v8";
295				regulator-always-on;
296				regulator-boot-on;
297				regulator-min-microvolt = <1800000>;
298				regulator-max-microvolt = <1800000>;
299
300				regulator-state-mem {
301					regulator-off-in-suspend;
302				};
303			};
304
305			vdda0v9_image: LDO_REG1 {
306				regulator-name = "vdda0v9_image";
307				regulator-always-on;
308				regulator-min-microvolt = <900000>;
309				regulator-max-microvolt = <900000>;
310
311				regulator-state-mem {
312					regulator-off-in-suspend;
313				};
314			};
315
316			vdda_0v9: LDO_REG2 {
317				regulator-name = "vdda_0v9";
318				regulator-always-on;
319				regulator-boot-on;
320				regulator-min-microvolt = <900000>;
321				regulator-max-microvolt = <900000>;
322
323				regulator-state-mem {
324					regulator-off-in-suspend;
325				};
326			};
327
328			vdda0v9_pmu: LDO_REG3 {
329				regulator-name = "vdda0v9_pmu";
330				regulator-always-on;
331				regulator-boot-on;
332				regulator-min-microvolt = <900000>;
333				regulator-max-microvolt = <900000>;
334
335				regulator-state-mem {
336					regulator-on-in-suspend;
337					regulator-suspend-microvolt = <900000>;
338				};
339			};
340
341			vccio_acodec: LDO_REG4 {
342				regulator-name = "vccio_acodec";
343				regulator-always-on;
344				regulator-boot-on;
345				regulator-min-microvolt = <3300000>;
346				regulator-max-microvolt = <3300000>;
347
348				regulator-state-mem {
349					regulator-off-in-suspend;
350				};
351			};
352
353			vccio_sd: LDO_REG5 {
354				regulator-name = "vccio_sd";
355				regulator-min-microvolt = <1800000>;
356				regulator-max-microvolt = <3300000>;
357
358				regulator-state-mem {
359					regulator-off-in-suspend;
360				};
361			};
362
363			vcc3v3_pmu: LDO_REG6 {
364				regulator-name = "vcc3v3_pmu";
365				regulator-always-on;
366				regulator-boot-on;
367				regulator-min-microvolt = <3300000>;
368				regulator-max-microvolt = <3300000>;
369
370				regulator-state-mem {
371					regulator-on-in-suspend;
372					regulator-suspend-microvolt = <3300000>;
373				};
374			};
375
376			vcca_1v8: LDO_REG7 {
377				regulator-name = "vcca_1v8";
378				regulator-always-on;
379				regulator-boot-on;
380				regulator-min-microvolt = <1800000>;
381				regulator-max-microvolt = <1800000>;
382
383				regulator-state-mem {
384					regulator-off-in-suspend;
385				};
386			};
387
388			vcca1v8_pmu: LDO_REG8 {
389				regulator-name = "vcca1v8_pmu";
390				regulator-always-on;
391				regulator-boot-on;
392				regulator-min-microvolt = <1800000>;
393				regulator-max-microvolt = <1800000>;
394
395				regulator-state-mem {
396					regulator-on-in-suspend;
397					regulator-suspend-microvolt = <1800000>;
398				};
399			};
400
401			vcca1v8_image: LDO_REG9 {
402				regulator-name = "vcca1v8_image";
403				regulator-always-on;
404				regulator-min-microvolt = <1800000>;
405				regulator-max-microvolt = <1800000>;
406
407				regulator-state-mem {
408					regulator-off-in-suspend;
409				};
410			};
411
412			vcc_3v3: SWITCH_REG1 {
413				regulator-name = "vcc_3v3";
414				regulator-always-on;
415				regulator-boot-on;
416
417				regulator-state-mem {
418					regulator-off-in-suspend;
419				};
420			};
421
422			vcc3v3_sd: SWITCH_REG2 {
423				regulator-name = "vcc3v3_sd";
424				regulator-always-on;
425
426				regulator-state-mem {
427					regulator-off-in-suspend;
428				};
429			};
430		};
431	};
432};
433
434&i2c3 {
435	status = "okay";
436
437	hym8563: rtc@51 {
438		compatible = "haoyu,hym8563";
439		reg = <0x51>;
440		interrupt-parent = <&gpio0>;
441		interrupts = <RK_PD3 IRQ_TYPE_EDGE_FALLING>;
442		#clock-cells = <0>;
443		clock-frequency = <32768>;
444		clock-output-names = "rtcic_32kout";
445		pinctrl-names = "default";
446		pinctrl-0 = <&hym8563_int>;
447		wakeup-source;
448	};
449};
450
451&i2c5 {
452	/* pin 3 (SDA) + 4 (SCL) of header con2 */
453	status = "disabled";
454};
455
456&i2s0_8ch {
457	/* hdmi sound */
458	status = "okay";
459};
460
461&mdio0 {
462	#address-cells = <1>;
463	#size-cells = <0>;
464
465	switch@0 {
466		compatible = "mediatek,mt7531";
467		reg = <0>;
468
469		ports {
470			#address-cells = <1>;
471			#size-cells = <0>;
472
473			port@1 {
474				reg = <1>;
475				label = "lan0";
476			};
477
478			port@2 {
479				reg = <2>;
480				label = "lan1";
481			};
482
483			port@3 {
484				reg = <3>;
485				label = "lan2";
486			};
487
488			port@4 {
489				reg = <4>;
490				label = "lan3";
491			};
492
493			port@5 {
494				reg = <5>;
495				label = "cpu";
496				ethernet = <&gmac0>;
497				phy-mode = "rgmii";
498
499				fixed-link {
500					speed = <1000>;
501					full-duplex;
502					pause;
503				};
504			};
505		};
506	};
507};
508
509&mdio1 {
510	rgmii_phy1: ethernet-phy@0 {
511		compatible = "ethernet-phy-ieee802.3-c22";
512		reg = <0x0>;
513	};
514};
515
516&pinctrl {
517	leds {
518		blue_led_pin: blue-led-pin {
519			rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
520		};
521		green_led_pin: green-led-pin {
522			rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
523		};
524	};
525
526	hym8563 {
527		hym8563_int: hym8563-int {
528			rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
529		};
530	};
531
532	pmic {
533		pmic_int: pmic_int {
534			rockchip,pins =
535				<0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
536		};
537	};
538
539	usb {
540		vcc5v0_usb_host_en: vcc5v0_usb_host_en {
541			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
542		};
543
544		vcc5v0_usb_otg_en: vcc5v0_usb_otg_en {
545			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
546		};
547	};
548};
549
550&pmu_io_domains {
551	pmuio1-supply = <&vcc3v3_pmu>;
552	pmuio2-supply = <&vcc3v3_pmu>;
553	vccio1-supply = <&vccio_acodec>;
554	vccio3-supply = <&vccio_sd>;
555	vccio4-supply = <&vcc_3v3>;
556	vccio5-supply = <&vcc_3v3>;
557	vccio6-supply = <&vcc_1v8>;
558	vccio7-supply = <&vcc_3v3>;
559	status = "okay";
560};
561
562&pwm8 {
563	/* fan 5v - gnd - pwm */
564	status = "okay";
565};
566
567&pwm10 {
568	/* pin 7 of header con2 */
569	status = "disabled";
570};
571
572&pwm11 {
573	/* pin 15 of header con2 */
574	status = "disabled";
575};
576
577&pwm12 {
578	/* pin 21 of header con2 */
579	/* shared with uart9 + spi3 */
580	pinctrl-0 = <&pwm12m1_pins>;
581	status = "disabled";
582};
583
584&pwm13 {
585	/* pin 24 of header con2 */
586	/* shared with uart9 */
587	pinctrl-0 = <&pwm13m1_pins>;
588	status = "disabled";
589};
590
591&pwm14 {
592	/* pin 23 of header con2 */
593	/* shared with spi3 */
594	pinctrl-0 = <&pwm14m1_pins>;
595	status = "disabled";
596};
597
598&pwm15 {
599	/* pin 19 of header con2 */
600	/* shared with spi3 */
601	pinctrl-0 = <&pwm15m1_pins>;
602	status = "disabled";
603};
604
605&saradc {
606	vref-supply = <&vcca_1v8>;
607	status = "okay";
608};
609
610&sata2 {
611	status = "okay";
612};
613
614&sdhci {
615	bus-width = <8>;
616	max-frequency = <200000000>;
617	non-removable;
618	pinctrl-names = "default";
619	pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
620	status = "okay";
621};
622
623&sdmmc0 {
624	bus-width = <4>;
625	cap-sd-highspeed;
626	cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
627	disable-wp;
628	pinctrl-names = "default";
629	pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
630	sd-uhs-sdr104;
631	vmmc-supply = <&vcc3v3_sd>;
632	vqmmc-supply = <&vccio_sd>;
633	status = "okay";
634};
635
636&spi3 {
637	/* pin 19 (MO) + 21 (MI) + 23 (CK) of header con2 */
638	/* shared with pwm12/14/15 and uart9 */
639	pinctrl-0 = <&spi3m1_pins>;
640	status = "disabled";
641};
642
643&tsadc {
644	rockchip,hw-tshut-mode = <1>;
645	rockchip,hw-tshut-polarity = <0>;
646	status = "okay";
647};
648
649&uart0 {
650	/* pin 8 (TX) + 10 (RX) (RTS:16, CTS:18) of header con2 */
651	status = "disabled";
652};
653
654&uart2 {
655	/* debug-uart */
656	status = "okay";
657};
658
659&uart7 {
660	/* pin 11 (TX) + 13 (RX) of header con2 */
661	pinctrl-0 = <&uart7m1_xfer>;
662	status = "disabled";
663};
664
665&uart9 {
666	/* pin 21 (TX) + 24 (RX) of header con2 */
667	/* shared with pwm13 and pwm12/spi3 */
668	pinctrl-0 = <&uart9m1_xfer>;
669	status = "disabled";
670};
671
672&usb_host0_ehci {
673	status = "okay";
674};
675
676&usb_host0_ohci {
677	status = "okay";
678};
679
680&usb_host0_xhci {
681	extcon = <&usb2phy0>;
682	status = "okay";
683};
684
685&usb_host1_ehci {
686	status = "okay";
687};
688
689&usb_host1_ohci {
690	status = "okay";
691};
692
693&usb_host1_xhci {
694	status = "okay";
695};
696
697&usb2phy0 {
698	status = "okay";
699};
700
701&usb2phy0_host {
702	phy-supply = <&vcc5v0_usb_host>;
703	status = "okay";
704};
705
706&usb2phy0_otg {
707	phy-supply = <&vcc5v0_usb_otg>;
708	status = "okay";
709};
710
711&vop {
712	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
713	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
714	status = "okay";
715};
716
717&vop_mmu {
718	status = "okay";
719};
720
721&vp0 {
722	vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
723		reg = <ROCKCHIP_VOP2_EP_HDMI0>;
724		remote-endpoint = <&hdmi_in_vp0>;
725	};
726};
727