1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 3/dts-v1/; 4 5#include <dt-bindings/gpio/gpio.h> 6#include <dt-bindings/pinctrl/rockchip.h> 7#include <dt-bindings/soc/rockchip,vop2.h> 8#include "rk3566.dtsi" 9 10/ { 11 model = "Pine64 RK3566 SoQuartz SOM"; 12 compatible = "pine64,soquartz", "rockchip,rk3566"; 13 14 aliases { 15 ethernet0 = &gmac1; 16 mmc0 = &sdmmc0; 17 mmc1 = &sdhci; 18 mmc2 = &sdmmc1; 19 }; 20 21 chosen: chosen { 22 stdout-path = "serial2:1500000n8"; 23 }; 24 25 gmac1_clkin: external-gmac1-clock { 26 compatible = "fixed-clock"; 27 clock-frequency = <125000000>; 28 clock-output-names = "gmac1_clkin"; 29 #clock-cells = <0>; 30 }; 31 32 hdmi-con { 33 compatible = "hdmi-connector"; 34 type = "a"; 35 36 port { 37 hdmi_con_in: endpoint { 38 remote-endpoint = <&hdmi_out_con>; 39 }; 40 }; 41 }; 42 43 leds { 44 compatible = "gpio-leds"; 45 46 led_diy: led-diy { 47 label = "diy-led"; 48 default-state = "on"; 49 gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_LOW>; 50 linux,default-trigger = "heartbeat"; 51 pinctrl-names = "default"; 52 pinctrl-0 = <&diy_led_enable_h>; 53 retain-state-suspended; 54 status = "disabled"; 55 }; 56 57 led_work: led-work { 58 label = "work-led"; 59 default-state = "off"; 60 gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>; 61 pinctrl-names = "default"; 62 pinctrl-0 = <&work_led_enable_h>; 63 retain-state-suspended; 64 status = "disabled"; 65 }; 66 }; 67 68 sdio_pwrseq: sdio-pwrseq { 69 status = "okay"; 70 compatible = "mmc-pwrseq-simple"; 71 clocks = <&rk809 1>; 72 clock-names = "ext_clock"; 73 pinctrl-names = "default"; 74 pinctrl-0 = <&wifi_enable_h>; 75 reset-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_LOW>; 76 }; 77 78 vbus: vbus-regulator { 79 compatible = "regulator-fixed"; 80 regulator-name = "vbus"; 81 regulator-always-on; 82 regulator-boot-on; 83 regulator-min-microvolt = <5000000>; 84 regulator-max-microvolt = <5000000>; 85 }; 86 87 /* sourced from vbus, vbus is provided by the carrier board */ 88 vcc5v0_sys: vcc5v0-sys-regulator { 89 compatible = "regulator-fixed"; 90 regulator-name = "vcc5v0_sys"; 91 regulator-always-on; 92 regulator-boot-on; 93 regulator-min-microvolt = <5000000>; 94 regulator-max-microvolt = <5000000>; 95 vin-supply = <&vbus>; 96 }; 97 98 vcc3v3_sys: vcc3v3-sys-regulator { 99 compatible = "regulator-fixed"; 100 regulator-name = "vcc3v3_sys"; 101 regulator-always-on; 102 regulator-boot-on; 103 regulator-min-microvolt = <3300000>; 104 regulator-max-microvolt = <3300000>; 105 vin-supply = <&vcc5v0_sys>; 106 }; 107 108 sdmmc_pwr: sdmmc-pwr-regulator { 109 compatible = "regulator-fixed"; 110 enable-active-high; 111 gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; 112 pinctrl-names = "default"; 113 pinctrl-0 = <&sdmmc_pwr_h>; 114 regulator-name = "sdmmc_pwr"; 115 status = "disabled"; 116 }; 117}; 118 119&cpu0 { 120 cpu-supply = <&vdd_cpu>; 121}; 122 123&cpu1 { 124 cpu-supply = <&vdd_cpu>; 125}; 126 127&cpu2 { 128 cpu-supply = <&vdd_cpu>; 129}; 130 131&cpu3 { 132 cpu-supply = <&vdd_cpu>; 133}; 134 135&gmac1 { 136 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>; 137 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>; 138 clock_in_out = "input"; 139 phy-supply = <&vcc_3v3>; 140 phy-mode = "rgmii"; 141 pinctrl-names = "default"; 142 pinctrl-0 = <&gmac1m0_miim 143 &gmac1m0_tx_bus2 144 &gmac1m0_rx_bus2 145 &gmac1m0_rgmii_clk 146 &gmac1m0_clkinout 147 &gmac1m0_rgmii_bus>; 148 snps,reset-gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>; 149 snps,reset-active-low; 150 /* Reset time is 20ms, 100ms for rtl8211f, also works well here */ 151 snps,reset-delays-us = <0 20000 100000>; 152 tx_delay = <0x30>; 153 rx_delay = <0x10>; 154 phy-handle = <&rgmii_phy1>; 155 status = "disabled"; 156}; 157 158&gpu { 159 mali-supply = <&vdd_gpu>; 160 status = "okay"; 161}; 162 163&hdmi { 164 avdd-0v9-supply = <&vdda0v9_image>; 165 avdd-1v8-supply = <&vcca1v8_image>; 166 status = "okay"; 167}; 168 169&hdmi_in { 170 hdmi_in_vp0: endpoint { 171 remote-endpoint = <&vp0_out_hdmi>; 172 }; 173}; 174 175&hdmi_out { 176 hdmi_out_con: endpoint { 177 remote-endpoint = <&hdmi_con_in>; 178 }; 179}; 180 181&hdmi_sound { 182 status = "okay"; 183}; 184 185&i2c0 { 186 status = "okay"; 187 188 vdd_cpu: regulator@1c { 189 compatible = "tcs,tcs4525"; 190 reg = <0x1c>; 191 fcs,suspend-voltage-selector = <1>; 192 regulator-name = "vdd_cpu"; 193 regulator-min-microvolt = <800000>; 194 regulator-max-microvolt = <1150000>; 195 regulator-ramp-delay = <2300>; 196 regulator-always-on; 197 regulator-boot-on; 198 vin-supply = <&vcc5v0_sys>; 199 200 regulator-state-mem { 201 regulator-off-in-suspend; 202 }; 203 }; 204 205 rk809: pmic@20 { 206 compatible = "rockchip,rk809"; 207 reg = <0x20>; 208 interrupt-parent = <&gpio0>; 209 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; 210 #clock-cells = <1>; 211 clock-output-names = "rk808-clkout1", "rk808-clkout2"; 212 pinctrl-names = "default"; 213 pinctrl-0 = <&pmic_int_l>; 214 rockchip,system-power-controller; 215 wakeup-source; 216 217 vcc1-supply = <&vcc3v3_sys>; 218 vcc2-supply = <&vcc3v3_sys>; 219 vcc3-supply = <&vcc3v3_sys>; 220 vcc4-supply = <&vcc3v3_sys>; 221 vcc5-supply = <&vcc3v3_sys>; 222 vcc6-supply = <&vcc3v3_sys>; 223 vcc7-supply = <&vcc3v3_sys>; 224 vcc8-supply = <&vcc3v3_sys>; 225 vcc9-supply = <&vcc3v3_sys>; 226 227 regulators { 228 vdd_logic: DCDC_REG1 { 229 regulator-name = "vdd_logic"; 230 regulator-always-on; 231 regulator-boot-on; 232 regulator-min-microvolt = <500000>; 233 regulator-max-microvolt = <1350000>; 234 regulator-init-microvolt = <900000>; 235 regulator-ramp-delay = <6001>; 236 regulator-initial-mode = <0x2>; 237 regulator-state-mem { 238 regulator-on-in-suspend; 239 regulator-suspend-microvolt = <900000>; 240 }; 241 }; 242 243 vdd_gpu: DCDC_REG2 { 244 regulator-name = "vdd_gpu"; 245 regulator-always-on; 246 regulator-boot-on; 247 regulator-min-microvolt = <500000>; 248 regulator-max-microvolt = <1350000>; 249 regulator-init-microvolt = <900000>; 250 regulator-ramp-delay = <6001>; 251 regulator-initial-mode = <0x2>; 252 regulator-state-mem { 253 regulator-off-in-suspend; 254 }; 255 }; 256 257 vcc_ddr: DCDC_REG3 { 258 regulator-always-on; 259 regulator-boot-on; 260 regulator-initial-mode = <0x2>; 261 regulator-name = "vcc_ddr"; 262 regulator-state-mem { 263 regulator-on-in-suspend; 264 }; 265 }; 266 267 vdd_npu: DCDC_REG4 { 268 regulator-always-on; 269 regulator-boot-on; 270 regulator-min-microvolt = <500000>; 271 regulator-max-microvolt = <1350000>; 272 regulator-init-microvolt = <900000>; 273 regulator-initial-mode = <0x2>; 274 regulator-name = "vdd_npu"; 275 regulator-state-mem { 276 regulator-off-in-suspend; 277 }; 278 }; 279 280 vcc_1v8: DCDC_REG5 { 281 regulator-name = "vcc_1v8"; 282 regulator-always-on; 283 regulator-boot-on; 284 regulator-min-microvolt = <1800000>; 285 regulator-max-microvolt = <1800000>; 286 regulator-state-mem { 287 regulator-on-in-suspend; 288 regulator-suspend-microvolt = <1800000>; 289 }; 290 }; 291 292 vdda0v9_image: LDO_REG1 { 293 regulator-always-on; 294 regulator-boot-on; 295 regulator-min-microvolt = <900000>; 296 regulator-max-microvolt = <900000>; 297 regulator-name = "vdda0v9_image"; 298 regulator-state-mem { 299 regulator-on-in-suspend; 300 regulator-suspend-microvolt = <900000>; 301 }; 302 }; 303 304 vdda_0v9: LDO_REG2 { 305 regulator-always-on; 306 regulator-boot-on; 307 regulator-min-microvolt = <900000>; 308 regulator-max-microvolt = <900000>; 309 regulator-name = "vdda_0v9"; 310 regulator-state-mem { 311 regulator-off-in-suspend; 312 }; 313 }; 314 315 vdda0v9_pmu: LDO_REG3 { 316 regulator-always-on; 317 regulator-boot-on; 318 regulator-min-microvolt = <900000>; 319 regulator-max-microvolt = <900000>; 320 regulator-name = "vdda0v9_pmu"; 321 regulator-state-mem { 322 regulator-on-in-suspend; 323 regulator-suspend-microvolt = <900000>; 324 }; 325 }; 326 327 vccio_acodec: LDO_REG4 { 328 regulator-always-on; 329 regulator-boot-on; 330 regulator-min-microvolt = <3300000>; 331 regulator-max-microvolt = <3300000>; 332 regulator-name = "vccio_acodec"; 333 regulator-state-mem { 334 regulator-off-in-suspend; 335 }; 336 }; 337 338 vccio_sd: LDO_REG5 { 339 regulator-always-on; 340 regulator-boot-on; 341 regulator-min-microvolt = <1800000>; 342 regulator-max-microvolt = <3300000>; 343 regulator-name = "vccio_sd"; 344 regulator-state-mem { 345 regulator-off-in-suspend; 346 }; 347 }; 348 349 vcc3v3_pmu: LDO_REG6 { 350 regulator-always-on; 351 regulator-boot-on; 352 regulator-min-microvolt = <3300000>; 353 regulator-max-microvolt = <3300000>; 354 regulator-name = "vcc3v3_pmu"; 355 regulator-state-mem { 356 regulator-on-in-suspend; 357 regulator-suspend-microvolt = <3300000>; 358 }; 359 }; 360 361 vcca_1v8: LDO_REG7 { 362 regulator-always-on; 363 regulator-boot-on; 364 regulator-min-microvolt = <1800000>; 365 regulator-max-microvolt = <1800000>; 366 regulator-name = "vcca_1v8"; 367 regulator-state-mem { 368 regulator-off-in-suspend; 369 }; 370 }; 371 372 vcca1v8_pmu: LDO_REG8 { 373 regulator-always-on; 374 regulator-boot-on; 375 regulator-min-microvolt = <1800000>; 376 regulator-max-microvolt = <1800000>; 377 regulator-name = "vcca1v8_pmu"; 378 regulator-state-mem { 379 regulator-off-in-suspend; 380 }; 381 }; 382 383 vcca1v8_image: LDO_REG9 { 384 regulator-always-on; 385 regulator-boot-on; 386 regulator-min-microvolt = <1800000>; 387 regulator-max-microvolt = <1800000>; 388 regulator-name = "vcca1v8_image"; 389 regulator-state-mem { 390 regulator-off-in-suspend; 391 }; 392 }; 393 394 vcc_3v3: SWITCH_REG1 { 395 regulator-name = "vcc_3v3"; 396 regulator-state-mem { 397 regulator-off-in-suspend; 398 }; 399 }; 400 401 vcc3v3_sd: SWITCH_REG2 { 402 regulator-name = "vcc3v3_sd"; 403 status = "disabled"; 404 regulator-state-mem { 405 regulator-on-in-suspend; 406 }; 407 }; 408 409 }; 410 }; 411}; 412 413/* 414 * i2c1 is exposed on CM1 / Module1A 415 * pin 80 - i2c1_scl_m0, pullup to vcc3v3_pmu 416 * pin 82 - i2c1_sda_m0, pullup to vcc3v3_pmu 417 */ 418&i2c1 { 419 status = "disabled"; 420}; 421 422/* 423 * i2c2 is exposed on CM1 / Module1A 424 * pin 56 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch 425 * pin 58 - i2c2_sda_m1, pullup to vcc_3v3 426 */ 427&i2c2 { 428 pinctrl-names = "default"; 429 pinctrl-0 = <&i2c2m1_xfer>; 430 status = "disabled"; 431}; 432 433/* 434 * i2c3 is exposed on CM1 / Module1A 435 * pin 35 - i2c3_scl_m0, pullup to vcc_3v3 436 * pin 36 - i2c3_sda_m0, pullup to vcc_3v3 437 */ 438&i2c3 { 439 status = "disabled"; 440}; 441 442/* 443 * i2c4 is exposed on CM2 / Module1B 444 * pin 45 - i2c4_scl_m1 445 * pin 47 - i2c4_sda_m1 446 */ 447&i2c4 { 448 pinctrl-names = "default"; 449 pinctrl-0 = <&i2c4m1_xfer>; 450 status = "disabled"; 451}; 452 453&i2s0_8ch { 454 status = "okay"; 455}; 456 457/* 458 * i2s1_8ch is exposed on CM1 / Module1A 459 * pin 24 - i2s1_sdi1_m1 460 * pin 25 - i2s1_sdo0_m1 461 * pin 26 - i2s1_lrck_tx_m1 462 * pin 27 - i2s1_sdi0_m1 463 * pin 29 - i2s1_sdi3_m1 464 * pin 30 - i2s1_sdi2_m1 465 * pin 40 - i2s1_sdo1_m1, shared with spi3 466 * pin 41 - i2s1_sdo2_m1 467 * pin 49 - i2s1_sclk_tx_m1 468 * pin 50 - i2s1_mclk_m1 469 * pin 56 - i2s1_sdo3_m1, shared with i2c2 470 */ 471&i2s1_8ch { 472 pinctrl-names = "default"; 473 pinctrl-0 = <&i2s1m1_sclktx &i2s1m1_sclkrx 474 &i2s1m1_lrcktx &i2s1m1_lrckrx 475 &i2s1m1_sdi0 &i2s1m1_sdi1 476 &i2s1m1_sdi2 &i2s1m1_sdi3 477 &i2s1m1_sdo0 &i2s1m1_sdo1 478 &i2s1m1_sdo2 &i2s1m1_sdo3>; 479 status = "disabled"; 480}; 481 482&mdio1 { 483 rgmii_phy1: ethernet-phy@0 { 484 compatible = "ethernet-phy-ieee802.3-c22"; 485 reg = <0>; 486 status = "disabled"; 487 }; 488}; 489 490&pcie2x1 { 491 pinctrl-names = "default"; 492 pinctrl-0 = <&pcie_reset_h>; 493 reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; 494}; 495 496&pinctrl { 497 bt { 498 bt_enable_h: bt-enable-h { 499 rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 500 }; 501 502 bt_host_wake_l: bt-host-wake-l { 503 rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>; 504 }; 505 506 bt_wake_l: bt-wake-l { 507 rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; 508 }; 509 }; 510 511 leds { 512 work_led_enable_h: work-led-enable-h { 513 rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; 514 }; 515 516 diy_led_enable_h: diy-led-enable-h { 517 rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; 518 }; 519 }; 520 521 pcie { 522 pcie_clkreq_h: pcie-clkreq-h { 523 rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 524 }; 525 pcie_reset_h: pcie-reset-h { 526 rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 527 }; 528 }; 529 530 pmic { 531 pmic_int_l: pmic-int-l { 532 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 533 }; 534 }; 535 536 sdio-pwrseq { 537 wifi_enable_h: wifi-enable-h { 538 rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 539 }; 540 }; 541 542 sdmmc-pwr { 543 sdmmc_pwr_h: sdmmc-pwr-h { 544 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; 545 }; 546 }; 547}; 548 549&pmu_io_domains { 550 pmuio1-supply = <&vcc3v3_pmu>; 551 pmuio2-supply = <&vcc3v3_pmu>; 552 vccio1-supply = <&vcc_3v3>; 553 vccio2-supply = <&vcc_1v8>; 554 vccio3-supply = <&vccio_sd>; 555 vccio4-supply = <&vcc_1v8>; 556 vccio5-supply = <&vcc_3v3>; 557 vccio6-supply = <&vcc_3v3>; 558 vccio7-supply = <&vcc_3v3>; 559 status = "okay"; 560}; 561 562/* 563 * saradc is exposed on CM1 / Module1A 564 * pin 94 - saradc_vin3 565 * pin 96 - saradc_vin2 566 */ 567&saradc { 568 vref-supply = <&vcca_1v8>; 569 status = "disabled"; 570}; 571 572&sdhci { 573 bus-width = <8>; 574 mmc-hs200-1_8v; 575 non-removable; 576 vmmc-supply = <&vcc_3v3>; 577 vqmmc-supply = <&vcc_1v8>; 578 status = "okay"; 579}; 580 581&sdmmc0 { 582 broken-cd; 583 bus-width = <4>; 584 cap-sd-highspeed; 585 disable-wp; 586 pinctrl-names = "default"; 587 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; 588 vqmmc-supply = <&vccio_sd>; 589 status = "disabled"; 590}; 591 592&sdmmc1 { 593 bus-width = <4>; 594 cap-sd-highspeed; 595 cap-sdio-irq; 596 keep-power-in-suspend; 597 mmc-pwrseq = <&sdio_pwrseq>; 598 non-removable; 599 pinctrl-names = "default"; 600 pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; 601 sd-uhs-sdr104; 602 vmmc-supply = <&vcc3v3_sys>; 603 vqmmc-supply = <&vcc_1v8>; 604 status = "okay"; 605}; 606 607/* 608 * spi3 is exposed on CM1 / Module1A 609 * pin 37 - spi3_cs1_m0 610 * pin 38 - spi3_clk_m0 611 * pin 39 - spi3_cs0_m0 612 * pin 40 - spi3_miso_m0, shared with i2s1_8ch 613 * pin 44 - spi3_mosi_m0 614 */ 615&spi3 { 616 status = "disabled"; 617}; 618 619&tsadc { 620 status = "okay"; 621}; 622 623&uart1 { 624 pinctrl-names = "default"; 625 pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>; 626 uart-has-rtscts; 627 status = "okay"; 628 629 bluetooth { 630 compatible = "brcm,bcm43438-bt"; 631 clocks = <&rk809 1>; 632 clock-names = "lpo"; 633 device-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; 634 host-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; 635 shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; 636 pinctrl-names = "default"; 637 pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; 638 vbat-supply = <&vcc3v3_sys>; 639 vddio-supply = <&vcca1v8_pmu>; 640 }; 641}; 642 643/* 644 * uart2 is exposed on CM1 / Module1A 645 * pin 51 - uart2_rx_m0 646 * pin 55 - uart2_tx_m0 647 */ 648&uart2 { 649 status = "disabled"; 650}; 651 652/* 653 * uart7 is exposed on CM1 / Module1A 654 * pin 46 - uart7_tx_m2 655 * pin 47 - uart7_rx_m2 656 */ 657&uart7 { 658 pinctrl-names = "default"; 659 pinctrl-0 = <&uart7m2_xfer>; 660 status = "disabled"; 661}; 662 663/* dwc3_otg is the only usb port available */ 664&usb2phy0 { 665 status = "disabled"; 666}; 667 668&usb2phy0_otg { 669 status = "disabled"; 670}; 671 672&usb_host0_xhci { 673 status = "disabled"; 674}; 675 676&vop { 677 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; 678 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; 679 status = "okay"; 680}; 681 682&vop_mmu { 683 status = "okay"; 684}; 685 686&vp0 { 687 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 688 reg = <ROCKCHIP_VOP2_EP_HDMI0>; 689 remote-endpoint = <&hdmi_in_vp0>; 690 }; 691}; 692