1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3/dts-v1/;
4
5#include "rk3566-soquartz.dtsi"
6
7/ {
8	model = "Pine64 RK3566 SoQuartz with CM4-IO Carrier Board";
9	compatible = "pine64,soquartz-cm4io", "pine64,soquartz", "rockchip,rk3566";
10
11	/* labeled +12v in schematic */
12	vcc12v_dcin: vcc12v-dcin-regulator {
13		compatible = "regulator-fixed";
14		regulator-name = "vcc12v_dcin";
15		regulator-always-on;
16		regulator-boot-on;
17		regulator-min-microvolt = <12000000>;
18		regulator-max-microvolt = <12000000>;
19	};
20
21	/* labeled +5v in schematic */
22	vcc_5v: vcc-5v-regulator {
23		compatible = "regulator-fixed";
24		regulator-name = "vcc_5v";
25		regulator-always-on;
26		regulator-boot-on;
27		regulator-min-microvolt = <5000000>;
28		regulator-max-microvolt = <5000000>;
29		vin-supply = <&vcc12v_dcin>;
30	};
31};
32
33/* phy for pcie */
34&combphy2 {
35	phy-supply = <&vcc3v3_sys>;
36	status = "okay";
37};
38
39&gmac1 {
40	status = "okay";
41};
42
43/*
44 * i2c1 is exposed on CM1 / Module1A
45 * pin 80 - SCL0 - i2c1_scl_m0, pullup to vcc3v3_pmu
46 * pin 82 - SDA0 - i2c1_sda_m0, pullup to vcc3v3_pmu
47 */
48&i2c1 {
49	status = "okay";
50
51	/*
52	 * the rtc interrupt is tied to PMIC_PWRON,
53	 * it will force reset the board if triggered.
54	 */
55	pcf85063: rtc@51 {
56		compatible = "nxp,pcf85063";
57		reg = <0x51>;
58	};
59};
60
61/*
62 * i2c2 is exposed on CM1 / Module1A - to PI40
63 * pin 56 - GPIO3 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch
64 * pin 58 - GPIO2 - i2c2_sda_m1, pullup to vcc_3v3
65 */
66&i2c2 {
67	status = "disabled";
68};
69
70/*
71 * i2c3 is exposed on CM1 / Module1A - to PI40
72 * pin 35 - ID_SC(GPIO28) - i2c3_scl_m0, pullup to vcc_3v3
73 * pin 36 - ID_SD(GPIO27) - i2c3_sda_m0, pullup to vcc_3v3
74 */
75&i2c3 {
76	status = "disabled";
77};
78
79/*
80 * i2c4 is exposed on CM2 / Module1B - to PI40
81 * pin 45 - GPIO24 - i2c4_scl_m1
82 * pin 47 - GPIO23 - i2c4_sda_m1
83 */
84&i2c4 {
85	status = "disabled";
86};
87
88/*
89 * i2s1_8ch is exposed on CM1 / Module1A - to PI40
90 * pin 24 - GPIO26 - i2s1_sdi1_m1
91 * pin 25 - GPIO21 - i2s1_sdo0_m1
92 * pin 26 - GPIO19 - i2s1_lrck_tx_m1
93 * pin 27 - GPIO20 - i2s1_sdi0_m1
94 * pin 29 - GPIO16 - i2s1_sdi3_m1
95 * pin 30 - GPIO6  - i2s1_sdi2_m1
96 * pin 40 - GPIO9  - i2s1_sdo1_m1, shared with spi3
97 * pin 41 - GPIO25 - i2s1_sdo2_m1
98 * pin 49 - GPIO18 - i2s1_sclk_tx_m1
99 * pin 50 - GPIO17 - i2s1_mclk_m1
100 * pin 56 - GPIO3  - i2s1_sdo3_m1, shared with i2c2
101 */
102&i2s1_8ch {
103	status = "disabled";
104};
105
106&led_diy {
107	status = "okay";
108};
109
110&led_work {
111	status = "okay";
112};
113
114&pcie2x1 {
115	vpcie3v3-supply = <&vcc_3v3>;
116	status = "okay";
117};
118
119&rgmii_phy1 {
120	status = "okay";
121};
122
123/*
124 * saradc is exposed on CM1 / Module1A - to J2
125 * pin 94 - AIN1 - saradc_vin3
126 * pin 96 - AIN0 - saradc_vin2
127 */
128&saradc {
129	status = "disabled";
130};
131
132&sdmmc0 {
133	vmmc-supply = <&sdmmc_pwr>;
134	status = "okay";
135};
136
137&sdmmc_pwr {
138	regulator-min-microvolt = <3300000>;
139	regulator-max-microvolt = <3300000>;
140	status = "okay";
141};
142
143/*
144 *  spi3 is exposed on CM1 / Module1A - to PI40
145 * pin 37 - GPIO7  - spi3_cs1_m0
146 * pin 38 - GPIO11 - spi3_clk_m0
147 * pin 39 - GPIO8  - spi3_cs0_m0
148 * pin 40 - GPIO9  - spi3_miso_m0, shared with i2s1_8ch
149 * pin 44 - GPIO10 - spi3_mosi_m0
150 */
151&spi3 {
152	status = "disabled";
153};
154
155/*
156 * uart2 is exposed on CM1 / Module1A - to PI40
157 * pin 51 - GPIO15 - uart2_rx_m0
158 * pin 55 - GPIO14 - uart2_tx_m0
159 */
160&uart2 {
161	status = "okay";
162};
163
164/*
165 * uart7 is exposed on CM1 / Module1A - to PI40
166 * pin 46 - GPIO22 - uart7_tx_m2
167 * pin 47 - GPIO23 - uart7_rx_m2
168 */
169&uart7 {
170	status = "okay";
171};
172
173&usb2phy0 {
174	status = "okay";
175};
176
177&usb2phy0_otg {
178	phy-supply = <&vcc_5v>;
179	status = "okay";
180};
181
182&usb_host0_xhci {
183	status = "okay";
184};
185
186&vbus {
187	vin-supply = <&vcc_5v>;
188};
189