1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3/dts-v1/;
4
5#include <dt-bindings/gpio/gpio.h>
6#include <dt-bindings/input/input.h>
7#include <dt-bindings/leds/common.h>
8#include <dt-bindings/pinctrl/rockchip.h>
9
10#include "rk3566-soquartz.dtsi"
11
12/ {
13	model = "PINE64 RK3566 SOQuartz on Blade carrier board";
14	compatible = "pine64,soquartz-blade", "pine64,soquartz", "rockchip,rk3566";
15
16	/* labeled VCC3V0_SD in schematic to not conflict with PMIC regulator */
17	vcc3v0_sd: vcc3v0-sd-regulator {
18		compatible = "regulator-fixed";
19		regulator-name = "vcc3v0_sd";
20		regulator-always-on;
21		regulator-boot-on;
22		regulator-min-microvolt = <3300000>;
23		regulator-max-microvolt = <3300000>;
24		vin-supply = <&vcc3v3_sys>;
25	};
26
27	/* labeled VCC_SSD in schematic */
28	vcc3v3_pcie_p: vcc3v3-pcie-regulator {
29		compatible = "regulator-fixed";
30		regulator-name = "vcc3v3_pcie_p";
31		regulator-always-on;
32		regulator-boot-on;
33		regulator-min-microvolt = <3300000>;
34		regulator-max-microvolt = <3300000>;
35		vin-supply = <&vbus>;
36	};
37
38	vcc5v_dcin: vcc5v-dcin-regulator {
39		compatible = "regulator-fixed";
40		regulator-name = "vcc5v_dcin";
41		regulator-always-on;
42		regulator-boot-on;
43		regulator-min-microvolt = <5000000>;
44		regulator-max-microvolt = <5000000>;
45	};
46};
47
48&combphy2 {
49	phy-supply = <&vcc3v3_sys>;
50	status = "okay";
51};
52
53&gmac1 {
54	status = "okay";
55};
56
57/*
58 * i2c1 is exposed on CM1 / Module1A
59 * pin 80 - SCL0 - i2c1_scl_m0, pullup to vcc3v3_pmu
60 * pin 82 - SDA0 - i2c1_sda_m0, pullup to vcc3v3_pmu
61 */
62&i2c1 {
63	status = "okay";
64
65};
66
67/*
68 * i2c2 is exposed on CM1 / Module1A - to PI40
69 * pin 56 - GPIO3 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch
70 * pin 58 - GPIO2 - i2c2_sda_m1, pullup to vcc_3v3
71 */
72&i2c2 {
73	status = "disabled";
74};
75
76/*
77 * i2c3 is exposed on CM1 / Module1A - to PI40
78 * pin 35 - ID_SC(GPIO28) - i2c3_scl_m0, pullup to vcc_3v3
79 * pin 36 - ID_SD(GPIO27) - i2c3_sda_m0, pullup to vcc_3v3
80 */
81&i2c3 {
82	status = "disabled";
83};
84
85/*
86 * i2c4 is exposed on CM2 / Module1B - to PI40
87 * pin 45 - GPIO24 - i2c4_scl_m1
88 * pin 47 - GPIO23 - i2c4_sda_m1
89 */
90&i2c4 {
91	status = "disabled";
92};
93
94/*
95 * i2s1_8ch is exposed on CM1 / Module1A - to PI40
96 * pin 24 - GPIO26 - i2s1_sdi1_m1
97 * pin 25 - GPIO21 - i2s1_sdo0_m1
98 * pin 26 - GPIO19 - i2s1_lrck_tx_m1
99 * pin 27 - GPIO20 - i2s1_sdi0_m1
100 * pin 29 - GPIO16 - i2s1_sdi3_m1
101 * pin 30 - GPIO6  - i2s1_sdi2_m1
102 * pin 40 - GPIO9  - i2s1_sdo1_m1, shared with spi3
103 * pin 41 - GPIO25 - i2s1_sdo2_m1
104 * pin 49 - GPIO18 - i2s1_sclk_tx_m1
105 * pin 50 - GPIO17 - i2s1_mclk_m1
106 * pin 56 - GPIO3  - i2s1_sdo3_m1, shared with i2c2
107 */
108&i2s1_8ch {
109	status = "disabled";
110};
111
112&led_diy {
113	color = <LED_COLOR_ID_RED>;
114	function = LED_FUNCTION_DISK_ACTIVITY;
115	linux,default-trigger = "disk-activity";
116	status = "okay";
117};
118
119&led_work {
120	color = <LED_COLOR_ID_GREEN>;
121	function = LED_FUNCTION_STATUS;
122	linux,default-trigger = "heartbeat";
123	status = "okay";
124};
125
126&pcie2x1 {
127	vpcie3v3-supply = <&vcc3v3_pcie_p>;
128	status = "okay";
129};
130
131&rgmii_phy1 {
132	status = "okay";
133};
134
135/*
136 * saradc is exposed on CM1 / Module1A - to J2
137 * pin 94 - AIN1 - saradc_vin3
138 * pin 96 - AIN0 - saradc_vin2
139 */
140&saradc {
141	status = "disabled";
142};
143
144&sdmmc0 {
145	vmmc-supply = <&vcc3v0_sd>;
146	status = "okay";
147};
148
149/*
150 * spi3 is exposed on CM1 / Module1A - to PI40
151 * pin 37 - GPIO7  - spi3_cs1_m0
152 * pin 38 - GPIO11 - spi3_clk_m0
153 * pin 39 - GPIO8  - spi3_cs0_m0
154 * pin 40 - GPIO9  - spi3_miso_m0, shared with i2s1_8ch
155 * pin 44 - GPIO10 - spi3_mosi_m0
156 */
157&spi3 {
158	status = "disabled";
159};
160
161/*
162 * uart2 is exposed on CM1 / Module1A - to PI40
163 * pin 51 - GPIO15 - uart2_rx_m0
164 * pin 55 - GPIO14 - uart2_tx_m0
165 */
166&uart2 {
167	status = "okay";
168};
169
170/*
171 * uart7 is exposed on CM1 / Module1A - to PI40
172 * pin 46 - GPIO22 - uart7_tx_m2
173 * pin 47 - GPIO23 - uart7_rx_m2
174 */
175&uart7 {
176	status = "okay";
177};
178
179&usb2phy0 {
180	status = "okay";
181};
182
183&usb2phy0_otg {
184	phy-supply = <&vbus>;
185	status = "okay";
186};
187
188&usb_host0_xhci {
189	status = "okay";
190};
191
192&vbus {
193	vin-supply = <&vcc5v_dcin>;
194};
195