1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. 4 * Copyright (c) 2018 Akash Gajjar <Akash_Gajjar@mentor.com> 5 */ 6 7/dts-v1/; 8#include <dt-bindings/input/linux-event-codes.h> 9#include <dt-bindings/pwm/pwm.h> 10#include "rk3399.dtsi" 11#include "rk3399-opp.dtsi" 12 13/ { 14 model = "Pine64 RockPro64"; 15 compatible = "pine64,rockpro64", "rockchip,rk3399"; 16 17 chosen { 18 stdout-path = "serial2:1500000n8"; 19 }; 20 21 clkin_gmac: external-gmac-clock { 22 compatible = "fixed-clock"; 23 clock-frequency = <125000000>; 24 clock-output-names = "clkin_gmac"; 25 #clock-cells = <0>; 26 }; 27 28 dc_12v: dc-12v { 29 compatible = "regulator-fixed"; 30 regulator-name = "dc_12v"; 31 regulator-always-on; 32 regulator-boot-on; 33 regulator-min-microvolt = <12000000>; 34 regulator-max-microvolt = <12000000>; 35 }; 36 37 gpio-keys { 38 compatible = "gpio-keys"; 39 autorepeat; 40 pinctrl-names = "default"; 41 pinctrl-0 = <&pwrbtn>; 42 43 power { 44 debounce-interval = <100>; 45 gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; 46 label = "GPIO Key Power"; 47 linux,code = <KEY_POWER>; 48 wakeup-source; 49 }; 50 }; 51 52 leds { 53 compatible = "gpio-leds"; 54 pinctrl-names = "default"; 55 pinctrl-0 = <&work_led_gpio>, <&diy_led_gpio>; 56 57 work-led { 58 label = "work"; 59 default-state = "on"; 60 gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; 61 }; 62 63 diy-led { 64 label = "diy"; 65 default-state = "off"; 66 gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; 67 }; 68 }; 69 70 sdio_pwrseq: sdio-pwrseq { 71 compatible = "mmc-pwrseq-simple"; 72 clocks = <&rk808 1>; 73 clock-names = "ext_clock"; 74 pinctrl-names = "default"; 75 pinctrl-0 = <&wifi_enable_h>; 76 77 /* 78 * On the module itself this is one of these (depending 79 * on the actual card populated): 80 * - SDIO_RESET_L_WL_REG_ON 81 * - PDN (power down when low) 82 */ 83 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; 84 }; 85 86 /* switched by pmic_sleep */ 87 vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 { 88 compatible = "regulator-fixed"; 89 regulator-name = "vcc1v8_s3"; 90 regulator-always-on; 91 regulator-boot-on; 92 regulator-min-microvolt = <1800000>; 93 regulator-max-microvolt = <1800000>; 94 vin-supply = <&vcc_1v8>; 95 }; 96 97 vcc3v3_pcie: vcc3v3-pcie-regulator { 98 compatible = "regulator-fixed"; 99 enable-active-high; 100 gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; 101 pinctrl-names = "default"; 102 pinctrl-0 = <&pcie_pwr_en>; 103 regulator-name = "vcc3v3_pcie"; 104 regulator-always-on; 105 regulator-boot-on; 106 vin-supply = <&dc_12v>; 107 }; 108 109 vcc3v3_sys: vcc3v3-sys { 110 compatible = "regulator-fixed"; 111 regulator-name = "vcc3v3_sys"; 112 regulator-always-on; 113 regulator-boot-on; 114 regulator-min-microvolt = <3300000>; 115 regulator-max-microvolt = <3300000>; 116 vin-supply = <&vcc_sys>; 117 }; 118 119 /* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */ 120 vcc5v0_host: vcc5v0-host-regulator { 121 compatible = "regulator-fixed"; 122 enable-active-high; 123 gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; 124 pinctrl-names = "default"; 125 pinctrl-0 = <&vcc5v0_host_en>; 126 regulator-name = "vcc5v0_host"; 127 regulator-always-on; 128 vin-supply = <&vcc_sys>; 129 }; 130 131 vcc5v0_typec: vcc5v0-typec-regulator { 132 compatible = "regulator-fixed"; 133 enable-active-high; 134 gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; 135 pinctrl-names = "default"; 136 pinctrl-0 = <&vcc5v0_typec_en>; 137 regulator-name = "vcc5v0_typec"; 138 regulator-always-on; 139 vin-supply = <&vcc_sys>; 140 }; 141 142 vcc_sys: vcc-sys { 143 compatible = "regulator-fixed"; 144 regulator-name = "vcc_sys"; 145 regulator-always-on; 146 regulator-boot-on; 147 regulator-min-microvolt = <5000000>; 148 regulator-max-microvolt = <5000000>; 149 vin-supply = <&dc_12v>; 150 }; 151 152 vdd_log: vdd-log { 153 compatible = "pwm-regulator"; 154 pwms = <&pwm2 0 25000 1>; 155 regulator-name = "vdd_log"; 156 regulator-always-on; 157 regulator-boot-on; 158 regulator-min-microvolt = <800000>; 159 regulator-max-microvolt = <1400000>; 160 vin-supply = <&vcc_sys>; 161 }; 162}; 163 164&cpu_l0 { 165 cpu-supply = <&vdd_cpu_l>; 166}; 167 168&cpu_l1 { 169 cpu-supply = <&vdd_cpu_l>; 170}; 171 172&cpu_l2 { 173 cpu-supply = <&vdd_cpu_l>; 174}; 175 176&cpu_l3 { 177 cpu-supply = <&vdd_cpu_l>; 178}; 179 180&cpu_b0 { 181 cpu-supply = <&vdd_cpu_b>; 182}; 183 184&cpu_b1 { 185 cpu-supply = <&vdd_cpu_b>; 186}; 187 188&emmc_phy { 189 status = "okay"; 190}; 191 192&gmac { 193 assigned-clocks = <&cru SCLK_RMII_SRC>; 194 assigned-clock-parents = <&clkin_gmac>; 195 clock_in_out = "input"; 196 phy-supply = <&vcc_lan>; 197 phy-mode = "rgmii"; 198 pinctrl-names = "default"; 199 pinctrl-0 = <&rgmii_pins>; 200 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 201 snps,reset-active-low; 202 snps,reset-delays-us = <0 10000 50000>; 203 tx_delay = <0x28>; 204 rx_delay = <0x11>; 205 status = "okay"; 206}; 207 208&hdmi { 209 ddc-i2c-bus = <&i2c3>; 210 pinctrl-names = "default"; 211 pinctrl-0 = <&hdmi_cec>; 212 status = "okay"; 213}; 214 215&i2c0 { 216 clock-frequency = <400000>; 217 i2c-scl-rising-time-ns = <168>; 218 i2c-scl-falling-time-ns = <4>; 219 status = "okay"; 220 221 rk808: pmic@1b { 222 compatible = "rockchip,rk808"; 223 reg = <0x1b>; 224 interrupt-parent = <&gpio1>; 225 interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 226 #clock-cells = <1>; 227 clock-output-names = "xin32k", "rk808-clkout2"; 228 pinctrl-names = "default"; 229 pinctrl-0 = <&pmic_int_l>; 230 rockchip,system-power-controller; 231 wakeup-source; 232 233 vcc1-supply = <&vcc_sys>; 234 vcc2-supply = <&vcc_sys>; 235 vcc3-supply = <&vcc_sys>; 236 vcc4-supply = <&vcc_sys>; 237 vcc6-supply = <&vcc_sys>; 238 vcc7-supply = <&vcc_sys>; 239 vcc8-supply = <&vcc3v3_sys>; 240 vcc9-supply = <&vcc_sys>; 241 vcc10-supply = <&vcc_sys>; 242 vcc11-supply = <&vcc_sys>; 243 vcc12-supply = <&vcc3v3_sys>; 244 vddio-supply = <&vcc1v8_pmu>; 245 246 regulators { 247 vdd_center: DCDC_REG1 { 248 regulator-name = "vdd_center"; 249 regulator-always-on; 250 regulator-boot-on; 251 regulator-min-microvolt = <750000>; 252 regulator-max-microvolt = <1350000>; 253 regulator-ramp-delay = <6001>; 254 regulator-state-mem { 255 regulator-off-in-suspend; 256 }; 257 }; 258 259 vdd_cpu_l: DCDC_REG2 { 260 regulator-name = "vdd_cpu_l"; 261 regulator-always-on; 262 regulator-boot-on; 263 regulator-min-microvolt = <750000>; 264 regulator-max-microvolt = <1350000>; 265 regulator-ramp-delay = <6001>; 266 regulator-state-mem { 267 regulator-off-in-suspend; 268 }; 269 }; 270 271 vcc_ddr: DCDC_REG3 { 272 regulator-name = "vcc_ddr"; 273 regulator-always-on; 274 regulator-boot-on; 275 regulator-state-mem { 276 regulator-on-in-suspend; 277 }; 278 }; 279 280 vcc_1v8: DCDC_REG4 { 281 regulator-name = "vcc_1v8"; 282 regulator-always-on; 283 regulator-boot-on; 284 regulator-min-microvolt = <1800000>; 285 regulator-max-microvolt = <1800000>; 286 regulator-state-mem { 287 regulator-on-in-suspend; 288 regulator-suspend-microvolt = <1800000>; 289 }; 290 }; 291 292 vcc1v8_dvp: LDO_REG1 { 293 regulator-name = "vcc1v8_dvp"; 294 regulator-always-on; 295 regulator-boot-on; 296 regulator-min-microvolt = <1800000>; 297 regulator-max-microvolt = <1800000>; 298 regulator-state-mem { 299 regulator-off-in-suspend; 300 }; 301 }; 302 303 vcc3v0_touch: LDO_REG2 { 304 regulator-name = "vcc3v0_touch"; 305 regulator-always-on; 306 regulator-boot-on; 307 regulator-min-microvolt = <3000000>; 308 regulator-max-microvolt = <3000000>; 309 regulator-state-mem { 310 regulator-off-in-suspend; 311 }; 312 }; 313 314 vcc1v8_pmu: LDO_REG3 { 315 regulator-name = "vcc1v8_pmu"; 316 regulator-always-on; 317 regulator-boot-on; 318 regulator-min-microvolt = <1800000>; 319 regulator-max-microvolt = <1800000>; 320 regulator-state-mem { 321 regulator-on-in-suspend; 322 regulator-suspend-microvolt = <1800000>; 323 }; 324 }; 325 326 vcc_sdio: LDO_REG4 { 327 regulator-name = "vcc_sdio"; 328 regulator-always-on; 329 regulator-boot-on; 330 regulator-min-microvolt = <1800000>; 331 regulator-max-microvolt = <3000000>; 332 regulator-state-mem { 333 regulator-on-in-suspend; 334 regulator-suspend-microvolt = <3000000>; 335 }; 336 }; 337 338 vcca3v0_codec: LDO_REG5 { 339 regulator-name = "vcca3v0_codec"; 340 regulator-always-on; 341 regulator-boot-on; 342 regulator-min-microvolt = <3000000>; 343 regulator-max-microvolt = <3000000>; 344 regulator-state-mem { 345 regulator-off-in-suspend; 346 }; 347 }; 348 349 vcc_1v5: LDO_REG6 { 350 regulator-name = "vcc_1v5"; 351 regulator-always-on; 352 regulator-boot-on; 353 regulator-min-microvolt = <1500000>; 354 regulator-max-microvolt = <1500000>; 355 regulator-state-mem { 356 regulator-on-in-suspend; 357 regulator-suspend-microvolt = <1500000>; 358 }; 359 }; 360 361 vcca1v8_codec: LDO_REG7 { 362 regulator-name = "vcca1v8_codec"; 363 regulator-always-on; 364 regulator-boot-on; 365 regulator-min-microvolt = <1800000>; 366 regulator-max-microvolt = <1800000>; 367 regulator-state-mem { 368 regulator-off-in-suspend; 369 }; 370 }; 371 372 vcc_3v0: LDO_REG8 { 373 regulator-name = "vcc_3v0"; 374 regulator-always-on; 375 regulator-boot-on; 376 regulator-min-microvolt = <3000000>; 377 regulator-max-microvolt = <3000000>; 378 regulator-state-mem { 379 regulator-on-in-suspend; 380 regulator-suspend-microvolt = <3000000>; 381 }; 382 }; 383 384 vcc3v3_s3: vcc_lan: SWITCH_REG1 { 385 regulator-name = "vcc3v3_s3"; 386 regulator-always-on; 387 regulator-boot-on; 388 regulator-state-mem { 389 regulator-off-in-suspend; 390 }; 391 }; 392 393 vcc3v3_s0: SWITCH_REG2 { 394 regulator-name = "vcc3v3_s0"; 395 regulator-always-on; 396 regulator-boot-on; 397 regulator-state-mem { 398 regulator-off-in-suspend; 399 }; 400 }; 401 }; 402 }; 403 404 vdd_cpu_b: regulator@40 { 405 compatible = "silergy,syr827"; 406 reg = <0x40>; 407 fcs,suspend-voltage-selector = <1>; 408 pinctrl-names = "default"; 409 pinctrl-0 = <&vsel1_gpio>; 410 regulator-name = "vdd_cpu_b"; 411 regulator-min-microvolt = <712500>; 412 regulator-max-microvolt = <1500000>; 413 regulator-ramp-delay = <1000>; 414 regulator-always-on; 415 regulator-boot-on; 416 vin-supply = <&vcc_sys>; 417 418 regulator-state-mem { 419 regulator-off-in-suspend; 420 }; 421 }; 422 423 vdd_gpu: regulator@41 { 424 compatible = "silergy,syr828"; 425 reg = <0x41>; 426 fcs,suspend-voltage-selector = <1>; 427 pinctrl-names = "default"; 428 pinctrl-0 = <&vsel2_gpio>; 429 regulator-name = "vdd_gpu"; 430 regulator-min-microvolt = <712500>; 431 regulator-max-microvolt = <1500000>; 432 regulator-ramp-delay = <1000>; 433 regulator-always-on; 434 regulator-boot-on; 435 vin-supply = <&vcc_sys>; 436 437 regulator-state-mem { 438 regulator-off-in-suspend; 439 }; 440 }; 441}; 442 443&i2c1 { 444 i2c-scl-rising-time-ns = <300>; 445 i2c-scl-falling-time-ns = <15>; 446 status = "okay"; 447}; 448 449&i2c3 { 450 i2c-scl-rising-time-ns = <450>; 451 i2c-scl-falling-time-ns = <15>; 452 status = "okay"; 453}; 454 455&i2c4 { 456 i2c-scl-rising-time-ns = <600>; 457 i2c-scl-falling-time-ns = <20>; 458 status = "okay"; 459 460 fusb0: typec-portc@22 { 461 compatible = "fcs,fusb302"; 462 reg = <0x22>; 463 interrupt-parent = <&gpio1>; 464 interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>; 465 pinctrl-names = "default"; 466 pinctrl-0 = <&fusb0_int>; 467 vbus-supply = <&vcc5v0_typec>; 468 status = "okay"; 469 }; 470}; 471 472&i2s0 { 473 rockchip,playback-channels = <8>; 474 rockchip,capture-channels = <8>; 475 status = "okay"; 476}; 477 478&i2s1 { 479 rockchip,playback-channels = <2>; 480 rockchip,capture-channels = <2>; 481 status = "okay"; 482}; 483 484&i2s2 { 485 status = "okay"; 486}; 487 488&io_domains { 489 status = "okay"; 490 491 bt656-supply = <&vcc1v8_dvp>; 492 audio-supply = <&vcca1v8_codec>; 493 sdmmc-supply = <&vcc_sdio>; 494 gpio1830-supply = <&vcc_3v0>; 495}; 496 497&pmu_io_domains { 498 pmu1830-supply = <&vcc_3v0>; 499 status = "okay"; 500}; 501 502&pinctrl { 503 buttons { 504 pwrbtn: pwrbtn { 505 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; 506 }; 507 }; 508 509 fusb302x { 510 fusb0_int: fusb0-int { 511 rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; 512 }; 513 }; 514 515 leds { 516 work_led_gpio: work_led-gpio { 517 rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 518 }; 519 520 diy_led_gpio: diy_led-gpio { 521 rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 522 }; 523 }; 524 525 lcd-panel { 526 lcd_panel_reset: lcd-panel-reset { 527 rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; 528 }; 529 }; 530 531 pcie { 532 pcie_pwr_en: pcie-pwr-en { 533 rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; 534 }; 535 }; 536 537 pmic { 538 pmic_int_l: pmic-int-l { 539 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; 540 }; 541 542 vsel1_gpio: vsel1-gpio { 543 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; 544 }; 545 546 vsel2_gpio: vsel2-gpio { 547 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; 548 }; 549 }; 550 551 sdio-pwrseq { 552 wifi_enable_h: wifi-enable-h { 553 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 554 }; 555 }; 556 557 usb-typec { 558 vcc5v0_typec_en: vcc5v0_typec_en { 559 rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 560 }; 561 }; 562 563 usb2 { 564 vcc5v0_host_en: vcc5v0-host-en { 565 rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; 566 }; 567 }; 568}; 569 570&pwm0 { 571 status = "okay"; 572}; 573 574&pwm2 { 575 status = "okay"; 576}; 577 578&saradc { 579 vref-supply = <&vcca1v8_s3>; 580 status = "okay"; 581}; 582 583&sdmmc { 584 bus-width = <4>; 585 cap-mmc-highspeed; 586 cap-sd-highspeed; 587 cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; 588 disable-wp; 589 max-frequency = <150000000>; 590 pinctrl-names = "default"; 591 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; 592 status = "okay"; 593}; 594 595&sdhci { 596 bus-width = <8>; 597 mmc-hs400-1_8v; 598 mmc-hs400-enhanced-strobe; 599 non-removable; 600 status = "okay"; 601}; 602 603&tcphy0 { 604 status = "okay"; 605}; 606 607&tcphy1 { 608 status = "okay"; 609}; 610 611&tsadc { 612 /* tshut mode 0:CRU 1:GPIO */ 613 rockchip,hw-tshut-mode = <1>; 614 /* tshut polarity 0:LOW 1:HIGH */ 615 rockchip,hw-tshut-polarity = <1>; 616 status = "okay"; 617}; 618 619&u2phy0 { 620 status = "okay"; 621 622 u2phy0_otg: otg-port { 623 status = "okay"; 624 }; 625 626 u2phy0_host: host-port { 627 phy-supply = <&vcc5v0_host>; 628 status = "okay"; 629 }; 630}; 631 632&u2phy1 { 633 status = "okay"; 634 635 u2phy1_otg: otg-port { 636 status = "okay"; 637 }; 638 639 u2phy1_host: host-port { 640 phy-supply = <&vcc5v0_host>; 641 status = "okay"; 642 }; 643}; 644 645&uart0 { 646 pinctrl-names = "default"; 647 pinctrl-0 = <&uart0_xfer &uart0_cts>; 648 status = "okay"; 649}; 650 651&uart2 { 652 status = "okay"; 653}; 654 655&usb_host0_ehci { 656 status = "okay"; 657}; 658 659&usb_host0_ohci { 660 status = "okay"; 661}; 662 663&usb_host1_ehci { 664 status = "okay"; 665}; 666 667&usb_host1_ohci { 668 status = "okay"; 669}; 670 671&usbdrd3_0 { 672 status = "okay"; 673}; 674 675&usbdrd_dwc3_0 { 676 status = "okay"; 677 dr_mode = "otg"; 678}; 679 680&usbdrd3_1 { 681 status = "okay"; 682}; 683 684&usbdrd_dwc3_1 { 685 status = "okay"; 686 dr_mode = "host"; 687}; 688 689&vopb { 690 status = "okay"; 691}; 692 693&vopb_mmu { 694 status = "okay"; 695}; 696 697&vopl { 698 status = "okay"; 699}; 700 701&vopl_mmu { 702 status = "okay"; 703}; 704