1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2018 Collabora Ltd. 4 * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd. 5 * Copyright (c) 2018 Linaro Ltd. 6 */ 7 8#include "rk3399.dtsi" 9#include "rk3399-opp.dtsi" 10 11/ { 12 vcc1v8_s0: vcc1v8-s0 { 13 compatible = "regulator-fixed"; 14 regulator-name = "vcc1v8_s0"; 15 regulator-min-microvolt = <1800000>; 16 regulator-max-microvolt = <1800000>; 17 regulator-always-on; 18 }; 19 20 vcc_sys: vcc-sys { 21 compatible = "regulator-fixed"; 22 regulator-name = "vcc_sys"; 23 regulator-min-microvolt = <5000000>; 24 regulator-max-microvolt = <5000000>; 25 regulator-always-on; 26 }; 27 28 vcc3v3_sys: vcc3v3-sys { 29 compatible = "regulator-fixed"; 30 regulator-name = "vcc3v3_sys"; 31 regulator-min-microvolt = <3300000>; 32 regulator-max-microvolt = <3300000>; 33 regulator-always-on; 34 vin-supply = <&vcc_sys>; 35 }; 36 37 vcc3v3_pcie: vcc3v3-pcie-regulator { 38 compatible = "regulator-fixed"; 39 enable-active-high; 40 pinctrl-names = "default"; 41 pinctrl-0 = <&pcie_drv>; 42 regulator-boot-on; 43 regulator-name = "vcc3v3_pcie"; 44 regulator-min-microvolt = <3300000>; 45 regulator-max-microvolt = <3300000>; 46 vin-supply = <&vcc3v3_sys>; 47 }; 48 49 vcc5v0_host: vcc5v0-host-regulator { 50 compatible = "regulator-fixed"; 51 enable-active-high; 52 pinctrl-names = "default"; 53 pinctrl-0 = <&host_vbus_drv>; 54 regulator-name = "vcc5v0_host"; 55 regulator-min-microvolt = <5000000>; 56 regulator-max-microvolt = <5000000>; 57 regulator-always-on; 58 vin-supply = <&vcc_sys>; 59 }; 60}; 61 62&cpu_l0 { 63 cpu-supply = <&vdd_cpu_l>; 64}; 65 66&cpu_l1 { 67 cpu-supply = <&vdd_cpu_l>; 68}; 69 70&cpu_l2 { 71 cpu-supply = <&vdd_cpu_l>; 72}; 73 74&cpu_l3 { 75 cpu-supply = <&vdd_cpu_l>; 76}; 77 78&cpu_b0 { 79 cpu-supply = <&vdd_cpu_b>; 80}; 81 82&cpu_b1 { 83 cpu-supply = <&vdd_cpu_b>; 84}; 85 86&emmc_phy { 87 status = "okay"; 88}; 89 90&hdmi { 91 ddc-i2c-bus = <&i2c3>; 92 pinctrl-names = "default"; 93 pinctrl-0 = <&hdmi_cec>; 94 status = "okay"; 95}; 96 97&i2c0 { 98 clock-frequency = <400000>; 99 i2c-scl-rising-time-ns = <168>; 100 i2c-scl-falling-time-ns = <4>; 101 status = "okay"; 102 103 vdd_cpu_b: regulator@40 { 104 compatible = "silergy,syr827"; 105 reg = <0x40>; 106 fcs,suspend-voltage-selector = <1>; 107 regulator-name = "vdd_cpu_b"; 108 regulator-min-microvolt = <712500>; 109 regulator-max-microvolt = <1500000>; 110 regulator-ramp-delay = <1000>; 111 regulator-always-on; 112 regulator-boot-on; 113 vin-supply = <&vcc_sys>; 114 status = "okay"; 115 116 regulator-state-mem { 117 regulator-off-in-suspend; 118 }; 119 }; 120 121 vdd_gpu: regulator@41 { 122 compatible = "silergy,syr828"; 123 reg = <0x41>; 124 fcs,suspend-voltage-selector = <1>; 125 regulator-name = "vdd_gpu"; 126 regulator-min-microvolt = <712500>; 127 regulator-max-microvolt = <1500000>; 128 regulator-ramp-delay = <1000>; 129 regulator-always-on; 130 regulator-boot-on; 131 vin-supply = <&vcc_sys>; 132 regulator-state-mem { 133 regulator-off-in-suspend; 134 }; 135 }; 136 137 rk808: pmic@1b { 138 compatible = "rockchip,rk808"; 139 reg = <0x1b>; 140 interrupt-parent = <&gpio1>; 141 interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 142 pinctrl-names = "default"; 143 pinctrl-0 = <&pmic_int_l>; 144 rockchip,system-power-controller; 145 wakeup-source; 146 #clock-cells = <1>; 147 clock-output-names = "xin32k", "rk808-clkout2"; 148 149 vcc1-supply = <&vcc_sys>; 150 vcc2-supply = <&vcc_sys>; 151 vcc3-supply = <&vcc_sys>; 152 vcc4-supply = <&vcc_sys>; 153 vcc6-supply = <&vcc_sys>; 154 vcc7-supply = <&vcc_sys>; 155 vcc8-supply = <&vcc3v3_sys>; 156 vcc9-supply = <&vcc_sys>; 157 vcc10-supply = <&vcc_sys>; 158 vcc11-supply = <&vcc_sys>; 159 vcc12-supply = <&vcc3v3_sys>; 160 vddio-supply = <&vcc_1v8>; 161 162 regulators { 163 vdd_center: DCDC_REG1 { 164 regulator-name = "vdd_center"; 165 regulator-min-microvolt = <750000>; 166 regulator-max-microvolt = <1350000>; 167 regulator-always-on; 168 regulator-boot-on; 169 regulator-state-mem { 170 regulator-off-in-suspend; 171 }; 172 }; 173 174 vdd_cpu_l: DCDC_REG2 { 175 regulator-name = "vdd_cpu_l"; 176 regulator-min-microvolt = <750000>; 177 regulator-max-microvolt = <1350000>; 178 regulator-always-on; 179 regulator-boot-on; 180 regulator-state-mem { 181 regulator-off-in-suspend; 182 }; 183 }; 184 185 vcc_ddr: DCDC_REG3 { 186 regulator-name = "vcc_ddr"; 187 regulator-always-on; 188 regulator-boot-on; 189 regulator-state-mem { 190 regulator-on-in-suspend; 191 }; 192 }; 193 194 vcc_1v8: DCDC_REG4 { 195 regulator-name = "vcc_1v8"; 196 regulator-min-microvolt = <1800000>; 197 regulator-max-microvolt = <1800000>; 198 regulator-always-on; 199 regulator-boot-on; 200 regulator-state-mem { 201 regulator-on-in-suspend; 202 regulator-suspend-microvolt = <1800000>; 203 }; 204 }; 205 206 vcc1v8_dvp: LDO_REG1 { 207 regulator-name = "vcc1v8_dvp"; 208 regulator-min-microvolt = <1800000>; 209 regulator-max-microvolt = <1800000>; 210 regulator-always-on; 211 regulator-boot-on; 212 regulator-state-mem { 213 regulator-on-in-suspend; 214 regulator-suspend-microvolt = <1800000>; 215 }; 216 }; 217 218 vcca1v8_hdmi: LDO_REG2 { 219 regulator-name = "vcca1v8_hdmi"; 220 regulator-min-microvolt = <1800000>; 221 regulator-max-microvolt = <1800000>; 222 regulator-always-on; 223 regulator-boot-on; 224 regulator-state-mem { 225 regulator-on-in-suspend; 226 regulator-suspend-microvolt = <1800000>; 227 }; 228 }; 229 230 vcca_1v8: LDO_REG3 { 231 regulator-name = "vcca_1v8"; 232 regulator-min-microvolt = <1800000>; 233 regulator-max-microvolt = <1800000>; 234 regulator-always-on; 235 regulator-boot-on; 236 regulator-state-mem { 237 regulator-on-in-suspend; 238 regulator-suspend-microvolt = <1800000>; 239 }; 240 }; 241 242 vcc_sd: LDO_REG4 { 243 regulator-name = "vcc_sd"; 244 regulator-min-microvolt = <1800000>; 245 regulator-max-microvolt = <3300000>; 246 regulator-always-on; 247 regulator-boot-on; 248 regulator-state-mem { 249 regulator-on-in-suspend; 250 regulator-suspend-microvolt = <3300000>; 251 }; 252 }; 253 254 vcc3v0_sd: LDO_REG5 { 255 regulator-name = "vcc3v0_sd"; 256 regulator-min-microvolt = <3000000>; 257 regulator-max-microvolt = <3000000>; 258 regulator-always-on; 259 regulator-boot-on; 260 regulator-state-mem { 261 regulator-on-in-suspend; 262 regulator-suspend-microvolt = <3000000>; 263 }; 264 }; 265 266 vcc_1v5: LDO_REG6 { 267 regulator-name = "vcc_1v5"; 268 regulator-min-microvolt = <1500000>; 269 regulator-max-microvolt = <1500000>; 270 regulator-always-on; 271 regulator-boot-on; 272 regulator-state-mem { 273 regulator-on-in-suspend; 274 regulator-suspend-microvolt = <1500000>; 275 }; 276 }; 277 278 vcca0v9_hdmi: LDO_REG7 { 279 regulator-name = "vcca0v9_hdmi"; 280 regulator-min-microvolt = <900000>; 281 regulator-max-microvolt = <900000>; 282 regulator-always-on; 283 regulator-boot-on; 284 regulator-state-mem { 285 regulator-on-in-suspend; 286 regulator-suspend-microvolt = <900000>; 287 }; 288 }; 289 290 vcc_3v0: LDO_REG8 { 291 regulator-name = "vcc_3v0"; 292 regulator-min-microvolt = <3000000>; 293 regulator-max-microvolt = <3000000>; 294 regulator-always-on; 295 regulator-boot-on; 296 regulator-state-mem { 297 regulator-on-in-suspend; 298 regulator-suspend-microvolt = <3000000>; 299 }; 300 }; 301 302 vcc3v3_s3: SWITCH_REG1 { 303 regulator-name = "vcc3v3_s3"; 304 regulator-always-on; 305 regulator-boot-on; 306 regulator-state-mem { 307 regulator-on-in-suspend; 308 }; 309 }; 310 311 vcc3v3_s0: SWITCH_REG2 { 312 regulator-name = "vcc3v3_s0"; 313 regulator-always-on; 314 regulator-boot-on; 315 regulator-state-mem { 316 regulator-on-in-suspend; 317 }; 318 }; 319 }; 320 }; 321}; 322 323&i2c1 { 324 status = "okay"; 325}; 326 327&i2c2 { 328 status = "okay"; 329}; 330 331&i2c3 { 332 status = "okay"; 333}; 334 335&i2c4 { 336 status = "okay"; 337}; 338 339&io_domains { 340 bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */ 341 audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */ 342 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */ 343 gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */ 344 status = "okay"; 345}; 346 347&pcie_phy { 348 status = "okay"; 349}; 350 351&pcie0 { 352 num-lanes = <4>; 353 pinctrl-names = "default"; 354 pinctrl-0 = <&pcie_clkreqn_cpm>; 355 vpcie3v3-supply = <&vcc3v3_pcie>; 356 status = "okay"; 357}; 358 359&pmu_io_domains { 360 pmu1830-supply = <&vcc_1v8>; 361 status = "okay"; 362}; 363 364&pinctrl { 365 sdmmc { 366 sdmmc_bus1: sdmmc-bus1 { 367 rockchip,pins = 368 <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>; 369 }; 370 371 sdmmc_bus4: sdmmc-bus4 { 372 rockchip,pins = 373 <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>, 374 <4 9 RK_FUNC_1 &pcfg_pull_up_8ma>, 375 <4 10 RK_FUNC_1 &pcfg_pull_up_8ma>, 376 <4 11 RK_FUNC_1 &pcfg_pull_up_8ma>; 377 }; 378 379 sdmmc_clk: sdmmc-clk { 380 rockchip,pins = 381 <4 12 RK_FUNC_1 &pcfg_pull_none_18ma>; 382 }; 383 384 sdmmc_cmd: sdmmc-cmd { 385 rockchip,pins = 386 <4 13 RK_FUNC_1 &pcfg_pull_up_8ma>; 387 }; 388 }; 389 390 pmic { 391 pmic_int_l: pmic-int-l { 392 rockchip,pins = 393 <1 21 RK_FUNC_GPIO &pcfg_pull_up>; 394 }; 395 396 vsel1_gpio: vsel1-gpio { 397 rockchip,pins = 398 <1 17 RK_FUNC_GPIO &pcfg_pull_down>; 399 }; 400 401 vsel2_gpio: vsel2-gpio { 402 rockchip,pins = 403 <1 14 RK_FUNC_GPIO &pcfg_pull_down>; 404 }; 405 }; 406}; 407 408&pwm2 { 409 status = "okay"; 410}; 411 412&pwm3 { 413 status = "okay"; 414}; 415 416&sdhci { 417 bus-width = <8>; 418 mmc-hs400-1_8v; 419 mmc-hs400-enhanced-strobe; 420 non-removable; 421 status = "okay"; 422}; 423 424&sdmmc { 425 bus-width = <4>; 426 cap-mmc-highspeed; 427 cap-sd-highspeed; 428 clock-frequency = <100000000>; 429 clock-freq-min-max = <100000 100000000>; 430 cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; 431 disable-wp; 432 sd-uhs-sdr104; 433 vqmmc-supply = <&vcc_sd>; 434 card-detect-delay = <800>; 435 pinctrl-names = "default"; 436 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; 437 status = "okay"; 438}; 439 440&uart0 { 441 pinctrl-names = "default"; 442 pinctrl-0 = <&uart0_xfer &uart0_cts>; 443 status = "okay"; 444}; 445 446&uart2 { 447 status = "okay"; 448}; 449 450&tcphy0 { 451 status = "okay"; 452}; 453 454&tcphy1 { 455 status = "okay"; 456}; 457 458&u2phy0 { 459 status = "okay"; 460}; 461 462&u2phy1 { 463 status = "okay"; 464}; 465 466&u2phy0_host { 467 phy-supply = <&vcc5v0_host>; 468 status = "okay"; 469}; 470 471&u2phy1_host { 472 phy-supply = <&vcc5v0_host>; 473 status = "okay"; 474}; 475 476&u2phy0_otg { 477 status = "okay"; 478}; 479 480&u2phy1_otg { 481 status = "okay"; 482}; 483 484&usb_host0_ehci { 485 status = "okay"; 486}; 487 488&usb_host0_ohci { 489 status = "okay"; 490}; 491 492&usb_host1_ehci { 493 status = "okay"; 494}; 495 496&usb_host1_ohci { 497 status = "okay"; 498}; 499 500&usbdrd3_0 { 501 status = "okay"; 502}; 503 504&usbdrd_dwc3_0 { 505 status = "okay"; 506}; 507 508&usbdrd3_1 { 509 status = "okay"; 510}; 511 512&usbdrd_dwc3_1 { 513 status = "okay"; 514}; 515 516&vopb { 517 status = "okay"; 518}; 519 520&vopb_mmu { 521 status = "okay"; 522}; 523 524&vopl { 525 status = "okay"; 526}; 527 528&vopl_mmu { 529 status = "okay"; 530}; 531