1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2018 Collabora Ltd.
4 * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd.
5 * Copyright (c) 2018 Linaro Ltd.
6 */
7
8#include "rk3399.dtsi"
9#include "rk3399-opp.dtsi"
10
11/ {
12	sdio_pwrseq: sdio-pwrseq {
13		compatible = "mmc-pwrseq-simple";
14		clocks = <&rk808 1>;
15		clock-names = "ext_clock";
16		pinctrl-names = "default";
17		pinctrl-0 = <&wifi_enable_h>;
18		reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
19	};
20
21	vcc1v8_s0: vcc1v8-s0 {
22		compatible = "regulator-fixed";
23		regulator-name = "vcc1v8_s0";
24		regulator-min-microvolt = <1800000>;
25		regulator-max-microvolt = <1800000>;
26		regulator-always-on;
27	};
28
29	vcc_sys: vcc-sys {
30		compatible = "regulator-fixed";
31		regulator-name = "vcc_sys";
32		regulator-min-microvolt = <5000000>;
33		regulator-max-microvolt = <5000000>;
34		regulator-always-on;
35	};
36
37	vcc3v3_sys: vcc3v3-sys {
38		compatible = "regulator-fixed";
39		regulator-name = "vcc3v3_sys";
40		regulator-min-microvolt = <3300000>;
41		regulator-max-microvolt = <3300000>;
42		regulator-always-on;
43		vin-supply = <&vcc_sys>;
44	};
45
46	vcc3v3_pcie: vcc3v3-pcie-regulator {
47		compatible = "regulator-fixed";
48		enable-active-high;
49		pinctrl-names = "default";
50		pinctrl-0 = <&pcie_drv>;
51		regulator-boot-on;
52		regulator-name = "vcc3v3_pcie";
53		regulator-min-microvolt = <3300000>;
54		regulator-max-microvolt = <3300000>;
55		vin-supply = <&vcc3v3_sys>;
56	};
57
58	vcc5v0_host: vcc5v0-host-regulator {
59		compatible = "regulator-fixed";
60		enable-active-high;
61		pinctrl-names = "default";
62		pinctrl-0 = <&host_vbus_drv>;
63		regulator-name = "vcc5v0_host";
64		regulator-min-microvolt = <5000000>;
65		regulator-max-microvolt = <5000000>;
66		regulator-always-on;
67		vin-supply = <&vcc_sys>;
68	};
69};
70
71&cpu_l0 {
72	cpu-supply = <&vdd_cpu_l>;
73};
74
75&cpu_l1 {
76	cpu-supply = <&vdd_cpu_l>;
77};
78
79&cpu_l2 {
80	cpu-supply = <&vdd_cpu_l>;
81};
82
83&cpu_l3 {
84	cpu-supply = <&vdd_cpu_l>;
85};
86
87&cpu_b0 {
88	cpu-supply = <&vdd_cpu_b>;
89};
90
91&cpu_b1 {
92	cpu-supply = <&vdd_cpu_b>;
93};
94
95&emmc_phy {
96	status = "okay";
97};
98
99&hdmi {
100	ddc-i2c-bus = <&i2c3>;
101	pinctrl-names = "default";
102	pinctrl-0 = <&hdmi_cec>;
103	status = "okay";
104};
105
106&hdmi_sound {
107	status = "okay";
108};
109
110&i2c0 {
111	clock-frequency = <400000>;
112	i2c-scl-rising-time-ns = <168>;
113	i2c-scl-falling-time-ns = <4>;
114	status = "okay";
115
116	vdd_cpu_b: regulator@40 {
117		compatible = "silergy,syr827";
118		reg = <0x40>;
119		fcs,suspend-voltage-selector = <1>;
120		regulator-name = "vdd_cpu_b";
121		regulator-min-microvolt = <712500>;
122		regulator-max-microvolt = <1500000>;
123		regulator-ramp-delay = <1000>;
124		regulator-always-on;
125		regulator-boot-on;
126		vin-supply = <&vcc_sys>;
127		status = "okay";
128
129		regulator-state-mem {
130			regulator-off-in-suspend;
131		};
132	};
133
134	vdd_gpu: regulator@41 {
135		compatible = "silergy,syr828";
136		reg = <0x41>;
137		fcs,suspend-voltage-selector = <1>;
138		regulator-name = "vdd_gpu";
139		regulator-min-microvolt = <712500>;
140		regulator-max-microvolt = <1500000>;
141		regulator-ramp-delay = <1000>;
142		regulator-always-on;
143		regulator-boot-on;
144		vin-supply = <&vcc_sys>;
145		regulator-state-mem {
146			regulator-off-in-suspend;
147		};
148	};
149
150	rk808: pmic@1b {
151		compatible = "rockchip,rk808";
152		reg = <0x1b>;
153		interrupt-parent = <&gpio1>;
154		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
155		pinctrl-names = "default";
156		pinctrl-0 = <&pmic_int_l>;
157		rockchip,system-power-controller;
158		wakeup-source;
159		#clock-cells = <1>;
160		clock-output-names = "xin32k", "rk808-clkout2";
161
162		vcc1-supply = <&vcc_sys>;
163		vcc2-supply = <&vcc_sys>;
164		vcc3-supply = <&vcc_sys>;
165		vcc4-supply = <&vcc_sys>;
166		vcc6-supply = <&vcc_sys>;
167		vcc7-supply = <&vcc_sys>;
168		vcc8-supply = <&vcc3v3_sys>;
169		vcc9-supply = <&vcc_sys>;
170		vcc10-supply = <&vcc_sys>;
171		vcc11-supply = <&vcc_sys>;
172		vcc12-supply = <&vcc3v3_sys>;
173		vddio-supply = <&vcc_1v8>;
174
175		regulators {
176			vdd_center: DCDC_REG1 {
177				regulator-name = "vdd_center";
178				regulator-min-microvolt = <750000>;
179				regulator-max-microvolt = <1350000>;
180				regulator-always-on;
181				regulator-boot-on;
182				regulator-state-mem {
183					regulator-off-in-suspend;
184				};
185			};
186
187			vdd_cpu_l: DCDC_REG2 {
188				regulator-name = "vdd_cpu_l";
189				regulator-min-microvolt = <750000>;
190				regulator-max-microvolt = <1350000>;
191				regulator-always-on;
192				regulator-boot-on;
193				regulator-state-mem {
194					regulator-off-in-suspend;
195				};
196			};
197
198			vcc_ddr: DCDC_REG3 {
199				regulator-name = "vcc_ddr";
200				regulator-always-on;
201				regulator-boot-on;
202				regulator-state-mem {
203					regulator-on-in-suspend;
204				};
205			};
206
207			vcc_1v8: DCDC_REG4 {
208				regulator-name = "vcc_1v8";
209				regulator-min-microvolt = <1800000>;
210				regulator-max-microvolt = <1800000>;
211				regulator-always-on;
212				regulator-boot-on;
213				regulator-state-mem {
214					regulator-on-in-suspend;
215					regulator-suspend-microvolt = <1800000>;
216				};
217			};
218
219			vcc1v8_dvp: LDO_REG1 {
220				regulator-name = "vcc1v8_dvp";
221				regulator-min-microvolt = <1800000>;
222				regulator-max-microvolt = <1800000>;
223				regulator-always-on;
224				regulator-boot-on;
225				regulator-state-mem {
226					regulator-on-in-suspend;
227					regulator-suspend-microvolt = <1800000>;
228				};
229			};
230
231			vcca1v8_hdmi: LDO_REG2 {
232				regulator-name = "vcca1v8_hdmi";
233				regulator-min-microvolt = <1800000>;
234				regulator-max-microvolt = <1800000>;
235				regulator-always-on;
236				regulator-boot-on;
237				regulator-state-mem {
238					regulator-on-in-suspend;
239					regulator-suspend-microvolt = <1800000>;
240				};
241			};
242
243			vcca_1v8: LDO_REG3 {
244				regulator-name = "vcca_1v8";
245				regulator-min-microvolt = <1800000>;
246				regulator-max-microvolt = <1800000>;
247				regulator-always-on;
248				regulator-boot-on;
249				regulator-state-mem {
250					regulator-on-in-suspend;
251					regulator-suspend-microvolt = <1800000>;
252				};
253			};
254
255			vcc_sd: LDO_REG4 {
256				regulator-name = "vcc_sd";
257				regulator-min-microvolt = <1800000>;
258				regulator-max-microvolt = <3300000>;
259				regulator-always-on;
260				regulator-boot-on;
261				regulator-state-mem {
262					regulator-on-in-suspend;
263					regulator-suspend-microvolt = <3300000>;
264				};
265			};
266
267			vcc3v0_sd: LDO_REG5 {
268				regulator-name = "vcc3v0_sd";
269				regulator-min-microvolt = <3000000>;
270				regulator-max-microvolt = <3000000>;
271				regulator-always-on;
272				regulator-boot-on;
273				regulator-state-mem {
274					regulator-on-in-suspend;
275					regulator-suspend-microvolt = <3000000>;
276				};
277			};
278
279			vcc_1v5: LDO_REG6 {
280				regulator-name = "vcc_1v5";
281				regulator-min-microvolt = <1500000>;
282				regulator-max-microvolt = <1500000>;
283				regulator-always-on;
284				regulator-boot-on;
285				regulator-state-mem {
286					regulator-on-in-suspend;
287					regulator-suspend-microvolt = <1500000>;
288				};
289			};
290
291			vcca0v9_hdmi: LDO_REG7 {
292				regulator-name = "vcca0v9_hdmi";
293				regulator-min-microvolt = <900000>;
294				regulator-max-microvolt = <900000>;
295				regulator-always-on;
296				regulator-boot-on;
297				regulator-state-mem {
298					regulator-on-in-suspend;
299					regulator-suspend-microvolt = <900000>;
300				};
301			};
302
303			vcc_3v0: LDO_REG8 {
304				regulator-name = "vcc_3v0";
305				regulator-min-microvolt = <3000000>;
306				regulator-max-microvolt = <3000000>;
307				regulator-always-on;
308				regulator-boot-on;
309				regulator-state-mem {
310					regulator-on-in-suspend;
311					regulator-suspend-microvolt = <3000000>;
312				};
313			};
314
315			vcc3v3_s3: SWITCH_REG1 {
316				regulator-name = "vcc3v3_s3";
317				regulator-always-on;
318				regulator-boot-on;
319				regulator-state-mem {
320					regulator-on-in-suspend;
321				};
322			};
323
324			vcc3v3_s0: SWITCH_REG2 {
325				regulator-name = "vcc3v3_s0";
326				regulator-always-on;
327				regulator-boot-on;
328				regulator-state-mem {
329					regulator-on-in-suspend;
330				};
331			};
332		};
333	};
334};
335
336&i2c1 {
337	status = "okay";
338};
339
340&i2c2 {
341	status = "okay";
342};
343
344&i2c3 {
345	status = "okay";
346};
347
348&i2c4 {
349	status = "okay";
350};
351
352&i2s2 {
353        status = "okay";
354};
355
356&io_domains {
357	bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */
358	audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */
359	sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
360	gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
361	status = "okay";
362};
363
364&pcie_phy {
365	status = "okay";
366};
367
368&pcie0 {
369	num-lanes = <4>;
370	pinctrl-names = "default";
371	pinctrl-0 = <&pcie_clkreqn_cpm>;
372	vpcie3v3-supply = <&vcc3v3_pcie>;
373	status = "okay";
374};
375
376&pmu_io_domains {
377	pmu1830-supply = <&vcc_1v8>;
378	status = "okay";
379};
380
381&pinctrl {
382	bt {
383		bt_enable_h: bt-enable-h {
384			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
385		};
386
387		bt_host_wake_l: bt-host-wake-l {
388			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
389		};
390
391		bt_wake_l: bt-wake-l {
392			rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
393		};
394	};
395
396	sdmmc {
397		sdmmc_bus1: sdmmc-bus1 {
398			rockchip,pins =
399				<4 8 RK_FUNC_1 &pcfg_pull_up_8ma>;
400		};
401
402		sdmmc_bus4: sdmmc-bus4 {
403			rockchip,pins =
404				<4 8 RK_FUNC_1 &pcfg_pull_up_8ma>,
405				<4 9 RK_FUNC_1 &pcfg_pull_up_8ma>,
406				<4 10 RK_FUNC_1 &pcfg_pull_up_8ma>,
407				<4 11 RK_FUNC_1 &pcfg_pull_up_8ma>;
408		};
409
410		sdmmc_clk: sdmmc-clk {
411			rockchip,pins =
412				<4 12 RK_FUNC_1 &pcfg_pull_none_18ma>;
413		};
414
415		sdmmc_cmd: sdmmc-cmd {
416			rockchip,pins =
417				<4 13 RK_FUNC_1 &pcfg_pull_up_8ma>;
418		};
419	};
420
421	sdio0 {
422		sdio0_bus4: sdio0-bus4 {
423			rockchip,pins =
424				<2 20 RK_FUNC_1 &pcfg_pull_up_20ma>,
425				<2 21 RK_FUNC_1 &pcfg_pull_up_20ma>,
426				<2 22 RK_FUNC_1 &pcfg_pull_up_20ma>,
427				<2 23 RK_FUNC_1 &pcfg_pull_up_20ma>;
428		};
429
430		sdio0_cmd: sdio0-cmd {
431			rockchip,pins =
432				<2 24 RK_FUNC_1 &pcfg_pull_up_20ma>;
433		};
434
435		sdio0_clk: sdio0-clk {
436			rockchip,pins =
437				<2 25 RK_FUNC_1 &pcfg_pull_none_20ma>;
438		};
439	};
440
441	pmic {
442		pmic_int_l: pmic-int-l {
443			rockchip,pins =
444				<1 21 RK_FUNC_GPIO &pcfg_pull_up>;
445		};
446
447		vsel1_gpio: vsel1-gpio {
448			rockchip,pins =
449				<1 17 RK_FUNC_GPIO &pcfg_pull_down>;
450		};
451
452		vsel2_gpio: vsel2-gpio {
453			rockchip,pins =
454				<1 14 RK_FUNC_GPIO &pcfg_pull_down>;
455		};
456	};
457
458	sdio-pwrseq {
459		wifi_enable_h: wifi-enable-h {
460			rockchip,pins =
461				<0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
462		};
463	};
464
465	wifi {
466		wifi_host_wake_l: wifi-host-wake-l {
467			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
468		};
469	};
470};
471
472&pwm2 {
473	status = "okay";
474};
475
476&pwm3 {
477	status = "okay";
478};
479
480&sdio0 {
481	bus-width = <4>;
482	clock-frequency = <50000000>;
483	cap-sdio-irq;
484	cap-sd-highspeed;
485	keep-power-in-suspend;
486	mmc-pwrseq = <&sdio_pwrseq>;
487	non-removable;
488	pinctrl-names = "default";
489	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
490	sd-uhs-sdr104;
491	#address-cells = <1>;
492	#size-cells = <0>;
493	status = "okay";
494
495	brcmf: wifi@1 {
496		compatible = "brcm,bcm4329-fmac";
497		reg = <1>;
498		interrupt-parent = <&gpio0>;
499		interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
500		interrupt-names = "host-wake";
501		pinctrl-names = "default";
502		pinctrl-0 = <&wifi_host_wake_l>;
503	};
504};
505
506&sdhci {
507	bus-width = <8>;
508	mmc-hs400-1_8v;
509	mmc-hs400-enhanced-strobe;
510	non-removable;
511	status = "okay";
512};
513
514&sdmmc {
515	bus-width = <4>;
516	cap-mmc-highspeed;
517	cap-sd-highspeed;
518	clock-frequency = <100000000>;
519	clock-freq-min-max = <100000 100000000>;
520	cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
521	disable-wp;
522	sd-uhs-sdr104;
523	vqmmc-supply = <&vcc_sd>;
524	card-detect-delay = <800>;
525	pinctrl-names = "default";
526	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
527	status = "okay";
528};
529
530&tsadc {
531	rockchip,hw-tshut-mode = <1>;
532	rockchip,hw-tshut-polarity = <1>;
533	rockchip,hw-tshut-temp = <110000>;
534	status = "okay";
535};
536
537&uart0 {
538	pinctrl-names = "default";
539	pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
540	status = "okay";
541
542	bluetooth {
543		compatible = "brcm,bcm43438-bt";
544		clocks = <&rk808 1>;
545		clock-names = "ext_clock";
546		device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
547		host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
548		shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
549		pinctrl-names = "default";
550		pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
551	};
552};
553
554&uart2 {
555	status = "okay";
556};
557
558&tcphy0 {
559	status = "okay";
560};
561
562&tcphy1 {
563	status = "okay";
564};
565
566&u2phy0 {
567	status = "okay";
568};
569
570&u2phy1 {
571	status = "okay";
572};
573
574&u2phy0_host {
575	phy-supply = <&vcc5v0_host>;
576	status = "okay";
577};
578
579&u2phy1_host {
580	phy-supply = <&vcc5v0_host>;
581	status = "okay";
582};
583
584&u2phy0_otg {
585	status = "okay";
586};
587
588&u2phy1_otg {
589	status = "okay";
590};
591
592&usb_host0_ehci {
593	status = "okay";
594};
595
596&usb_host0_ohci {
597	status = "okay";
598};
599
600&usb_host1_ehci {
601	status = "okay";
602};
603
604&usb_host1_ohci {
605	status = "okay";
606};
607
608&usbdrd3_0 {
609	status = "okay";
610};
611
612&usbdrd_dwc3_0 {
613	status = "okay";
614};
615
616&usbdrd3_1 {
617	status = "okay";
618};
619
620&usbdrd_dwc3_1 {
621	status = "okay";
622};
623
624&vopb {
625	status = "okay";
626};
627
628&vopb_mmu {
629	status = "okay";
630};
631
632&vopl {
633	status = "okay";
634};
635
636&vopl_mmu {
637	status = "okay";
638};
639