1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2018 Collabora Ltd. 4 * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd. 5 * Copyright (c) 2018 Linaro Ltd. 6 */ 7 8#include "rk3399.dtsi" 9#include "rk3399-opp.dtsi" 10 11/ { 12 vcc1v8_s0: vcc1v8-s0 { 13 compatible = "regulator-fixed"; 14 regulator-name = "vcc1v8_s0"; 15 regulator-min-microvolt = <1800000>; 16 regulator-max-microvolt = <1800000>; 17 regulator-always-on; 18 }; 19 20 vcc_sys: vcc-sys { 21 compatible = "regulator-fixed"; 22 regulator-name = "vcc_sys"; 23 regulator-min-microvolt = <5000000>; 24 regulator-max-microvolt = <5000000>; 25 regulator-always-on; 26 }; 27 28 vcc3v3_sys: vcc3v3-sys { 29 compatible = "regulator-fixed"; 30 regulator-name = "vcc3v3_sys"; 31 regulator-min-microvolt = <3300000>; 32 regulator-max-microvolt = <3300000>; 33 regulator-always-on; 34 vin-supply = <&vcc_sys>; 35 }; 36 37 vcc3v3_pcie: vcc3v3-pcie-regulator { 38 compatible = "regulator-fixed"; 39 enable-active-high; 40 pinctrl-names = "default"; 41 pinctrl-0 = <&pcie_drv>; 42 regulator-boot-on; 43 regulator-name = "vcc3v3_pcie"; 44 regulator-min-microvolt = <3300000>; 45 regulator-max-microvolt = <3300000>; 46 vin-supply = <&vcc3v3_sys>; 47 }; 48 49 vcc5v0_host: vcc5v0-host-regulator { 50 compatible = "regulator-fixed"; 51 enable-active-high; 52 pinctrl-names = "default"; 53 pinctrl-0 = <&host_vbus_drv>; 54 regulator-name = "vcc5v0_host"; 55 regulator-min-microvolt = <5000000>; 56 regulator-max-microvolt = <5000000>; 57 regulator-always-on; 58 vin-supply = <&vcc_sys>; 59 }; 60 61 vdd_log: vdd-log { 62 compatible = "pwm-regulator"; 63 pwms = <&pwm2 0 25000 0>; 64 regulator-name = "vdd_log"; 65 regulator-min-microvolt = <800000>; 66 regulator-max-microvolt = <1400000>; 67 regulator-always-on; 68 regulator-boot-on; 69 vin-supply = <&vcc_sys>; 70 }; 71 72}; 73 74&cpu_l0 { 75 cpu-supply = <&vdd_cpu_l>; 76}; 77 78&cpu_l1 { 79 cpu-supply = <&vdd_cpu_l>; 80}; 81 82&cpu_l2 { 83 cpu-supply = <&vdd_cpu_l>; 84}; 85 86&cpu_l3 { 87 cpu-supply = <&vdd_cpu_l>; 88}; 89 90&cpu_b0 { 91 cpu-supply = <&vdd_cpu_b>; 92}; 93 94&cpu_b1 { 95 cpu-supply = <&vdd_cpu_b>; 96}; 97 98&emmc_phy { 99 status = "okay"; 100}; 101 102&hdmi { 103 ddc-i2c-bus = <&i2c3>; 104 pinctrl-names = "default"; 105 pinctrl-0 = <&hdmi_cec>; 106 status = "okay"; 107}; 108 109&i2c0 { 110 clock-frequency = <400000>; 111 i2c-scl-rising-time-ns = <168>; 112 i2c-scl-falling-time-ns = <4>; 113 status = "okay"; 114 115 vdd_cpu_b: regulator@40 { 116 compatible = "silergy,syr827"; 117 reg = <0x40>; 118 fcs,suspend-voltage-selector = <1>; 119 regulator-name = "vdd_cpu_b"; 120 regulator-min-microvolt = <712500>; 121 regulator-max-microvolt = <1500000>; 122 regulator-ramp-delay = <1000>; 123 regulator-always-on; 124 regulator-boot-on; 125 vin-supply = <&vcc_sys>; 126 status = "okay"; 127 128 regulator-state-mem { 129 regulator-off-in-suspend; 130 }; 131 }; 132 133 vdd_gpu: regulator@41 { 134 compatible = "silergy,syr828"; 135 reg = <0x41>; 136 fcs,suspend-voltage-selector = <1>; 137 regulator-name = "vdd_gpu"; 138 regulator-min-microvolt = <712500>; 139 regulator-max-microvolt = <1500000>; 140 regulator-ramp-delay = <1000>; 141 regulator-always-on; 142 regulator-boot-on; 143 vin-supply = <&vcc_sys>; 144 regulator-state-mem { 145 regulator-off-in-suspend; 146 }; 147 }; 148 149 rk808: pmic@1b { 150 compatible = "rockchip,rk808"; 151 reg = <0x1b>; 152 interrupt-parent = <&gpio1>; 153 interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 154 pinctrl-names = "default"; 155 pinctrl-0 = <&pmic_int_l>; 156 rockchip,system-power-controller; 157 wakeup-source; 158 #clock-cells = <1>; 159 clock-output-names = "xin32k", "rk808-clkout2"; 160 161 vcc1-supply = <&vcc_sys>; 162 vcc2-supply = <&vcc_sys>; 163 vcc3-supply = <&vcc_sys>; 164 vcc4-supply = <&vcc_sys>; 165 vcc6-supply = <&vcc_sys>; 166 vcc7-supply = <&vcc_sys>; 167 vcc8-supply = <&vcc3v3_sys>; 168 vcc9-supply = <&vcc_sys>; 169 vcc10-supply = <&vcc_sys>; 170 vcc11-supply = <&vcc_sys>; 171 vcc12-supply = <&vcc3v3_sys>; 172 vddio-supply = <&vcc_1v8>; 173 174 regulators { 175 vdd_center: DCDC_REG1 { 176 regulator-name = "vdd_center"; 177 regulator-min-microvolt = <750000>; 178 regulator-max-microvolt = <1350000>; 179 regulator-always-on; 180 regulator-boot-on; 181 regulator-state-mem { 182 regulator-off-in-suspend; 183 }; 184 }; 185 186 vdd_cpu_l: DCDC_REG2 { 187 regulator-name = "vdd_cpu_l"; 188 regulator-min-microvolt = <750000>; 189 regulator-max-microvolt = <1350000>; 190 regulator-always-on; 191 regulator-boot-on; 192 regulator-state-mem { 193 regulator-off-in-suspend; 194 }; 195 }; 196 197 vcc_ddr: DCDC_REG3 { 198 regulator-name = "vcc_ddr"; 199 regulator-always-on; 200 regulator-boot-on; 201 regulator-state-mem { 202 regulator-on-in-suspend; 203 }; 204 }; 205 206 vcc_1v8: DCDC_REG4 { 207 regulator-name = "vcc_1v8"; 208 regulator-min-microvolt = <1800000>; 209 regulator-max-microvolt = <1800000>; 210 regulator-always-on; 211 regulator-boot-on; 212 regulator-state-mem { 213 regulator-on-in-suspend; 214 regulator-suspend-microvolt = <1800000>; 215 }; 216 }; 217 218 vcc1v8_dvp: LDO_REG1 { 219 regulator-name = "vcc1v8_dvp"; 220 regulator-min-microvolt = <1800000>; 221 regulator-max-microvolt = <1800000>; 222 regulator-always-on; 223 regulator-boot-on; 224 regulator-state-mem { 225 regulator-on-in-suspend; 226 regulator-suspend-microvolt = <1800000>; 227 }; 228 }; 229 230 vcca1v8_hdmi: LDO_REG2 { 231 regulator-name = "vcca1v8_hdmi"; 232 regulator-min-microvolt = <1800000>; 233 regulator-max-microvolt = <1800000>; 234 regulator-always-on; 235 regulator-boot-on; 236 regulator-state-mem { 237 regulator-on-in-suspend; 238 regulator-suspend-microvolt = <1800000>; 239 }; 240 }; 241 242 vcca_1v8: LDO_REG3 { 243 regulator-name = "vcca_1v8"; 244 regulator-min-microvolt = <1800000>; 245 regulator-max-microvolt = <1800000>; 246 regulator-always-on; 247 regulator-boot-on; 248 regulator-state-mem { 249 regulator-on-in-suspend; 250 regulator-suspend-microvolt = <1800000>; 251 }; 252 }; 253 254 vcc_sd: LDO_REG4 { 255 regulator-name = "vcc_sd"; 256 regulator-min-microvolt = <1800000>; 257 regulator-max-microvolt = <3300000>; 258 regulator-always-on; 259 regulator-boot-on; 260 regulator-state-mem { 261 regulator-on-in-suspend; 262 regulator-suspend-microvolt = <3300000>; 263 }; 264 }; 265 266 vcc3v0_sd: LDO_REG5 { 267 regulator-name = "vcc3v0_sd"; 268 regulator-min-microvolt = <3000000>; 269 regulator-max-microvolt = <3000000>; 270 regulator-always-on; 271 regulator-boot-on; 272 regulator-state-mem { 273 regulator-on-in-suspend; 274 regulator-suspend-microvolt = <3000000>; 275 }; 276 }; 277 278 vcc_1v5: LDO_REG6 { 279 regulator-name = "vcc_1v5"; 280 regulator-min-microvolt = <1500000>; 281 regulator-max-microvolt = <1500000>; 282 regulator-always-on; 283 regulator-boot-on; 284 regulator-state-mem { 285 regulator-on-in-suspend; 286 regulator-suspend-microvolt = <1500000>; 287 }; 288 }; 289 290 vcca0v9_hdmi: LDO_REG7 { 291 regulator-name = "vcca0v9_hdmi"; 292 regulator-min-microvolt = <900000>; 293 regulator-max-microvolt = <900000>; 294 regulator-always-on; 295 regulator-boot-on; 296 regulator-state-mem { 297 regulator-on-in-suspend; 298 regulator-suspend-microvolt = <900000>; 299 }; 300 }; 301 302 vcc_3v0: LDO_REG8 { 303 regulator-name = "vcc_3v0"; 304 regulator-min-microvolt = <3000000>; 305 regulator-max-microvolt = <3000000>; 306 regulator-always-on; 307 regulator-boot-on; 308 regulator-state-mem { 309 regulator-on-in-suspend; 310 regulator-suspend-microvolt = <3000000>; 311 }; 312 }; 313 314 vcc3v3_s3: SWITCH_REG1 { 315 regulator-name = "vcc3v3_s3"; 316 regulator-always-on; 317 regulator-boot-on; 318 regulator-state-mem { 319 regulator-on-in-suspend; 320 }; 321 }; 322 323 vcc3v3_s0: SWITCH_REG2 { 324 regulator-name = "vcc3v3_s0"; 325 regulator-always-on; 326 regulator-boot-on; 327 regulator-state-mem { 328 regulator-on-in-suspend; 329 }; 330 }; 331 }; 332 }; 333}; 334 335&i2c1 { 336 status = "okay"; 337}; 338 339&i2c2 { 340 status = "okay"; 341}; 342 343&i2c3 { 344 status = "okay"; 345}; 346 347&i2c4 { 348 status = "okay"; 349}; 350 351&io_domains { 352 bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */ 353 audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */ 354 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */ 355 gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */ 356 status = "okay"; 357}; 358 359&pcie_phy { 360 status = "okay"; 361}; 362 363&pcie0 { 364 num-lanes = <4>; 365 pinctrl-names = "default"; 366 pinctrl-0 = <&pcie_clkreqn_cpm>; 367 vpcie3v3-supply = <&vcc3v3_pcie>; 368 status = "okay"; 369}; 370 371&pmu_io_domains { 372 pmu1830-supply = <&vcc_1v8>; 373 status = "okay"; 374}; 375 376&pinctrl { 377 sdmmc { 378 sdmmc_bus1: sdmmc-bus1 { 379 rockchip,pins = 380 <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>; 381 }; 382 383 sdmmc_bus4: sdmmc-bus4 { 384 rockchip,pins = 385 <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>, 386 <4 9 RK_FUNC_1 &pcfg_pull_up_8ma>, 387 <4 10 RK_FUNC_1 &pcfg_pull_up_8ma>, 388 <4 11 RK_FUNC_1 &pcfg_pull_up_8ma>; 389 }; 390 391 sdmmc_clk: sdmmc-clk { 392 rockchip,pins = 393 <4 12 RK_FUNC_1 &pcfg_pull_none_18ma>; 394 }; 395 396 sdmmc_cmd: sdmmc-cmd { 397 rockchip,pins = 398 <4 13 RK_FUNC_1 &pcfg_pull_up_8ma>; 399 }; 400 }; 401 402 pmic { 403 pmic_int_l: pmic-int-l { 404 rockchip,pins = 405 <1 21 RK_FUNC_GPIO &pcfg_pull_up>; 406 }; 407 408 vsel1_gpio: vsel1-gpio { 409 rockchip,pins = 410 <1 17 RK_FUNC_GPIO &pcfg_pull_down>; 411 }; 412 413 vsel2_gpio: vsel2-gpio { 414 rockchip,pins = 415 <1 14 RK_FUNC_GPIO &pcfg_pull_down>; 416 }; 417 }; 418}; 419 420&pwm2 { 421 status = "okay"; 422}; 423 424&pwm3 { 425 status = "okay"; 426}; 427 428&sdhci { 429 bus-width = <8>; 430 mmc-hs400-1_8v; 431 mmc-hs400-enhanced-strobe; 432 non-removable; 433 status = "okay"; 434}; 435 436&sdmmc { 437 bus-width = <4>; 438 cap-mmc-highspeed; 439 cap-sd-highspeed; 440 clock-frequency = <100000000>; 441 clock-freq-min-max = <100000 100000000>; 442 cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; 443 disable-wp; 444 sd-uhs-sdr104; 445 vqmmc-supply = <&vcc_sd>; 446 card-detect-delay = <800>; 447 pinctrl-names = "default"; 448 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; 449 status = "okay"; 450}; 451 452&uart0 { 453 pinctrl-names = "default"; 454 pinctrl-0 = <&uart0_xfer &uart0_cts>; 455 status = "okay"; 456}; 457 458&uart2 { 459 status = "okay"; 460}; 461 462&tcphy0 { 463 status = "okay"; 464}; 465 466&tcphy1 { 467 status = "okay"; 468}; 469 470&u2phy0 { 471 status = "okay"; 472}; 473 474&u2phy1 { 475 status = "okay"; 476}; 477 478&u2phy0_host { 479 phy-supply = <&vcc5v0_host>; 480 status = "okay"; 481}; 482 483&u2phy1_host { 484 phy-supply = <&vcc5v0_host>; 485 status = "okay"; 486}; 487 488&u2phy0_otg { 489 status = "okay"; 490}; 491 492&u2phy1_otg { 493 status = "okay"; 494}; 495 496&usb_host0_ehci { 497 status = "okay"; 498}; 499 500&usb_host0_ohci { 501 status = "okay"; 502}; 503 504&usb_host1_ehci { 505 status = "okay"; 506}; 507 508&usb_host1_ohci { 509 status = "okay"; 510}; 511 512&usbdrd3_0 { 513 status = "okay"; 514}; 515 516&usbdrd_dwc3_0 { 517 status = "okay"; 518}; 519 520&usbdrd3_1 { 521 status = "okay"; 522}; 523 524&usbdrd_dwc3_1 { 525 status = "okay"; 526}; 527 528&vopb { 529 status = "okay"; 530}; 531 532&vopb_mmu { 533 status = "okay"; 534}; 535 536&vopl { 537 status = "okay"; 538}; 539 540&vopl_mmu { 541 status = "okay"; 542}; 543