1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 Akash Gajjar <Akash_Gajjar@mentor.com>
4 * Copyright (c) 2019 Pragnesh Patel <Pragnesh_Patel@mentor.com>
5 */
6
7/dts-v1/;
8#include <dt-bindings/input/linux-event-codes.h>
9#include <dt-bindings/leds/common.h>
10#include <dt-bindings/pwm/pwm.h>
11#include "rk3399.dtsi"
12#include "rk3399-opp.dtsi"
13
14/ {
15	aliases {
16		mmc0 = &sdhci;
17		mmc1 = &sdmmc;
18	};
19
20	chosen {
21		stdout-path = "serial2:1500000n8";
22	};
23
24	clkin_gmac: external-gmac-clock {
25		compatible = "fixed-clock";
26		clock-frequency = <125000000>;
27		clock-output-names = "clkin_gmac";
28		#clock-cells = <0>;
29	};
30
31	leds {
32		compatible = "gpio-leds";
33		pinctrl-names = "default";
34		pinctrl-0 = <&user_led2>;
35
36		/* USER_LED2 */
37		led-0 {
38			function = LED_FUNCTION_STATUS;
39			color = <LED_COLOR_ID_BLUE>;
40			gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
41			linux,default-trigger = "heartbeat";
42		};
43	};
44
45	sdio_pwrseq: sdio-pwrseq {
46		compatible = "mmc-pwrseq-simple";
47		clocks = <&rk808 1>;
48		clock-names = "ext_clock";
49		pinctrl-names = "default";
50		pinctrl-0 = <&wifi_enable_h>;
51		reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
52	};
53
54	sound: sound {
55		compatible = "audio-graph-card";
56		label = "Analog";
57		dais = <&i2s0_p0>;
58	};
59
60	sound-dit {
61		compatible = "audio-graph-card";
62		label = "SPDIF";
63		dais = <&spdif_p0>;
64	};
65
66	spdif-dit {
67		compatible = "linux,spdif-dit";
68		#sound-dai-cells = <0>;
69
70		port {
71			dit_p0_0: endpoint {
72				remote-endpoint = <&spdif_p0_0>;
73			};
74		};
75	};
76
77	vbus_typec: vbus-typec-regulator {
78		compatible = "regulator-fixed";
79		enable-active-high;
80		gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
81		pinctrl-names = "default";
82		pinctrl-0 = <&vcc5v0_typec_en>;
83		regulator-name = "vbus_typec";
84		regulator-always-on;
85		vin-supply = <&vcc5v0_sys>;
86	};
87
88	vcc12v_dcin: dc-12v {
89		compatible = "regulator-fixed";
90		regulator-name = "vcc12v_dcin";
91		regulator-always-on;
92		regulator-boot-on;
93		regulator-min-microvolt = <12000000>;
94		regulator-max-microvolt = <12000000>;
95	};
96
97	vcc3v3_lan: vcc3v3-lan-regulator {
98		compatible = "regulator-fixed";
99		regulator-name = "vcc3v3_lan";
100		regulator-always-on;
101		regulator-boot-on;
102		regulator-min-microvolt = <3300000>;
103		regulator-max-microvolt = <3300000>;
104		vin-supply = <&vcc3v3_sys>;
105	};
106
107	vcc3v3_pcie: vcc3v3-pcie-regulator {
108		compatible = "regulator-fixed";
109		enable-active-high;
110		gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
111		pinctrl-names = "default";
112		pinctrl-0 = <&pcie_pwr_en>;
113		regulator-name = "vcc3v3_pcie";
114		regulator-always-on;
115		regulator-boot-on;
116		vin-supply = <&vcc5v0_sys>;
117	};
118
119	vcc3v3_sys: vcc3v3-sys {
120		compatible = "regulator-fixed";
121		regulator-name = "vcc3v3_sys";
122		regulator-always-on;
123		regulator-boot-on;
124		regulator-min-microvolt = <3300000>;
125		regulator-max-microvolt = <3300000>;
126		vin-supply = <&vcc5v0_sys>;
127	};
128
129	vcc5v0_host: vcc5v0-host-regulator {
130		compatible = "regulator-fixed";
131		enable-active-high;
132		gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
133		pinctrl-names = "default";
134		pinctrl-0 = <&vcc5v0_host_en>;
135		regulator-name = "vcc5v0_host";
136		regulator-always-on;
137		vin-supply = <&vcc5v0_sys>;
138	};
139
140	vcc5v0_sys: vcc-sys {
141		compatible = "regulator-fixed";
142		regulator-name = "vcc5v0_sys";
143		regulator-always-on;
144		regulator-boot-on;
145		regulator-min-microvolt = <5000000>;
146		regulator-max-microvolt = <5000000>;
147		vin-supply = <&vcc12v_dcin>;
148	};
149
150	vcc_0v9: vcc-0v9 {
151		compatible = "regulator-fixed";
152		regulator-name = "vcc_0v9";
153		regulator-always-on;
154		regulator-boot-on;
155		regulator-min-microvolt = <900000>;
156		regulator-max-microvolt = <900000>;
157		vin-supply = <&vcc3v3_sys>;
158	};
159
160	vdd_log: vdd-log {
161		compatible = "pwm-regulator";
162		pwms = <&pwm2 0 25000 1>;
163		pwm-supply = <&vcc5v0_sys>;
164		regulator-name = "vdd_log";
165		regulator-always-on;
166		regulator-boot-on;
167		regulator-min-microvolt = <800000>;
168		regulator-max-microvolt = <1400000>;
169	};
170};
171
172&cpu_l0 {
173	cpu-supply = <&vdd_cpu_l>;
174};
175
176&cpu_l1 {
177	cpu-supply = <&vdd_cpu_l>;
178};
179
180&cpu_l2 {
181	cpu-supply = <&vdd_cpu_l>;
182};
183
184&cpu_l3 {
185	cpu-supply = <&vdd_cpu_l>;
186};
187
188&cpu_b0 {
189	cpu-supply = <&vdd_cpu_b>;
190};
191
192&cpu_b1 {
193	cpu-supply = <&vdd_cpu_b>;
194};
195
196&emmc_phy {
197	status = "okay";
198};
199
200&gmac {
201	assigned-clocks = <&cru SCLK_RMII_SRC>;
202	assigned-clock-parents = <&clkin_gmac>;
203	clock_in_out = "input";
204	phy-supply = <&vcc3v3_lan>;
205	phy-mode = "rgmii";
206	pinctrl-names = "default";
207	pinctrl-0 = <&rgmii_pins>;
208	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
209	snps,reset-active-low;
210	snps,reset-delays-us = <0 10000 50000>;
211	tx_delay = <0x28>;
212	rx_delay = <0x11>;
213	status = "okay";
214};
215
216&gpu {
217	mali-supply = <&vdd_gpu>;
218	status = "okay";
219};
220
221&hdmi {
222	avdd-0v9-supply = <&vcca0v9_hdmi>;
223	avdd-1v8-supply = <&vcca1v8_hdmi>;
224	ddc-i2c-bus = <&i2c3>;
225	pinctrl-names = "default";
226	pinctrl-0 = <&hdmi_cec>;
227	status = "okay";
228};
229
230&hdmi_sound {
231	status = "okay";
232};
233
234&i2c0 {
235	clock-frequency = <400000>;
236	i2c-scl-rising-time-ns = <168>;
237	i2c-scl-falling-time-ns = <4>;
238	status = "okay";
239
240	rk808: pmic@1b {
241		compatible = "rockchip,rk808";
242		reg = <0x1b>;
243		interrupt-parent = <&gpio1>;
244		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
245		#clock-cells = <1>;
246		clock-output-names = "xin32k", "rk808-clkout2";
247		pinctrl-names = "default";
248		pinctrl-0 = <&pmic_int_l>;
249		rockchip,system-power-controller;
250		wakeup-source;
251
252		vcc1-supply = <&vcc5v0_sys>;
253		vcc2-supply = <&vcc5v0_sys>;
254		vcc3-supply = <&vcc5v0_sys>;
255		vcc4-supply = <&vcc5v0_sys>;
256		vcc6-supply = <&vcc5v0_sys>;
257		vcc7-supply = <&vcc5v0_sys>;
258		vcc8-supply = <&vcc3v3_sys>;
259		vcc9-supply = <&vcc5v0_sys>;
260		vcc10-supply = <&vcc5v0_sys>;
261		vcc11-supply = <&vcc5v0_sys>;
262		vcc12-supply = <&vcc3v3_sys>;
263		vddio-supply = <&vcc_1v8>;
264
265		regulators {
266			vdd_center: DCDC_REG1 {
267				regulator-name = "vdd_center";
268				regulator-always-on;
269				regulator-boot-on;
270				regulator-min-microvolt = <750000>;
271				regulator-max-microvolt = <1350000>;
272				regulator-ramp-delay = <6001>;
273				regulator-state-mem {
274					regulator-off-in-suspend;
275				};
276			};
277
278			vdd_cpu_l: DCDC_REG2 {
279				regulator-name = "vdd_cpu_l";
280				regulator-always-on;
281				regulator-boot-on;
282				regulator-min-microvolt = <750000>;
283				regulator-max-microvolt = <1350000>;
284				regulator-ramp-delay = <6001>;
285				regulator-state-mem {
286					regulator-off-in-suspend;
287				};
288			};
289
290			vcc_ddr: DCDC_REG3 {
291				regulator-name = "vcc_ddr";
292				regulator-always-on;
293				regulator-boot-on;
294				regulator-state-mem {
295					regulator-on-in-suspend;
296				};
297			};
298
299			vcc_1v8: DCDC_REG4 {
300				regulator-name = "vcc_1v8";
301				regulator-always-on;
302				regulator-boot-on;
303				regulator-min-microvolt = <1800000>;
304				regulator-max-microvolt = <1800000>;
305				regulator-state-mem {
306					regulator-on-in-suspend;
307					regulator-suspend-microvolt = <1800000>;
308				};
309			};
310
311			vcca1v8_codec: LDO_REG1 {
312				regulator-name = "vcca1v8_codec";
313				regulator-always-on;
314				regulator-boot-on;
315				regulator-min-microvolt = <1800000>;
316				regulator-max-microvolt = <1800000>;
317				regulator-state-mem {
318					regulator-off-in-suspend;
319				};
320			};
321
322			vcca1v8_hdmi: LDO_REG2 {
323				regulator-name = "vcca1v8_hdmi";
324				regulator-always-on;
325				regulator-boot-on;
326				regulator-min-microvolt = <1800000>;
327				regulator-max-microvolt = <1800000>;
328				regulator-state-mem {
329					regulator-off-in-suspend;
330				};
331			};
332
333			vcca_1v8: LDO_REG3 {
334				regulator-name = "vcca_1v8";
335				regulator-always-on;
336				regulator-boot-on;
337				regulator-min-microvolt = <1800000>;
338				regulator-max-microvolt = <1800000>;
339				regulator-state-mem {
340					regulator-on-in-suspend;
341					regulator-suspend-microvolt = <1800000>;
342				};
343			};
344
345			vcc_sdio: LDO_REG4 {
346				regulator-name = "vcc_sdio";
347				regulator-always-on;
348				regulator-boot-on;
349				regulator-min-microvolt = <3000000>;
350				regulator-max-microvolt = <3000000>;
351				regulator-state-mem {
352					regulator-on-in-suspend;
353					regulator-suspend-microvolt = <3000000>;
354				};
355			};
356
357			vcca3v0_codec: LDO_REG5 {
358				regulator-name = "vcca3v0_codec";
359				regulator-always-on;
360				regulator-boot-on;
361				regulator-min-microvolt = <3000000>;
362				regulator-max-microvolt = <3000000>;
363				regulator-state-mem {
364					regulator-off-in-suspend;
365				};
366			};
367
368			vcc_1v5: LDO_REG6 {
369				regulator-name = "vcc_1v5";
370				regulator-always-on;
371				regulator-boot-on;
372				regulator-min-microvolt = <1500000>;
373				regulator-max-microvolt = <1500000>;
374				regulator-state-mem {
375					regulator-on-in-suspend;
376					regulator-suspend-microvolt = <1500000>;
377				};
378			};
379
380			vcca0v9_hdmi: LDO_REG7 {
381				regulator-name = "vcca0v9_hdmi";
382				regulator-always-on;
383				regulator-boot-on;
384				regulator-min-microvolt = <900000>;
385				regulator-max-microvolt = <900000>;
386				regulator-state-mem {
387					regulator-off-in-suspend;
388				};
389			};
390
391			vcc_3v0: LDO_REG8 {
392				regulator-name = "vcc_3v0";
393				regulator-always-on;
394				regulator-boot-on;
395				regulator-min-microvolt = <3000000>;
396				regulator-max-microvolt = <3000000>;
397				regulator-state-mem {
398					regulator-on-in-suspend;
399					regulator-suspend-microvolt = <3000000>;
400				};
401			};
402
403			vcc_cam: SWITCH_REG1 {
404				regulator-name = "vcc_cam";
405				regulator-always-on;
406				regulator-boot-on;
407				regulator-state-mem {
408					regulator-off-in-suspend;
409				};
410			};
411
412			vcc_mipi: SWITCH_REG2 {
413				regulator-name = "vcc_mipi";
414				regulator-always-on;
415				regulator-boot-on;
416				regulator-state-mem {
417					regulator-off-in-suspend;
418				};
419			};
420		};
421	};
422
423	vdd_cpu_b: regulator@40 {
424		compatible = "silergy,syr827";
425		reg = <0x40>;
426		fcs,suspend-voltage-selector = <1>;
427		pinctrl-names = "default";
428		pinctrl-0 = <&vsel1_pin>;
429		regulator-name = "vdd_cpu_b";
430		regulator-min-microvolt = <712500>;
431		regulator-max-microvolt = <1500000>;
432		regulator-ramp-delay = <1000>;
433		regulator-always-on;
434		regulator-boot-on;
435		vin-supply = <&vcc5v0_sys>;
436
437		regulator-state-mem {
438			regulator-off-in-suspend;
439		};
440	};
441
442	vdd_gpu: regulator@41 {
443		compatible = "silergy,syr828";
444		reg = <0x41>;
445		fcs,suspend-voltage-selector = <1>;
446		pinctrl-names = "default";
447		pinctrl-0 = <&vsel2_pin>;
448		regulator-name = "vdd_gpu";
449		regulator-min-microvolt = <712500>;
450		regulator-max-microvolt = <1500000>;
451		regulator-ramp-delay = <1000>;
452		regulator-always-on;
453		regulator-boot-on;
454		vin-supply = <&vcc5v0_sys>;
455
456		regulator-state-mem {
457			regulator-off-in-suspend;
458		};
459	};
460};
461
462&i2c1 {
463	i2c-scl-rising-time-ns = <300>;
464	i2c-scl-falling-time-ns = <15>;
465	status = "okay";
466
467	es8316: codec@11 {
468		compatible = "everest,es8316";
469		reg = <0x11>;
470		clocks = <&cru SCLK_I2S_8CH_OUT>;
471		clock-names = "mclk";
472		#sound-dai-cells = <0>;
473
474		port {
475			es8316_p0_0: endpoint {
476				remote-endpoint = <&i2s0_p0_0>;
477			};
478		};
479	};
480};
481
482&i2c3 {
483	i2c-scl-rising-time-ns = <450>;
484	i2c-scl-falling-time-ns = <15>;
485	status = "okay";
486};
487
488&i2c4 {
489	i2c-scl-rising-time-ns = <600>;
490	i2c-scl-falling-time-ns = <20>;
491	status = "okay";
492};
493
494&i2s0 {
495	pinctrl-0 = <&i2s0_2ch_bus>;
496	rockchip,capture-channels = <2>;
497	rockchip,playback-channels = <2>;
498	status = "okay";
499
500	i2s0_p0: port {
501		i2s0_p0_0: endpoint {
502			dai-format = "i2s";
503			mclk-fs = <256>;
504			remote-endpoint = <&es8316_p0_0>;
505		};
506	};
507};
508
509&i2s1 {
510	rockchip,playback-channels = <2>;
511	rockchip,capture-channels = <2>;
512};
513
514&i2s2 {
515	status = "okay";
516};
517
518&io_domains {
519	audio-supply = <&vcca1v8_codec>;
520	bt656-supply = <&vcc_3v0>;
521	gpio1830-supply = <&vcc_3v0>;
522	sdmmc-supply = <&vcc_sdio>;
523	status = "okay";
524};
525
526&pcie0 {
527	ep-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>;
528	num-lanes = <4>;
529	pinctrl-0 = <&pcie_clkreqnb_cpm>;
530	pinctrl-names = "default";
531	vpcie0v9-supply = <&vcc_0v9>;
532	vpcie1v8-supply = <&vcc_1v8>;
533	vpcie3v3-supply = <&vcc3v3_pcie>;
534	status = "okay";
535};
536
537&pcie_phy {
538	status = "okay";
539};
540
541&pinctrl {
542	bt {
543		bt_enable_h: bt-enable-h {
544			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
545		};
546
547		bt_host_wake_l: bt-host-wake-l {
548			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
549		};
550
551		bt_wake_l: bt-wake-l {
552			rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
553		};
554	};
555
556	es8316 {
557		hp_detect: hp-detect {
558			rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
559		};
560
561		hp_int: hp-int {
562			rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
563		};
564	};
565
566	leds {
567		user_led2: user-led2 {
568			rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
569		};
570	};
571
572	pcie {
573		pcie_pwr_en: pcie-pwr-en {
574			rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
575		};
576	};
577
578	pmic {
579		pmic_int_l: pmic-int-l {
580			rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
581		};
582
583		vsel1_pin: vsel1-pin {
584			rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
585		};
586
587		vsel2_pin: vsel2-pin {
588			rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
589		};
590	};
591
592	sdio0 {
593		sdio0_bus4: sdio0-bus4 {
594			rockchip,pins = <2 RK_PC4 1 &pcfg_pull_up_20ma>,
595					<2 RK_PC5 1 &pcfg_pull_up_20ma>,
596					<2 RK_PC6 1 &pcfg_pull_up_20ma>,
597					<2 RK_PC7 1 &pcfg_pull_up_20ma>;
598		};
599
600		sdio0_cmd: sdio0-cmd {
601			rockchip,pins = <2 RK_PD0 1 &pcfg_pull_up_20ma>;
602		};
603
604		sdio0_clk: sdio0-clk {
605			rockchip,pins = <2 RK_PD1 1 &pcfg_pull_none_20ma>;
606		};
607	};
608
609	usb-typec {
610		vcc5v0_typec_en: vcc5v0-typec-en {
611			rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
612		};
613	};
614
615	usb2 {
616		vcc5v0_host_en: vcc5v0-host-en {
617			rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
618		};
619	};
620
621	wifi {
622		wifi_enable_h: wifi-enable-h {
623			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
624		};
625
626		wifi_host_wake_l: wifi-host-wake-l {
627			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
628		};
629	};
630};
631
632&pmu_io_domains {
633	pmu1830-supply = <&vcc_3v0>;
634	status = "okay";
635};
636
637&pwm2 {
638	status = "okay";
639};
640
641&saradc {
642	status = "okay";
643
644	vref-supply = <&vcc_1v8>;
645};
646
647&sdhci {
648	bus-width = <8>;
649	mmc-hs400-1_8v;
650	mmc-hs400-enhanced-strobe;
651	non-removable;
652	status = "okay";
653};
654
655&sdio0 {
656	#address-cells = <1>;
657	#size-cells = <0>;
658	bus-width = <4>;
659	clock-frequency = <50000000>;
660	cap-sdio-irq;
661	cap-sd-highspeed;
662	keep-power-in-suspend;
663	mmc-pwrseq = <&sdio_pwrseq>;
664	non-removable;
665	pinctrl-names = "default";
666	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
667	sd-uhs-sdr104;
668};
669
670&sdmmc {
671	bus-width = <4>;
672	cap-mmc-highspeed;
673	cap-sd-highspeed;
674	cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
675	disable-wp;
676	max-frequency = <150000000>;
677	pinctrl-names = "default";
678	pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdmmc_cmd &sdmmc_bus4>;
679	status = "okay";
680};
681
682&spdif {
683
684	spdif_p0: port {
685		spdif_p0_0: endpoint {
686			remote-endpoint = <&dit_p0_0>;
687		};
688	};
689};
690
691&tcphy0 {
692	status = "okay";
693};
694
695&tcphy1 {
696	status = "okay";
697};
698
699&tsadc {
700	status = "okay";
701
702	/* tshut mode 0:CRU 1:GPIO */
703	rockchip,hw-tshut-mode = <1>;
704	/* tshut polarity 0:LOW 1:HIGH */
705	rockchip,hw-tshut-polarity = <1>;
706};
707
708&u2phy0 {
709	status = "okay";
710
711	u2phy0_otg: otg-port {
712		status = "okay";
713	};
714
715	u2phy0_host: host-port {
716		phy-supply = <&vcc5v0_host>;
717		status = "okay";
718	};
719};
720
721&u2phy1 {
722	status = "okay";
723
724	u2phy1_otg: otg-port {
725		status = "okay";
726	};
727
728	u2phy1_host: host-port {
729		phy-supply = <&vcc5v0_host>;
730		status = "okay";
731	};
732};
733
734&uart0 {
735	pinctrl-names = "default";
736	pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
737};
738
739&uart2 {
740	status = "okay";
741};
742
743&usb_host0_ehci {
744	status = "okay";
745};
746
747&usb_host0_ohci {
748	status = "okay";
749};
750
751&usb_host1_ehci {
752	status = "okay";
753};
754
755&usb_host1_ohci {
756	status = "okay";
757};
758
759&usbdrd3_0 {
760	status = "okay";
761};
762
763&usbdrd3_1 {
764	status = "okay";
765};
766
767&usbdrd_dwc3_0 {
768	status = "okay";
769	dr_mode = "host";
770};
771
772&usbdrd_dwc3_1 {
773	status = "okay";
774	dr_mode = "host";
775};
776
777&vopb {
778	status = "okay";
779};
780
781&vopb_mmu {
782	status = "okay";
783};
784
785&vopl {
786	status = "okay";
787};
788
789&vopl_mmu {
790	status = "okay";
791};
792