1f9010b0eSMarkus Reichl// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2f9010b0eSMarkus Reichl/*
3f9010b0eSMarkus Reichl * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd
4f9010b0eSMarkus Reichl * Copyright (c) 2019 Markus Reichl <m.reichl@fivetechno.de>
5f9010b0eSMarkus Reichl */
6f9010b0eSMarkus Reichl
7f9010b0eSMarkus Reichl/dts-v1/;
8f9010b0eSMarkus Reichl#include "rk3399-roc-pc.dtsi"
9f9010b0eSMarkus Reichl
10f9010b0eSMarkus Reichl/ {
11f9010b0eSMarkus Reichl	model = "Firefly ROC-RK3399-PC Mezzanine Board";
12f9010b0eSMarkus Reichl	compatible = "firefly,roc-rk3399-pc-mezzanine", "rockchip,rk3399";
13f9010b0eSMarkus Reichl
14f9010b0eSMarkus Reichl	vcc3v3_ngff: vcc3v3-ngff {
15f9010b0eSMarkus Reichl		compatible = "regulator-fixed";
16f9010b0eSMarkus Reichl		regulator-name = "vcc3v3_ngff";
17f9010b0eSMarkus Reichl		enable-active-high;
18f9010b0eSMarkus Reichl		gpio = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>;
19f9010b0eSMarkus Reichl		pinctrl-names = "default";
20f9010b0eSMarkus Reichl		pinctrl-0 = <&vcc3v3_ngff_en>;
21f9010b0eSMarkus Reichl		regulator-always-on;
22f9010b0eSMarkus Reichl		regulator-boot-on;
23f9010b0eSMarkus Reichl		regulator-min-microvolt = <3300000>;
24f9010b0eSMarkus Reichl		regulator-max-microvolt = <3300000>;
25f9010b0eSMarkus Reichl		vin-supply = <&dc_12v>;
26f9010b0eSMarkus Reichl	};
27f9010b0eSMarkus Reichl
28f9010b0eSMarkus Reichl	vcc3v3_pcie: vcc3v3-pcie {
29f9010b0eSMarkus Reichl		compatible = "regulator-fixed";
30f9010b0eSMarkus Reichl		regulator-name = "vcc3v3_pcie";
31f9010b0eSMarkus Reichl		enable-active-high;
32f9010b0eSMarkus Reichl		gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
33f9010b0eSMarkus Reichl		pinctrl-names = "default";
34f9010b0eSMarkus Reichl		pinctrl-0 = <&vcc3v3_pcie_en>;
35f9010b0eSMarkus Reichl		regulator-min-microvolt = <3300000>;
36f9010b0eSMarkus Reichl		regulator-max-microvolt = <3300000>;
37f9010b0eSMarkus Reichl		vin-supply = <&dc_12v>;
38f9010b0eSMarkus Reichl	};
39f9010b0eSMarkus Reichl};
40f9010b0eSMarkus Reichl
41f9010b0eSMarkus Reichl&pcie_phy {
42f9010b0eSMarkus Reichl	status = "okay";
43f9010b0eSMarkus Reichl};
44f9010b0eSMarkus Reichl
45f9010b0eSMarkus Reichl&pcie0 {
46f9010b0eSMarkus Reichl	ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
47f9010b0eSMarkus Reichl	num-lanes = <4>;
48f9010b0eSMarkus Reichl	pinctrl-names = "default";
49f9010b0eSMarkus Reichl	pinctrl-0 = <&pcie_perst>;
50f9010b0eSMarkus Reichl	vpcie3v3-supply = <&vcc3v3_pcie>;
51ec5b0af7SMarkus Reichl	vpcie1v8-supply = <&vcc1v8_pmu>;
52ec5b0af7SMarkus Reichl	vpcie0v9-supply = <&vcca_0v9>;
53f9010b0eSMarkus Reichl	status = "okay";
54f9010b0eSMarkus Reichl};
55f9010b0eSMarkus Reichl
56f9010b0eSMarkus Reichl&pinctrl {
57f9010b0eSMarkus Reichl	ngff {
58f9010b0eSMarkus Reichl		vcc3v3_ngff_en: vcc3v3-ngff-en {
59f9010b0eSMarkus Reichl			rockchip,pins = <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
60f9010b0eSMarkus Reichl		};
61f9010b0eSMarkus Reichl	};
62f9010b0eSMarkus Reichl
63f9010b0eSMarkus Reichl	pcie {
64f9010b0eSMarkus Reichl		vcc3v3_pcie_en: vcc3v3-pcie-en {
65f9010b0eSMarkus Reichl			rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
66f9010b0eSMarkus Reichl		};
67f9010b0eSMarkus Reichl
68f9010b0eSMarkus Reichl		pcie_perst: pcie-perst {
69f9010b0eSMarkus Reichl			rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
70f9010b0eSMarkus Reichl		};
71f9010b0eSMarkus Reichl	};
72f9010b0eSMarkus Reichl};
73cf3c5397SMarkus Reichl
74cf3c5397SMarkus Reichl&sdio0 {
75cf3c5397SMarkus Reichl	bus-width = <4>;
76cf3c5397SMarkus Reichl	cap-sd-highspeed;
77cf3c5397SMarkus Reichl	cap-sdio-irq;
78cf3c5397SMarkus Reichl	keep-power-in-suspend;
79cf3c5397SMarkus Reichl	mmc-pwrseq = <&sdio_pwrseq>;
80cf3c5397SMarkus Reichl	non-removable;
81cf3c5397SMarkus Reichl	pinctrl-names = "default";
82cf3c5397SMarkus Reichl	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
83cf3c5397SMarkus Reichl	sd-uhs-sdr104;
84cf3c5397SMarkus Reichl	vmmc-supply = <&vcc3v3_ngff>;
85cf3c5397SMarkus Reichl	vqmmc-supply = <&vcc_1v8>;
86cf3c5397SMarkus Reichl	status = "okay";
87cf3c5397SMarkus Reichl};
88cf3c5397SMarkus Reichl
89cf3c5397SMarkus Reichl&uart0 {
90cf3c5397SMarkus Reichl	pinctrl-names = "default";
91cf3c5397SMarkus Reichl	pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
92cf3c5397SMarkus Reichl	status = "okay";
93cf3c5397SMarkus Reichl};
94