1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd
4 */
5
6/ {
7	cluster0_opp: opp-table0 {
8		compatible = "operating-points-v2";
9		opp-shared;
10
11		opp00 {
12			opp-hz = /bits/ 64 <408000000>;
13			opp-microvolt = <800000>;
14			clock-latency-ns = <40000>;
15		};
16		opp01 {
17			opp-hz = /bits/ 64 <600000000>;
18			opp-microvolt = <800000>;
19		};
20		opp02 {
21			opp-hz = /bits/ 64 <816000000>;
22			opp-microvolt = <850000>;
23		};
24		opp03 {
25			opp-hz = /bits/ 64 <1008000000>;
26			opp-microvolt = <925000>;
27		};
28		opp04 {
29			opp-hz = /bits/ 64 <1200000000>;
30			opp-microvolt = <1000000>;
31		};
32		opp05 {
33			opp-hz = /bits/ 64 <1416000000>;
34			opp-microvolt = <1125000>;
35		};
36	};
37
38	cluster1_opp: opp-table1 {
39		compatible = "operating-points-v2";
40		opp-shared;
41
42		opp00 {
43			opp-hz = /bits/ 64 <408000000>;
44			opp-microvolt = <800000>;
45			clock-latency-ns = <40000>;
46		};
47		opp01 {
48			opp-hz = /bits/ 64 <600000000>;
49			opp-microvolt = <800000>;
50		};
51		opp02 {
52			opp-hz = /bits/ 64 <816000000>;
53			opp-microvolt = <825000>;
54		};
55		opp03 {
56			opp-hz = /bits/ 64 <1008000000>;
57			opp-microvolt = <875000>;
58		};
59		opp04 {
60			opp-hz = /bits/ 64 <1200000000>;
61			opp-microvolt = <950000>;
62		};
63		opp05 {
64			opp-hz = /bits/ 64 <1416000000>;
65			opp-microvolt = <1025000>;
66		};
67		opp06 {
68			opp-hz = /bits/ 64 <1608000000>;
69			opp-microvolt = <1100000>;
70		};
71		opp07 {
72			opp-hz = /bits/ 64 <1800000000>;
73			opp-microvolt = <1200000>;
74		};
75	};
76
77	gpu_opp_table: opp-table2 {
78		compatible = "operating-points-v2";
79
80		opp00 {
81			opp-hz = /bits/ 64 <200000000>;
82			opp-microvolt = <800000>;
83		};
84		opp01 {
85			opp-hz = /bits/ 64 <297000000>;
86			opp-microvolt = <800000>;
87		};
88		opp02 {
89			opp-hz = /bits/ 64 <400000000>;
90			opp-microvolt = <825000>;
91		};
92		opp03 {
93			opp-hz = /bits/ 64 <500000000>;
94			opp-microvolt = <875000>;
95		};
96		opp04 {
97			opp-hz = /bits/ 64 <600000000>;
98			opp-microvolt = <925000>;
99		};
100		opp05 {
101			opp-hz = /bits/ 64 <800000000>;
102			opp-microvolt = <1100000>;
103		};
104	};
105};
106
107&cpu_l0 {
108	operating-points-v2 = <&cluster0_opp>;
109};
110
111&cpu_l1 {
112	operating-points-v2 = <&cluster0_opp>;
113};
114
115&cpu_l2 {
116	operating-points-v2 = <&cluster0_opp>;
117};
118
119&cpu_l3 {
120	operating-points-v2 = <&cluster0_opp>;
121};
122
123&cpu_b0 {
124	operating-points-v2 = <&cluster1_opp>;
125};
126
127&cpu_b1 {
128	operating-points-v2 = <&cluster1_opp>;
129};
130
131&gpu {
132	operating-points-v2 = <&gpu_opp_table>;
133};
134