1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * RK3399-based FriendlyElec boards device tree source
4 *
5 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
6 *
7 * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
8 * (http://www.friendlyarm.com)
9 *
10 * Copyright (c) 2018 Collabora Ltd.
11 * Copyright (c) 2019 Arm Ltd.
12 */
13
14/dts-v1/;
15#include <dt-bindings/input/linux-event-codes.h>
16#include "rk3399.dtsi"
17#include "rk3399-opp.dtsi"
18
19/ {
20	chosen {
21		stdout-path = "serial2:1500000n8";
22	};
23
24	clkin_gmac: external-gmac-clock {
25		compatible = "fixed-clock";
26		clock-frequency = <125000000>;
27		clock-output-names = "clkin_gmac";
28		#clock-cells = <0>;
29	};
30
31	vcc3v3_sys: vcc3v3-sys {
32		compatible = "regulator-fixed";
33		regulator-always-on;
34		regulator-boot-on;
35		regulator-min-microvolt = <3300000>;
36		regulator-max-microvolt = <3300000>;
37		regulator-name = "vcc3v3_sys";
38	};
39
40	vcc5v0_sys: vcc5v0-sys {
41		compatible = "regulator-fixed";
42		regulator-always-on;
43		regulator-boot-on;
44		regulator-min-microvolt = <5000000>;
45		regulator-max-microvolt = <5000000>;
46		regulator-name = "vcc5v0_sys";
47		vin-supply = <&vdd_5v>;
48	};
49
50	/* switched by pmic_sleep */
51	vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
52		compatible = "regulator-fixed";
53		regulator-always-on;
54		regulator-boot-on;
55		regulator-min-microvolt = <1800000>;
56		regulator-max-microvolt = <1800000>;
57		regulator-name = "vcc1v8_s3";
58		vin-supply = <&vcc_1v8>;
59	};
60
61	vcc3v0_sd: vcc3v0-sd {
62		compatible = "regulator-fixed";
63		enable-active-high;
64		gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
65		pinctrl-names = "default";
66		pinctrl-0 = <&sdmmc0_pwr_h>;
67		regulator-always-on;
68		regulator-min-microvolt = <3000000>;
69		regulator-max-microvolt = <3000000>;
70		regulator-name = "vcc3v0_sd";
71		vin-supply = <&vcc3v3_sys>;
72	};
73
74	vbus_typec: vbus-typec {
75		compatible = "regulator-fixed";
76		regulator-min-microvolt = <5000000>;
77		regulator-max-microvolt = <5000000>;
78		regulator-name = "vbus_typec";
79	};
80
81	gpio-keys {
82		compatible = "gpio-keys";
83		autorepeat;
84		pinctrl-names = "default";
85		pinctrl-0 = <&power_key>;
86
87		power {
88			debounce-interval = <100>;
89			gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
90			label = "GPIO Key Power";
91			linux,code = <KEY_POWER>;
92			wakeup-source;
93		};
94	};
95
96	leds: gpio-leds {
97		compatible = "gpio-leds";
98		pinctrl-names = "default";
99		pinctrl-0 = <&leds_gpio>;
100
101		status {
102			gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
103			label = "status_led";
104			linux,default-trigger = "heartbeat";
105		};
106	};
107
108	sdio_pwrseq: sdio-pwrseq {
109		compatible = "mmc-pwrseq-simple";
110		clocks = <&rk808 1>;
111		clock-names = "ext_clock";
112		pinctrl-names = "default";
113		pinctrl-0 = <&wifi_reg_on_h>;
114		reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
115	};
116};
117
118&cpu_b0 {
119	cpu-supply = <&vdd_cpu_b>;
120};
121
122&cpu_b1 {
123	cpu-supply = <&vdd_cpu_b>;
124};
125
126&cpu_l0 {
127	cpu-supply = <&vdd_cpu_l>;
128};
129
130&cpu_l1 {
131	cpu-supply = <&vdd_cpu_l>;
132};
133
134&cpu_l2 {
135	cpu-supply = <&vdd_cpu_l>;
136};
137
138&cpu_l3 {
139	cpu-supply = <&vdd_cpu_l>;
140};
141
142&emmc_phy {
143	status = "okay";
144};
145
146&gmac {
147	assigned-clock-parents = <&clkin_gmac>;
148	assigned-clocks = <&cru SCLK_RMII_SRC>;
149	clock_in_out = "input";
150	pinctrl-names = "default";
151	pinctrl-0 = <&rgmii_pins>, <&phy_intb>, <&phy_rstb>;
152	phy-handle = <&rtl8211e>;
153	phy-mode = "rgmii";
154	phy-supply = <&vcc3v3_s3>;
155	tx_delay = <0x28>;
156	rx_delay = <0x11>;
157	status = "okay";
158
159	mdio {
160		compatible = "snps,dwmac-mdio";
161		#address-cells = <1>;
162		#size-cells = <0>;
163
164		rtl8211e: phy@1 {
165			reg = <1>;
166			interrupt-parent = <&gpio3>;
167			interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
168			reset-assert-us = <10000>;
169			reset-deassert-us = <30000>;
170			reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
171		};
172	};
173};
174
175&gpu {
176	mali-supply = <&vdd_gpu>;
177	status = "okay";
178};
179
180&hdmi {
181	ddc-i2c-bus = <&i2c7>;
182	pinctrl-names = "default";
183	pinctrl-0 = <&hdmi_cec>;
184	status = "okay";
185};
186
187&hdmi_sound {
188	status = "okay";
189};
190
191&i2c0 {
192	clock-frequency = <400000>;
193	i2c-scl-rising-time-ns = <160>;
194	i2c-scl-falling-time-ns = <30>;
195	status = "okay";
196
197	vdd_cpu_b: regulator@40 {
198		compatible = "silergy,syr827";
199		reg = <0x40>;
200		fcs,suspend-voltage-selector = <1>;
201		pinctrl-names = "default";
202		pinctrl-0 = <&cpu_b_sleep>;
203		regulator-always-on;
204		regulator-boot-on;
205		regulator-min-microvolt = <712500>;
206		regulator-max-microvolt = <1500000>;
207		regulator-name = "vdd_cpu_b";
208		regulator-ramp-delay = <1000>;
209		vin-supply = <&vcc3v3_sys>;
210
211		regulator-state-mem {
212			regulator-off-in-suspend;
213		};
214	};
215
216	vdd_gpu: regulator@41 {
217		compatible = "silergy,syr828";
218		reg = <0x41>;
219		fcs,suspend-voltage-selector = <1>;
220		pinctrl-names = "default";
221		pinctrl-0 = <&gpu_sleep>;
222		regulator-always-on;
223		regulator-boot-on;
224		regulator-min-microvolt = <712500>;
225		regulator-max-microvolt = <1500000>;
226		regulator-name = "vdd_gpu";
227		regulator-ramp-delay = <1000>;
228		vin-supply = <&vcc3v3_sys>;
229
230		regulator-state-mem {
231			regulator-off-in-suspend;
232		};
233	};
234
235	rk808: pmic@1b {
236		compatible = "rockchip,rk808";
237		reg = <0x1b>;
238		clock-output-names = "xin32k", "rtc_clko_wifi";
239		#clock-cells = <1>;
240		interrupt-parent = <&gpio1>;
241		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
242		pinctrl-names = "default";
243		pinctrl-0 = <&pmic_int_l>;
244		rockchip,system-power-controller;
245		wakeup-source;
246
247		vcc1-supply = <&vcc3v3_sys>;
248		vcc2-supply = <&vcc3v3_sys>;
249		vcc3-supply = <&vcc3v3_sys>;
250		vcc4-supply = <&vcc3v3_sys>;
251		vcc6-supply = <&vcc3v3_sys>;
252		vcc7-supply = <&vcc3v3_sys>;
253		vcc8-supply = <&vcc3v3_sys>;
254		vcc9-supply = <&vcc3v3_sys>;
255		vcc10-supply = <&vcc3v3_sys>;
256		vcc11-supply = <&vcc3v3_sys>;
257		vcc12-supply = <&vcc3v3_sys>;
258		vddio-supply = <&vcc_3v0>;
259
260		regulators {
261			vdd_center: DCDC_REG1 {
262				regulator-always-on;
263				regulator-boot-on;
264				regulator-min-microvolt = <750000>;
265				regulator-max-microvolt = <1350000>;
266				regulator-name = "vdd_center";
267				regulator-ramp-delay = <6001>;
268
269				regulator-state-mem {
270					regulator-off-in-suspend;
271				};
272			};
273
274			vdd_cpu_l: DCDC_REG2 {
275				regulator-always-on;
276				regulator-boot-on;
277				regulator-min-microvolt = <750000>;
278				regulator-max-microvolt = <1350000>;
279				regulator-name = "vdd_cpu_l";
280				regulator-ramp-delay = <6001>;
281
282				regulator-state-mem {
283					regulator-off-in-suspend;
284				};
285			};
286
287			vcc_ddr: DCDC_REG3 {
288				regulator-always-on;
289				regulator-boot-on;
290				regulator-name = "vcc_ddr";
291
292				regulator-state-mem {
293					regulator-on-in-suspend;
294				};
295			};
296
297			vcc_1v8: DCDC_REG4 {
298				regulator-always-on;
299				regulator-boot-on;
300				regulator-min-microvolt = <1800000>;
301				regulator-max-microvolt = <1800000>;
302				regulator-name = "vcc_1v8";
303
304				regulator-state-mem {
305					regulator-on-in-suspend;
306					regulator-suspend-microvolt = <1800000>;
307				};
308			};
309
310			vcc1v8_cam: LDO_REG1 {
311				regulator-always-on;
312				regulator-boot-on;
313				regulator-min-microvolt = <1800000>;
314				regulator-max-microvolt = <1800000>;
315				regulator-name = "vcc1v8_cam";
316
317				regulator-state-mem {
318					regulator-off-in-suspend;
319				};
320			};
321
322			vcc3v0_touch: LDO_REG2 {
323				regulator-always-on;
324				regulator-boot-on;
325				regulator-min-microvolt = <3000000>;
326				regulator-max-microvolt = <3000000>;
327				regulator-name = "vcc3v0_touch";
328
329				regulator-state-mem {
330					regulator-off-in-suspend;
331				};
332			};
333
334			vcc1v8_pmupll: LDO_REG3 {
335				regulator-always-on;
336				regulator-boot-on;
337				regulator-min-microvolt = <1800000>;
338				regulator-max-microvolt = <1800000>;
339				regulator-name = "vcc1v8_pmupll";
340
341				regulator-state-mem {
342					regulator-on-in-suspend;
343					regulator-suspend-microvolt = <1800000>;
344				};
345			};
346
347			vcc_sdio: LDO_REG4 {
348				regulator-always-on;
349				regulator-boot-on;
350				regulator-init-microvolt = <3000000>;
351				regulator-min-microvolt = <1800000>;
352				regulator-max-microvolt = <3300000>;
353				regulator-name = "vcc_sdio";
354
355				regulator-state-mem {
356					regulator-on-in-suspend;
357					regulator-suspend-microvolt = <3000000>;
358				};
359			};
360
361			vcca3v0_codec: LDO_REG5 {
362				regulator-always-on;
363				regulator-boot-on;
364				regulator-min-microvolt = <3000000>;
365				regulator-max-microvolt = <3000000>;
366				regulator-name = "vcca3v0_codec";
367
368				regulator-state-mem {
369					regulator-off-in-suspend;
370				};
371			};
372
373			vcc_1v5: LDO_REG6 {
374				regulator-always-on;
375				regulator-boot-on;
376				regulator-min-microvolt = <1500000>;
377				regulator-max-microvolt = <1500000>;
378				regulator-name = "vcc_1v5";
379
380				regulator-state-mem {
381					regulator-on-in-suspend;
382					regulator-suspend-microvolt = <1500000>;
383				};
384			};
385
386			vcca1v8_codec: LDO_REG7 {
387				regulator-always-on;
388				regulator-boot-on;
389				regulator-min-microvolt = <1800000>;
390				regulator-max-microvolt = <1800000>;
391				regulator-name = "vcca1v8_codec";
392
393				regulator-state-mem {
394					regulator-off-in-suspend;
395				};
396			};
397
398			vcc_3v0: LDO_REG8 {
399				regulator-always-on;
400				regulator-boot-on;
401				regulator-min-microvolt = <3000000>;
402				regulator-max-microvolt = <3000000>;
403				regulator-name = "vcc_3v0";
404
405				regulator-state-mem {
406					regulator-on-in-suspend;
407					regulator-suspend-microvolt = <3000000>;
408				};
409			};
410
411			vcc3v3_s3: SWITCH_REG1 {
412				regulator-always-on;
413				regulator-boot-on;
414				regulator-name = "vcc3v3_s3";
415
416				regulator-state-mem {
417					regulator-off-in-suspend;
418				};
419			};
420
421			vcc3v3_s0: SWITCH_REG2 {
422				regulator-always-on;
423				regulator-boot-on;
424				regulator-name = "vcc3v3_s0";
425
426				regulator-state-mem {
427					regulator-off-in-suspend;
428				};
429			};
430		};
431	};
432};
433
434&i2c1 {
435	clock-frequency = <200000>;
436	i2c-scl-rising-time-ns = <150>;
437	i2c-scl-falling-time-ns = <30>;
438	status = "okay";
439};
440
441&i2c2 {
442	status = "okay";
443};
444
445&i2c4 {
446	clock-frequency = <400000>;
447	i2c-scl-rising-time-ns = <160>;
448	i2c-scl-falling-time-ns = <30>;
449	status = "okay";
450
451	fusb0: typec-portc@22 {
452		compatible = "fcs,fusb302";
453		reg = <0x22>;
454		interrupt-parent = <&gpio1>;
455		interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
456		pinctrl-names = "default";
457		pinctrl-0 = <&fusb0_int>;
458		vbus-supply = <&vbus_typec>;
459	};
460};
461
462&i2c7 {
463	status = "okay";
464};
465
466&i2s2 {
467	status = "okay";
468};
469
470&io_domains {
471	bt656-supply = <&vcc_1v8>;
472	audio-supply = <&vcca1v8_codec>;
473	sdmmc-supply = <&vcc_sdio>;
474	gpio1830-supply = <&vcc_3v0>;
475	status = "okay";
476};
477
478&pcie_phy {
479	assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
480	assigned-clock-rates = <100000000>;
481	assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
482	status = "okay";
483};
484
485&pcie0 {
486	ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
487	max-link-speed = <2>;
488	num-lanes = <4>;
489	status = "okay";
490};
491
492&pinctrl {
493	fusb30x {
494		fusb0_int: fusb0-int {
495			rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
496		};
497	};
498
499	gpio-leds {
500		leds_gpio: leds-gpio {
501			rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
502		};
503	};
504
505	phy {
506		phy_intb: phy-intb {
507			rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
508		};
509
510		phy_rstb: phy-rstb {
511			rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
512		};
513	};
514
515	pmic {
516		cpu_b_sleep: cpu-b-sleep {
517			rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
518		};
519
520		gpu_sleep: gpu-sleep {
521			rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
522		};
523
524		pmic_int_l: pmic-int-l {
525			rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
526		};
527	};
528
529	rockchip-key {
530		power_key: power-key {
531			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
532		};
533	};
534
535	sdio {
536		bt_host_wake_l: bt-host-wake-l {
537			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
538		};
539
540		bt_reg_on_h: bt-reg-on-h {
541			/* external pullup to VCC1V8_PMUPLL */
542			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
543		};
544
545		bt_wake_l: bt-wake-l {
546			rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
547		};
548
549		wifi_reg_on_h: wifi-reg_on-h {
550			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
551		};
552	};
553
554	sdmmc {
555		sdmmc0_det_l: sdmmc0-det-l {
556			rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
557		};
558
559		sdmmc0_pwr_h: sdmmc0-pwr-h {
560			rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
561		};
562	};
563};
564
565&pmu_io_domains {
566	pmu1830-supply = <&vcc_3v0>;
567	status = "okay";
568};
569
570&pwm0 {
571	status = "okay";
572};
573
574&pwm1 {
575	status = "okay";
576};
577
578&pwm2 {
579	pinctrl-names = "active";
580	pinctrl-0 = <&pwm2_pin_pull_down>;
581	status = "okay";
582};
583
584&saradc {
585	vref-supply = <&vcca1v8_s3>;
586	status = "okay";
587};
588
589&sdhci {
590	bus-width = <8>;
591	mmc-hs200-1_8v;
592	non-removable;
593	status = "okay";
594};
595
596&sdio0 {
597	bus-width = <4>;
598	cap-sd-highspeed;
599	cap-sdio-irq;
600	keep-power-in-suspend;
601	mmc-pwrseq = <&sdio_pwrseq>;
602	non-removable;
603	pinctrl-names = "default";
604	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
605	sd-uhs-sdr104;
606	status = "okay";
607};
608
609&sdmmc {
610	bus-width = <4>;
611	cap-sd-highspeed;
612	cap-mmc-highspeed;
613	cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
614	disable-wp;
615	pinctrl-names = "default";
616	pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc0_det_l>;
617	sd-uhs-sdr104;
618	vmmc-supply = <&vcc3v0_sd>;
619	vqmmc-supply = <&vcc_sdio>;
620	status = "okay";
621};
622
623&tcphy0 {
624	status = "okay";
625};
626
627&tcphy1 {
628	status = "okay";
629};
630
631&tsadc {
632	/* tshut mode 0:CRU 1:GPIO */
633	rockchip,hw-tshut-mode = <1>;
634	/* tshut polarity 0:LOW 1:HIGH */
635	rockchip,hw-tshut-polarity = <1>;
636	status = "okay";
637};
638
639&u2phy0 {
640	status = "okay";
641};
642
643&u2phy0_host {
644	status = "okay";
645};
646
647&u2phy0_otg {
648	status = "okay";
649};
650
651&u2phy1 {
652	status = "okay";
653};
654
655&u2phy1_host {
656	status = "okay";
657};
658
659&u2phy1_otg {
660	status = "okay";
661};
662
663&uart0 {
664	pinctrl-names = "default";
665	pinctrl-0 = <&uart0_xfer &uart0_rts &uart0_cts>;
666	status = "okay";
667
668	bluetooth {
669		compatible = "brcm,bcm43438-bt";
670		clocks = <&rk808 1>;
671		clock-names = "lpo";
672		device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
673		host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
674		shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
675		max-speed = <4000000>;
676		pinctrl-names = "default";
677		pinctrl-0 = <&bt_reg_on_h &bt_host_wake_l &bt_wake_l>;
678		vbat-supply = <&vcc3v3_sys>;
679		vddio-supply = <&vcc_1v8>;
680	};
681};
682
683&uart2 {
684	status = "okay";
685};
686
687&usbdrd3_0 {
688	status = "okay";
689};
690
691&usbdrd3_1 {
692	status = "okay";
693};
694
695&usbdrd_dwc3_0 {
696	status = "okay";
697};
698
699&usbdrd_dwc3_1 {
700	dr_mode = "host";
701	status = "okay";
702};
703
704&usb_host0_ehci {
705	status = "okay";
706};
707
708&usb_host0_ohci {
709	status = "okay";
710};
711
712&usb_host1_ehci {
713	status = "okay";
714};
715
716&usb_host1_ohci {
717	status = "okay";
718};
719
720&vopb {
721	status = "okay";
722};
723
724&vopb_mmu {
725	status = "okay";
726};
727
728&vopl {
729	status = "okay";
730};
731
732&vopl_mmu {
733	status = "okay";
734};
735