1e7a09590STomeu Vizoso// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2e7a09590STomeu Vizoso/* 3e7a09590STomeu Vizoso * RK3399-based FriendlyElec boards device tree source 4e7a09590STomeu Vizoso * 5e7a09590STomeu Vizoso * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd 6e7a09590STomeu Vizoso * 7e7a09590STomeu Vizoso * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd. 8e7a09590STomeu Vizoso * (http://www.friendlyarm.com) 9e7a09590STomeu Vizoso * 10e7a09590STomeu Vizoso * Copyright (c) 2018 Collabora Ltd. 11e7a09590STomeu Vizoso * Copyright (c) 2019 Arm Ltd. 12e7a09590STomeu Vizoso */ 13e7a09590STomeu Vizoso 14e7a09590STomeu Vizoso/dts-v1/; 15e7a09590STomeu Vizoso#include <dt-bindings/input/linux-event-codes.h> 16e7a09590STomeu Vizoso#include "rk3399.dtsi" 17e7a09590STomeu Vizoso#include "rk3399-opp.dtsi" 18e7a09590STomeu Vizoso 19e7a09590STomeu Vizoso/ { 205dcbe7e3SHeiko Stuebner aliases { 215dcbe7e3SHeiko Stuebner mmc0 = &sdio0; 225dcbe7e3SHeiko Stuebner mmc1 = &sdmmc; 235dcbe7e3SHeiko Stuebner mmc2 = &sdhci; 245dcbe7e3SHeiko Stuebner }; 255dcbe7e3SHeiko Stuebner 26e7a09590STomeu Vizoso chosen { 27e7a09590STomeu Vizoso stdout-path = "serial2:1500000n8"; 28e7a09590STomeu Vizoso }; 29e7a09590STomeu Vizoso 30e7a09590STomeu Vizoso clkin_gmac: external-gmac-clock { 31e7a09590STomeu Vizoso compatible = "fixed-clock"; 32e7a09590STomeu Vizoso clock-frequency = <125000000>; 33e7a09590STomeu Vizoso clock-output-names = "clkin_gmac"; 34e7a09590STomeu Vizoso #clock-cells = <0>; 35e7a09590STomeu Vizoso }; 36e7a09590STomeu Vizoso 37e7a09590STomeu Vizoso vcc3v3_sys: vcc3v3-sys { 38e7a09590STomeu Vizoso compatible = "regulator-fixed"; 39e7a09590STomeu Vizoso regulator-always-on; 40e7a09590STomeu Vizoso regulator-boot-on; 41e7a09590STomeu Vizoso regulator-min-microvolt = <3300000>; 42e7a09590STomeu Vizoso regulator-max-microvolt = <3300000>; 43e7a09590STomeu Vizoso regulator-name = "vcc3v3_sys"; 44e7a09590STomeu Vizoso }; 45e7a09590STomeu Vizoso 46e7a09590STomeu Vizoso vcc5v0_sys: vcc5v0-sys { 47e7a09590STomeu Vizoso compatible = "regulator-fixed"; 48e7a09590STomeu Vizoso regulator-always-on; 49e7a09590STomeu Vizoso regulator-boot-on; 50e7a09590STomeu Vizoso regulator-min-microvolt = <5000000>; 51e7a09590STomeu Vizoso regulator-max-microvolt = <5000000>; 52e7a09590STomeu Vizoso regulator-name = "vcc5v0_sys"; 53e7a09590STomeu Vizoso vin-supply = <&vdd_5v>; 54e7a09590STomeu Vizoso }; 55e7a09590STomeu Vizoso 56e7a09590STomeu Vizoso /* switched by pmic_sleep */ 57876816b2SRobin Murphy vcc1v8_s3: vcc1v8-s3 { 58e7a09590STomeu Vizoso compatible = "regulator-fixed"; 59e7a09590STomeu Vizoso regulator-always-on; 60e7a09590STomeu Vizoso regulator-boot-on; 61e7a09590STomeu Vizoso regulator-min-microvolt = <1800000>; 62e7a09590STomeu Vizoso regulator-max-microvolt = <1800000>; 63e7a09590STomeu Vizoso regulator-name = "vcc1v8_s3"; 64e7a09590STomeu Vizoso vin-supply = <&vcc_1v8>; 65e7a09590STomeu Vizoso }; 66e7a09590STomeu Vizoso 67e7a09590STomeu Vizoso vcc3v0_sd: vcc3v0-sd { 68e7a09590STomeu Vizoso compatible = "regulator-fixed"; 69e7a09590STomeu Vizoso enable-active-high; 70e7a09590STomeu Vizoso gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; 71e7a09590STomeu Vizoso pinctrl-names = "default"; 72e7a09590STomeu Vizoso pinctrl-0 = <&sdmmc0_pwr_h>; 73e7a09590STomeu Vizoso regulator-always-on; 74e7a09590STomeu Vizoso regulator-min-microvolt = <3000000>; 75e7a09590STomeu Vizoso regulator-max-microvolt = <3000000>; 76e7a09590STomeu Vizoso regulator-name = "vcc3v0_sd"; 77e7a09590STomeu Vizoso vin-supply = <&vcc3v3_sys>; 78e7a09590STomeu Vizoso }; 79e7a09590STomeu Vizoso 80876816b2SRobin Murphy /* 81876816b2SRobin Murphy * Really, this is supplied by vcc_1v8, and vcc1v8_s3 only 82876816b2SRobin Murphy * drives the enable pin, but we can't quite model that. 83876816b2SRobin Murphy */ 84876816b2SRobin Murphy vcca0v9_s3: vcca0v9-s3 { 85876816b2SRobin Murphy compatible = "regulator-fixed"; 86876816b2SRobin Murphy regulator-min-microvolt = <900000>; 87876816b2SRobin Murphy regulator-max-microvolt = <900000>; 88876816b2SRobin Murphy regulator-name = "vcca0v9_s3"; 89876816b2SRobin Murphy vin-supply = <&vcc1v8_s3>; 90876816b2SRobin Murphy }; 91876816b2SRobin Murphy 92876816b2SRobin Murphy /* As above, actually supplied by vcc3v3_sys */ 93876816b2SRobin Murphy vcca1v8_s3: vcca1v8-s3 { 94876816b2SRobin Murphy compatible = "regulator-fixed"; 95876816b2SRobin Murphy regulator-min-microvolt = <1800000>; 96876816b2SRobin Murphy regulator-max-microvolt = <1800000>; 97876816b2SRobin Murphy regulator-name = "vcca1v8_s3"; 98876816b2SRobin Murphy vin-supply = <&vcc1v8_s3>; 99876816b2SRobin Murphy }; 100876816b2SRobin Murphy 101e7a09590STomeu Vizoso vbus_typec: vbus-typec { 102e7a09590STomeu Vizoso compatible = "regulator-fixed"; 103e7a09590STomeu Vizoso regulator-min-microvolt = <5000000>; 104e7a09590STomeu Vizoso regulator-max-microvolt = <5000000>; 105e7a09590STomeu Vizoso regulator-name = "vbus_typec"; 106e7a09590STomeu Vizoso }; 107e7a09590STomeu Vizoso 108e7a09590STomeu Vizoso gpio-keys { 109e7a09590STomeu Vizoso compatible = "gpio-keys"; 110e7a09590STomeu Vizoso autorepeat; 111e7a09590STomeu Vizoso pinctrl-names = "default"; 112e7a09590STomeu Vizoso pinctrl-0 = <&power_key>; 113e7a09590STomeu Vizoso 114e7a09590STomeu Vizoso power { 115e7a09590STomeu Vizoso debounce-interval = <100>; 116e7a09590STomeu Vizoso gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; 117e7a09590STomeu Vizoso label = "GPIO Key Power"; 118e7a09590STomeu Vizoso linux,code = <KEY_POWER>; 119e7a09590STomeu Vizoso wakeup-source; 120e7a09590STomeu Vizoso }; 121e7a09590STomeu Vizoso }; 122e7a09590STomeu Vizoso 123e7a09590STomeu Vizoso leds: gpio-leds { 124e7a09590STomeu Vizoso compatible = "gpio-leds"; 125e7a09590STomeu Vizoso pinctrl-names = "default"; 1266dd5e12cSJohan Jonker pinctrl-0 = <&status_led_pin>; 127e7a09590STomeu Vizoso 1286dd5e12cSJohan Jonker status_led: led-0 { 129e7a09590STomeu Vizoso gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; 130e7a09590STomeu Vizoso label = "status_led"; 131e7a09590STomeu Vizoso linux,default-trigger = "heartbeat"; 132e7a09590STomeu Vizoso }; 133e7a09590STomeu Vizoso }; 134e7a09590STomeu Vizoso 135e7a09590STomeu Vizoso sdio_pwrseq: sdio-pwrseq { 136e7a09590STomeu Vizoso compatible = "mmc-pwrseq-simple"; 137e7a09590STomeu Vizoso clocks = <&rk808 1>; 138e7a09590STomeu Vizoso clock-names = "ext_clock"; 139e7a09590STomeu Vizoso pinctrl-names = "default"; 140e7a09590STomeu Vizoso pinctrl-0 = <&wifi_reg_on_h>; 141e7a09590STomeu Vizoso reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; 142e7a09590STomeu Vizoso }; 143e7a09590STomeu Vizoso}; 144e7a09590STomeu Vizoso 145e7a09590STomeu Vizoso&cpu_b0 { 146e7a09590STomeu Vizoso cpu-supply = <&vdd_cpu_b>; 147e7a09590STomeu Vizoso}; 148e7a09590STomeu Vizoso 149e7a09590STomeu Vizoso&cpu_b1 { 150e7a09590STomeu Vizoso cpu-supply = <&vdd_cpu_b>; 151e7a09590STomeu Vizoso}; 152e7a09590STomeu Vizoso 153e7a09590STomeu Vizoso&cpu_l0 { 154e7a09590STomeu Vizoso cpu-supply = <&vdd_cpu_l>; 155e7a09590STomeu Vizoso}; 156e7a09590STomeu Vizoso 157e7a09590STomeu Vizoso&cpu_l1 { 158e7a09590STomeu Vizoso cpu-supply = <&vdd_cpu_l>; 159e7a09590STomeu Vizoso}; 160e7a09590STomeu Vizoso 161e7a09590STomeu Vizoso&cpu_l2 { 162e7a09590STomeu Vizoso cpu-supply = <&vdd_cpu_l>; 163e7a09590STomeu Vizoso}; 164e7a09590STomeu Vizoso 165e7a09590STomeu Vizoso&cpu_l3 { 166e7a09590STomeu Vizoso cpu-supply = <&vdd_cpu_l>; 167e7a09590STomeu Vizoso}; 168e7a09590STomeu Vizoso 169e7a09590STomeu Vizoso&emmc_phy { 170e7a09590STomeu Vizoso status = "okay"; 171e7a09590STomeu Vizoso}; 172e7a09590STomeu Vizoso 173e7a09590STomeu Vizoso&gmac { 174e7a09590STomeu Vizoso assigned-clock-parents = <&clkin_gmac>; 175e7a09590STomeu Vizoso assigned-clocks = <&cru SCLK_RMII_SRC>; 176e7a09590STomeu Vizoso clock_in_out = "input"; 177e7a09590STomeu Vizoso pinctrl-names = "default"; 1781a4e6203SRobin Murphy pinctrl-0 = <&rgmii_pins>, <&phy_intb>, <&phy_rstb>; 1791a4e6203SRobin Murphy phy-handle = <&rtl8211e>; 180e7a09590STomeu Vizoso phy-mode = "rgmii"; 181e7a09590STomeu Vizoso phy-supply = <&vcc3v3_s3>; 182e7a09590STomeu Vizoso tx_delay = <0x28>; 183e7a09590STomeu Vizoso rx_delay = <0x11>; 184e7a09590STomeu Vizoso status = "okay"; 1851a4e6203SRobin Murphy 1861a4e6203SRobin Murphy mdio { 1871a4e6203SRobin Murphy compatible = "snps,dwmac-mdio"; 1881a4e6203SRobin Murphy #address-cells = <1>; 1891a4e6203SRobin Murphy #size-cells = <0>; 1901a4e6203SRobin Murphy 191b450d1c5SJohan Jonker rtl8211e: ethernet-phy@1 { 1921a4e6203SRobin Murphy reg = <1>; 1931a4e6203SRobin Murphy interrupt-parent = <&gpio3>; 1941a4e6203SRobin Murphy interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>; 195bc43cee8SRobin Murphy reset-assert-us = <10000>; 196bc43cee8SRobin Murphy reset-deassert-us = <30000>; 197bc43cee8SRobin Murphy reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 1981a4e6203SRobin Murphy }; 1991a4e6203SRobin Murphy }; 200e7a09590STomeu Vizoso}; 201e7a09590STomeu Vizoso 202e7a09590STomeu Vizoso&gpu { 203e7a09590STomeu Vizoso mali-supply = <&vdd_gpu>; 204e7a09590STomeu Vizoso status = "okay"; 205e7a09590STomeu Vizoso}; 206e7a09590STomeu Vizoso 207e7a09590STomeu Vizoso&hdmi { 208e7a09590STomeu Vizoso ddc-i2c-bus = <&i2c7>; 209e7a09590STomeu Vizoso pinctrl-names = "default"; 210e7a09590STomeu Vizoso pinctrl-0 = <&hdmi_cec>; 211e7a09590STomeu Vizoso status = "okay"; 212e7a09590STomeu Vizoso}; 213e7a09590STomeu Vizoso 214f94ffd95SRobin Murphy&hdmi_sound { 215f94ffd95SRobin Murphy status = "okay"; 216f94ffd95SRobin Murphy}; 217f94ffd95SRobin Murphy 218e7a09590STomeu Vizoso&i2c0 { 219e7a09590STomeu Vizoso clock-frequency = <400000>; 220e7a09590STomeu Vizoso i2c-scl-rising-time-ns = <160>; 221e7a09590STomeu Vizoso i2c-scl-falling-time-ns = <30>; 222e7a09590STomeu Vizoso status = "okay"; 223e7a09590STomeu Vizoso 224e7a09590STomeu Vizoso vdd_cpu_b: regulator@40 { 225e7a09590STomeu Vizoso compatible = "silergy,syr827"; 226e7a09590STomeu Vizoso reg = <0x40>; 227e7a09590STomeu Vizoso fcs,suspend-voltage-selector = <1>; 228e7a09590STomeu Vizoso pinctrl-names = "default"; 229e7a09590STomeu Vizoso pinctrl-0 = <&cpu_b_sleep>; 230e7a09590STomeu Vizoso regulator-always-on; 231e7a09590STomeu Vizoso regulator-boot-on; 232e7a09590STomeu Vizoso regulator-min-microvolt = <712500>; 233e7a09590STomeu Vizoso regulator-max-microvolt = <1500000>; 234e7a09590STomeu Vizoso regulator-name = "vdd_cpu_b"; 235e7a09590STomeu Vizoso regulator-ramp-delay = <1000>; 236e7a09590STomeu Vizoso vin-supply = <&vcc3v3_sys>; 237e7a09590STomeu Vizoso 238e7a09590STomeu Vizoso regulator-state-mem { 239e7a09590STomeu Vizoso regulator-off-in-suspend; 240e7a09590STomeu Vizoso }; 241e7a09590STomeu Vizoso }; 242e7a09590STomeu Vizoso 243e7a09590STomeu Vizoso vdd_gpu: regulator@41 { 244e7a09590STomeu Vizoso compatible = "silergy,syr828"; 245e7a09590STomeu Vizoso reg = <0x41>; 246e7a09590STomeu Vizoso fcs,suspend-voltage-selector = <1>; 247e7a09590STomeu Vizoso pinctrl-names = "default"; 248e7a09590STomeu Vizoso pinctrl-0 = <&gpu_sleep>; 249e7a09590STomeu Vizoso regulator-always-on; 250e7a09590STomeu Vizoso regulator-boot-on; 251e7a09590STomeu Vizoso regulator-min-microvolt = <712500>; 252e7a09590STomeu Vizoso regulator-max-microvolt = <1500000>; 253e7a09590STomeu Vizoso regulator-name = "vdd_gpu"; 254e7a09590STomeu Vizoso regulator-ramp-delay = <1000>; 255e7a09590STomeu Vizoso vin-supply = <&vcc3v3_sys>; 256e7a09590STomeu Vizoso 257e7a09590STomeu Vizoso regulator-state-mem { 258e7a09590STomeu Vizoso regulator-off-in-suspend; 259e7a09590STomeu Vizoso }; 260e7a09590STomeu Vizoso }; 261e7a09590STomeu Vizoso 262e7a09590STomeu Vizoso rk808: pmic@1b { 263e7a09590STomeu Vizoso compatible = "rockchip,rk808"; 264e7a09590STomeu Vizoso reg = <0x1b>; 2653e2f0bb7SRobin Murphy clock-output-names = "xin32k", "rtc_clko_wifi"; 266e7a09590STomeu Vizoso #clock-cells = <1>; 267e7a09590STomeu Vizoso interrupt-parent = <&gpio1>; 268e7a09590STomeu Vizoso interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 269e7a09590STomeu Vizoso pinctrl-names = "default"; 270*a070d3b8SRobin Murphy pinctrl-0 = <&pmic_int_l>, <&ap_pwroff>, <&clk_32k>; 271e7a09590STomeu Vizoso rockchip,system-power-controller; 272e7a09590STomeu Vizoso wakeup-source; 273e7a09590STomeu Vizoso 274e7a09590STomeu Vizoso vcc1-supply = <&vcc3v3_sys>; 275e7a09590STomeu Vizoso vcc2-supply = <&vcc3v3_sys>; 276e7a09590STomeu Vizoso vcc3-supply = <&vcc3v3_sys>; 277e7a09590STomeu Vizoso vcc4-supply = <&vcc3v3_sys>; 278e7a09590STomeu Vizoso vcc6-supply = <&vcc3v3_sys>; 279e7a09590STomeu Vizoso vcc7-supply = <&vcc3v3_sys>; 280e7a09590STomeu Vizoso vcc8-supply = <&vcc3v3_sys>; 281e7a09590STomeu Vizoso vcc9-supply = <&vcc3v3_sys>; 282e7a09590STomeu Vizoso vcc10-supply = <&vcc3v3_sys>; 283e7a09590STomeu Vizoso vcc11-supply = <&vcc3v3_sys>; 284e7a09590STomeu Vizoso vcc12-supply = <&vcc3v3_sys>; 285e7a09590STomeu Vizoso vddio-supply = <&vcc_3v0>; 286e7a09590STomeu Vizoso 287e7a09590STomeu Vizoso regulators { 288e7a09590STomeu Vizoso vdd_center: DCDC_REG1 { 289e7a09590STomeu Vizoso regulator-always-on; 290e7a09590STomeu Vizoso regulator-boot-on; 291e7a09590STomeu Vizoso regulator-min-microvolt = <750000>; 292e7a09590STomeu Vizoso regulator-max-microvolt = <1350000>; 293e7a09590STomeu Vizoso regulator-name = "vdd_center"; 294e7a09590STomeu Vizoso regulator-ramp-delay = <6001>; 295e7a09590STomeu Vizoso 296e7a09590STomeu Vizoso regulator-state-mem { 297e7a09590STomeu Vizoso regulator-off-in-suspend; 298e7a09590STomeu Vizoso }; 299e7a09590STomeu Vizoso }; 300e7a09590STomeu Vizoso 301e7a09590STomeu Vizoso vdd_cpu_l: DCDC_REG2 { 302e7a09590STomeu Vizoso regulator-always-on; 303e7a09590STomeu Vizoso regulator-boot-on; 304e7a09590STomeu Vizoso regulator-min-microvolt = <750000>; 305e7a09590STomeu Vizoso regulator-max-microvolt = <1350000>; 306e7a09590STomeu Vizoso regulator-name = "vdd_cpu_l"; 307e7a09590STomeu Vizoso regulator-ramp-delay = <6001>; 308e7a09590STomeu Vizoso 309e7a09590STomeu Vizoso regulator-state-mem { 310e7a09590STomeu Vizoso regulator-off-in-suspend; 311e7a09590STomeu Vizoso }; 312e7a09590STomeu Vizoso }; 313e7a09590STomeu Vizoso 314e7a09590STomeu Vizoso vcc_ddr: DCDC_REG3 { 315e7a09590STomeu Vizoso regulator-always-on; 316e7a09590STomeu Vizoso regulator-boot-on; 317e7a09590STomeu Vizoso regulator-name = "vcc_ddr"; 318e7a09590STomeu Vizoso 319e7a09590STomeu Vizoso regulator-state-mem { 320e7a09590STomeu Vizoso regulator-on-in-suspend; 321e7a09590STomeu Vizoso }; 322e7a09590STomeu Vizoso }; 323e7a09590STomeu Vizoso 324e7a09590STomeu Vizoso vcc_1v8: DCDC_REG4 { 325e7a09590STomeu Vizoso regulator-always-on; 326e7a09590STomeu Vizoso regulator-boot-on; 327e7a09590STomeu Vizoso regulator-min-microvolt = <1800000>; 328e7a09590STomeu Vizoso regulator-max-microvolt = <1800000>; 329e7a09590STomeu Vizoso regulator-name = "vcc_1v8"; 330e7a09590STomeu Vizoso 331e7a09590STomeu Vizoso regulator-state-mem { 332e7a09590STomeu Vizoso regulator-on-in-suspend; 333e7a09590STomeu Vizoso regulator-suspend-microvolt = <1800000>; 334e7a09590STomeu Vizoso }; 335e7a09590STomeu Vizoso }; 336e7a09590STomeu Vizoso 337e7a09590STomeu Vizoso vcc1v8_cam: LDO_REG1 { 338e7a09590STomeu Vizoso regulator-always-on; 339e7a09590STomeu Vizoso regulator-boot-on; 340e7a09590STomeu Vizoso regulator-min-microvolt = <1800000>; 341e7a09590STomeu Vizoso regulator-max-microvolt = <1800000>; 342e7a09590STomeu Vizoso regulator-name = "vcc1v8_cam"; 343e7a09590STomeu Vizoso 344e7a09590STomeu Vizoso regulator-state-mem { 345e7a09590STomeu Vizoso regulator-off-in-suspend; 346e7a09590STomeu Vizoso }; 347e7a09590STomeu Vizoso }; 348e7a09590STomeu Vizoso 349e7a09590STomeu Vizoso vcc3v0_touch: LDO_REG2 { 350e7a09590STomeu Vizoso regulator-always-on; 351e7a09590STomeu Vizoso regulator-boot-on; 352e7a09590STomeu Vizoso regulator-min-microvolt = <3000000>; 353e7a09590STomeu Vizoso regulator-max-microvolt = <3000000>; 354e7a09590STomeu Vizoso regulator-name = "vcc3v0_touch"; 355e7a09590STomeu Vizoso 356e7a09590STomeu Vizoso regulator-state-mem { 357e7a09590STomeu Vizoso regulator-off-in-suspend; 358e7a09590STomeu Vizoso }; 359e7a09590STomeu Vizoso }; 360e7a09590STomeu Vizoso 361e7a09590STomeu Vizoso vcc1v8_pmupll: LDO_REG3 { 362e7a09590STomeu Vizoso regulator-always-on; 363e7a09590STomeu Vizoso regulator-boot-on; 364e7a09590STomeu Vizoso regulator-min-microvolt = <1800000>; 365e7a09590STomeu Vizoso regulator-max-microvolt = <1800000>; 366e7a09590STomeu Vizoso regulator-name = "vcc1v8_pmupll"; 367e7a09590STomeu Vizoso 368e7a09590STomeu Vizoso regulator-state-mem { 369e7a09590STomeu Vizoso regulator-on-in-suspend; 370e7a09590STomeu Vizoso regulator-suspend-microvolt = <1800000>; 371e7a09590STomeu Vizoso }; 372e7a09590STomeu Vizoso }; 373e7a09590STomeu Vizoso 374e7a09590STomeu Vizoso vcc_sdio: LDO_REG4 { 375e7a09590STomeu Vizoso regulator-always-on; 376e7a09590STomeu Vizoso regulator-boot-on; 377e7a09590STomeu Vizoso regulator-init-microvolt = <3000000>; 378e7a09590STomeu Vizoso regulator-min-microvolt = <1800000>; 379e7a09590STomeu Vizoso regulator-max-microvolt = <3300000>; 380e7a09590STomeu Vizoso regulator-name = "vcc_sdio"; 381e7a09590STomeu Vizoso 382e7a09590STomeu Vizoso regulator-state-mem { 383e7a09590STomeu Vizoso regulator-on-in-suspend; 384e7a09590STomeu Vizoso regulator-suspend-microvolt = <3000000>; 385e7a09590STomeu Vizoso }; 386e7a09590STomeu Vizoso }; 387e7a09590STomeu Vizoso 388e7a09590STomeu Vizoso vcca3v0_codec: LDO_REG5 { 389e7a09590STomeu Vizoso regulator-always-on; 390e7a09590STomeu Vizoso regulator-boot-on; 391e7a09590STomeu Vizoso regulator-min-microvolt = <3000000>; 392e7a09590STomeu Vizoso regulator-max-microvolt = <3000000>; 393e7a09590STomeu Vizoso regulator-name = "vcca3v0_codec"; 394e7a09590STomeu Vizoso 395e7a09590STomeu Vizoso regulator-state-mem { 396e7a09590STomeu Vizoso regulator-off-in-suspend; 397e7a09590STomeu Vizoso }; 398e7a09590STomeu Vizoso }; 399e7a09590STomeu Vizoso 400e7a09590STomeu Vizoso vcc_1v5: LDO_REG6 { 401e7a09590STomeu Vizoso regulator-always-on; 402e7a09590STomeu Vizoso regulator-boot-on; 403e7a09590STomeu Vizoso regulator-min-microvolt = <1500000>; 404e7a09590STomeu Vizoso regulator-max-microvolt = <1500000>; 405e7a09590STomeu Vizoso regulator-name = "vcc_1v5"; 406e7a09590STomeu Vizoso 407e7a09590STomeu Vizoso regulator-state-mem { 408e7a09590STomeu Vizoso regulator-on-in-suspend; 409e7a09590STomeu Vizoso regulator-suspend-microvolt = <1500000>; 410e7a09590STomeu Vizoso }; 411e7a09590STomeu Vizoso }; 412e7a09590STomeu Vizoso 413e7a09590STomeu Vizoso vcca1v8_codec: LDO_REG7 { 414e7a09590STomeu Vizoso regulator-always-on; 415e7a09590STomeu Vizoso regulator-boot-on; 416e7a09590STomeu Vizoso regulator-min-microvolt = <1800000>; 417e7a09590STomeu Vizoso regulator-max-microvolt = <1800000>; 418e7a09590STomeu Vizoso regulator-name = "vcca1v8_codec"; 419e7a09590STomeu Vizoso 420e7a09590STomeu Vizoso regulator-state-mem { 421e7a09590STomeu Vizoso regulator-off-in-suspend; 422e7a09590STomeu Vizoso }; 423e7a09590STomeu Vizoso }; 424e7a09590STomeu Vizoso 425e7a09590STomeu Vizoso vcc_3v0: LDO_REG8 { 426e7a09590STomeu Vizoso regulator-always-on; 427e7a09590STomeu Vizoso regulator-boot-on; 428e7a09590STomeu Vizoso regulator-min-microvolt = <3000000>; 429e7a09590STomeu Vizoso regulator-max-microvolt = <3000000>; 430e7a09590STomeu Vizoso regulator-name = "vcc_3v0"; 431e7a09590STomeu Vizoso 432e7a09590STomeu Vizoso regulator-state-mem { 433e7a09590STomeu Vizoso regulator-on-in-suspend; 434e7a09590STomeu Vizoso regulator-suspend-microvolt = <3000000>; 435e7a09590STomeu Vizoso }; 436e7a09590STomeu Vizoso }; 437e7a09590STomeu Vizoso 438e7a09590STomeu Vizoso vcc3v3_s3: SWITCH_REG1 { 439e7a09590STomeu Vizoso regulator-always-on; 440e7a09590STomeu Vizoso regulator-boot-on; 441e7a09590STomeu Vizoso regulator-name = "vcc3v3_s3"; 442e7a09590STomeu Vizoso 443e7a09590STomeu Vizoso regulator-state-mem { 444e7a09590STomeu Vizoso regulator-off-in-suspend; 445e7a09590STomeu Vizoso }; 446e7a09590STomeu Vizoso }; 447e7a09590STomeu Vizoso 448e7a09590STomeu Vizoso vcc3v3_s0: SWITCH_REG2 { 449e7a09590STomeu Vizoso regulator-always-on; 450e7a09590STomeu Vizoso regulator-boot-on; 451e7a09590STomeu Vizoso regulator-name = "vcc3v3_s0"; 452e7a09590STomeu Vizoso 453e7a09590STomeu Vizoso regulator-state-mem { 454e7a09590STomeu Vizoso regulator-off-in-suspend; 455e7a09590STomeu Vizoso }; 456e7a09590STomeu Vizoso }; 457e7a09590STomeu Vizoso }; 458e7a09590STomeu Vizoso }; 459e7a09590STomeu Vizoso}; 460e7a09590STomeu Vizoso 461e7a09590STomeu Vizoso&i2c1 { 462e7a09590STomeu Vizoso clock-frequency = <200000>; 463e7a09590STomeu Vizoso i2c-scl-rising-time-ns = <150>; 464e7a09590STomeu Vizoso i2c-scl-falling-time-ns = <30>; 465e7a09590STomeu Vizoso status = "okay"; 466e7a09590STomeu Vizoso}; 467e7a09590STomeu Vizoso 468e7a09590STomeu Vizoso&i2c2 { 469e7a09590STomeu Vizoso status = "okay"; 470e7a09590STomeu Vizoso}; 471e7a09590STomeu Vizoso 472e7a09590STomeu Vizoso&i2c4 { 473e7a09590STomeu Vizoso clock-frequency = <400000>; 474e7a09590STomeu Vizoso i2c-scl-rising-time-ns = <160>; 475e7a09590STomeu Vizoso i2c-scl-falling-time-ns = <30>; 476e7a09590STomeu Vizoso status = "okay"; 477e7a09590STomeu Vizoso 478e7a09590STomeu Vizoso fusb0: typec-portc@22 { 479e7a09590STomeu Vizoso compatible = "fcs,fusb302"; 480e7a09590STomeu Vizoso reg = <0x22>; 481e7a09590STomeu Vizoso interrupt-parent = <&gpio1>; 482e7a09590STomeu Vizoso interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>; 483e7a09590STomeu Vizoso pinctrl-names = "default"; 484e7a09590STomeu Vizoso pinctrl-0 = <&fusb0_int>; 485e7a09590STomeu Vizoso vbus-supply = <&vbus_typec>; 486e7a09590STomeu Vizoso }; 487e7a09590STomeu Vizoso}; 488e7a09590STomeu Vizoso 489e7a09590STomeu Vizoso&i2c7 { 490e7a09590STomeu Vizoso status = "okay"; 491e7a09590STomeu Vizoso}; 492e7a09590STomeu Vizoso 493f94ffd95SRobin Murphy&i2s2 { 494f94ffd95SRobin Murphy status = "okay"; 495f94ffd95SRobin Murphy}; 496f94ffd95SRobin Murphy 497e7a09590STomeu Vizoso&io_domains { 498e7a09590STomeu Vizoso bt656-supply = <&vcc_1v8>; 499e7a09590STomeu Vizoso audio-supply = <&vcca1v8_codec>; 500e7a09590STomeu Vizoso sdmmc-supply = <&vcc_sdio>; 501e7a09590STomeu Vizoso gpio1830-supply = <&vcc_3v0>; 502e7a09590STomeu Vizoso status = "okay"; 503e7a09590STomeu Vizoso}; 504e7a09590STomeu Vizoso 505e7a09590STomeu Vizoso&pcie_phy { 506e7a09590STomeu Vizoso assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>; 507e7a09590STomeu Vizoso assigned-clock-rates = <100000000>; 508e7a09590STomeu Vizoso assigned-clocks = <&cru SCLK_PCIEPHY_REF>; 509e7a09590STomeu Vizoso status = "okay"; 510e7a09590STomeu Vizoso}; 511e7a09590STomeu Vizoso 512e7a09590STomeu Vizoso&pcie0 { 513876816b2SRobin Murphy num-lanes = <2>; 514876816b2SRobin Murphy vpcie0v9-supply = <&vcca0v9_s3>; 515876816b2SRobin Murphy vpcie1v8-supply = <&vcca1v8_s3>; 516e7a09590STomeu Vizoso status = "okay"; 517e7a09590STomeu Vizoso}; 518e7a09590STomeu Vizoso 519e7a09590STomeu Vizoso&pinctrl { 520e7a09590STomeu Vizoso fusb30x { 521e7a09590STomeu Vizoso fusb0_int: fusb0-int { 522e7a09590STomeu Vizoso rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; 523e7a09590STomeu Vizoso }; 524e7a09590STomeu Vizoso }; 525e7a09590STomeu Vizoso 526e7a09590STomeu Vizoso gpio-leds { 5276dd5e12cSJohan Jonker status_led_pin: status-led-pin { 528e7a09590STomeu Vizoso rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; 529e7a09590STomeu Vizoso }; 530e7a09590STomeu Vizoso }; 531e7a09590STomeu Vizoso 532737157f9SJohan Jonker gmac { 5331a4e6203SRobin Murphy phy_intb: phy-intb { 5341a4e6203SRobin Murphy rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; 5351a4e6203SRobin Murphy }; 5361a4e6203SRobin Murphy 5371a4e6203SRobin Murphy phy_rstb: phy-rstb { 5381a4e6203SRobin Murphy rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 5391a4e6203SRobin Murphy }; 5401a4e6203SRobin Murphy }; 5411a4e6203SRobin Murphy 542e7a09590STomeu Vizoso pmic { 543e7a09590STomeu Vizoso cpu_b_sleep: cpu-b-sleep { 544e7a09590STomeu Vizoso rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; 545e7a09590STomeu Vizoso }; 546e7a09590STomeu Vizoso 547e7a09590STomeu Vizoso gpu_sleep: gpu-sleep { 548e7a09590STomeu Vizoso rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; 549e7a09590STomeu Vizoso }; 550e7a09590STomeu Vizoso 551e7a09590STomeu Vizoso pmic_int_l: pmic-int-l { 552e7a09590STomeu Vizoso rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; 553e7a09590STomeu Vizoso }; 554e7a09590STomeu Vizoso }; 555e7a09590STomeu Vizoso 556e7a09590STomeu Vizoso rockchip-key { 557e7a09590STomeu Vizoso power_key: power-key { 558e7a09590STomeu Vizoso rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; 559e7a09590STomeu Vizoso }; 560e7a09590STomeu Vizoso }; 561e7a09590STomeu Vizoso 5623e2f0bb7SRobin Murphy sdio { 5633e2f0bb7SRobin Murphy bt_host_wake_l: bt-host-wake-l { 5643e2f0bb7SRobin Murphy rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 5653e2f0bb7SRobin Murphy }; 5663e2f0bb7SRobin Murphy 5673e2f0bb7SRobin Murphy bt_reg_on_h: bt-reg-on-h { 5683e2f0bb7SRobin Murphy /* external pullup to VCC1V8_PMUPLL */ 5693e2f0bb7SRobin Murphy rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 5703e2f0bb7SRobin Murphy }; 5713e2f0bb7SRobin Murphy 5723e2f0bb7SRobin Murphy bt_wake_l: bt-wake-l { 5733e2f0bb7SRobin Murphy rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; 5743e2f0bb7SRobin Murphy }; 5753e2f0bb7SRobin Murphy 576e7a09590STomeu Vizoso wifi_reg_on_h: wifi-reg_on-h { 577e7a09590STomeu Vizoso rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 578e7a09590STomeu Vizoso }; 579e7a09590STomeu Vizoso }; 58010f595eeSRobin Murphy 58110f595eeSRobin Murphy sdmmc { 58210f595eeSRobin Murphy sdmmc0_det_l: sdmmc0-det-l { 58310f595eeSRobin Murphy rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; 58410f595eeSRobin Murphy }; 58510f595eeSRobin Murphy 58610f595eeSRobin Murphy sdmmc0_pwr_h: sdmmc0-pwr-h { 58710f595eeSRobin Murphy rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; 58810f595eeSRobin Murphy }; 58910f595eeSRobin Murphy }; 590e7a09590STomeu Vizoso}; 591e7a09590STomeu Vizoso 592e7a09590STomeu Vizoso&pmu_io_domains { 593e7a09590STomeu Vizoso pmu1830-supply = <&vcc_3v0>; 594e7a09590STomeu Vizoso status = "okay"; 595e7a09590STomeu Vizoso}; 596e7a09590STomeu Vizoso 597e7a09590STomeu Vizoso&pwm0 { 598e7a09590STomeu Vizoso status = "okay"; 599e7a09590STomeu Vizoso}; 600e7a09590STomeu Vizoso 601e7a09590STomeu Vizoso&pwm1 { 602e7a09590STomeu Vizoso status = "okay"; 603e7a09590STomeu Vizoso}; 604e7a09590STomeu Vizoso 605e7a09590STomeu Vizoso&pwm2 { 606e7a09590STomeu Vizoso pinctrl-names = "active"; 607e7a09590STomeu Vizoso pinctrl-0 = <&pwm2_pin_pull_down>; 608e7a09590STomeu Vizoso status = "okay"; 609e7a09590STomeu Vizoso}; 610e7a09590STomeu Vizoso 611e7a09590STomeu Vizoso&saradc { 612e7a09590STomeu Vizoso vref-supply = <&vcca1v8_s3>; 613e7a09590STomeu Vizoso status = "okay"; 614e7a09590STomeu Vizoso}; 615e7a09590STomeu Vizoso 616e7a09590STomeu Vizoso&sdhci { 617e7a09590STomeu Vizoso bus-width = <8>; 618c62ffaf5SRobin Murphy mmc-hs200-1_8v; 619e7a09590STomeu Vizoso non-removable; 620e7a09590STomeu Vizoso status = "okay"; 621e7a09590STomeu Vizoso}; 622e7a09590STomeu Vizoso 623e7a09590STomeu Vizoso&sdio0 { 624e7a09590STomeu Vizoso bus-width = <4>; 625e7a09590STomeu Vizoso cap-sd-highspeed; 626e7a09590STomeu Vizoso cap-sdio-irq; 627e7a09590STomeu Vizoso keep-power-in-suspend; 628e7a09590STomeu Vizoso mmc-pwrseq = <&sdio_pwrseq>; 629e7a09590STomeu Vizoso non-removable; 630e7a09590STomeu Vizoso pinctrl-names = "default"; 631e7a09590STomeu Vizoso pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; 632e7a09590STomeu Vizoso sd-uhs-sdr104; 633e7a09590STomeu Vizoso status = "okay"; 634e7a09590STomeu Vizoso}; 635e7a09590STomeu Vizoso 636e7a09590STomeu Vizoso&sdmmc { 637e7a09590STomeu Vizoso bus-width = <4>; 638e7a09590STomeu Vizoso cap-sd-highspeed; 639e7a09590STomeu Vizoso cap-mmc-highspeed; 64010f595eeSRobin Murphy cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; 641e7a09590STomeu Vizoso disable-wp; 642e7a09590STomeu Vizoso pinctrl-names = "default"; 64310f595eeSRobin Murphy pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc0_det_l>; 644e7a09590STomeu Vizoso sd-uhs-sdr104; 645e7a09590STomeu Vizoso vmmc-supply = <&vcc3v0_sd>; 646e7a09590STomeu Vizoso vqmmc-supply = <&vcc_sdio>; 647e7a09590STomeu Vizoso status = "okay"; 648e7a09590STomeu Vizoso}; 649e7a09590STomeu Vizoso 650e7a09590STomeu Vizoso&tcphy0 { 651e7a09590STomeu Vizoso status = "okay"; 652e7a09590STomeu Vizoso}; 653e7a09590STomeu Vizoso 654e7a09590STomeu Vizoso&tcphy1 { 655e7a09590STomeu Vizoso status = "okay"; 656e7a09590STomeu Vizoso}; 657e7a09590STomeu Vizoso 658e7a09590STomeu Vizoso&tsadc { 659e7a09590STomeu Vizoso /* tshut mode 0:CRU 1:GPIO */ 660e7a09590STomeu Vizoso rockchip,hw-tshut-mode = <1>; 661e7a09590STomeu Vizoso /* tshut polarity 0:LOW 1:HIGH */ 662e7a09590STomeu Vizoso rockchip,hw-tshut-polarity = <1>; 663e7a09590STomeu Vizoso status = "okay"; 664e7a09590STomeu Vizoso}; 665e7a09590STomeu Vizoso 666e7a09590STomeu Vizoso&u2phy0 { 667e7a09590STomeu Vizoso status = "okay"; 668e7a09590STomeu Vizoso}; 669e7a09590STomeu Vizoso 670e7a09590STomeu Vizoso&u2phy0_host { 671e7a09590STomeu Vizoso status = "okay"; 672e7a09590STomeu Vizoso}; 673e7a09590STomeu Vizoso 674e7a09590STomeu Vizoso&u2phy0_otg { 675e7a09590STomeu Vizoso status = "okay"; 676e7a09590STomeu Vizoso}; 677e7a09590STomeu Vizoso 678e7a09590STomeu Vizoso&u2phy1 { 679e7a09590STomeu Vizoso status = "okay"; 680e7a09590STomeu Vizoso}; 681e7a09590STomeu Vizoso 682e7a09590STomeu Vizoso&u2phy1_host { 683e7a09590STomeu Vizoso status = "okay"; 684e7a09590STomeu Vizoso}; 685e7a09590STomeu Vizoso 686e7a09590STomeu Vizoso&u2phy1_otg { 687e7a09590STomeu Vizoso status = "okay"; 688e7a09590STomeu Vizoso}; 689e7a09590STomeu Vizoso 690e7a09590STomeu Vizoso&uart0 { 691e7a09590STomeu Vizoso pinctrl-names = "default"; 692e7a09590STomeu Vizoso pinctrl-0 = <&uart0_xfer &uart0_rts &uart0_cts>; 693e7a09590STomeu Vizoso status = "okay"; 6943e2f0bb7SRobin Murphy 6953e2f0bb7SRobin Murphy bluetooth { 6963e2f0bb7SRobin Murphy compatible = "brcm,bcm43438-bt"; 6973e2f0bb7SRobin Murphy clocks = <&rk808 1>; 6983e2f0bb7SRobin Murphy clock-names = "lpo"; 6993e2f0bb7SRobin Murphy device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; 7003e2f0bb7SRobin Murphy host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; 7013e2f0bb7SRobin Murphy shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; 7023e2f0bb7SRobin Murphy max-speed = <4000000>; 7033e2f0bb7SRobin Murphy pinctrl-names = "default"; 7043e2f0bb7SRobin Murphy pinctrl-0 = <&bt_reg_on_h &bt_host_wake_l &bt_wake_l>; 7053e2f0bb7SRobin Murphy vbat-supply = <&vcc3v3_sys>; 7063e2f0bb7SRobin Murphy vddio-supply = <&vcc_1v8>; 7073e2f0bb7SRobin Murphy }; 708e7a09590STomeu Vizoso}; 709e7a09590STomeu Vizoso 710e7a09590STomeu Vizoso&uart2 { 711e7a09590STomeu Vizoso status = "okay"; 712e7a09590STomeu Vizoso}; 713e7a09590STomeu Vizoso 714e7a09590STomeu Vizoso&usbdrd3_0 { 715e7a09590STomeu Vizoso status = "okay"; 716e7a09590STomeu Vizoso}; 717e7a09590STomeu Vizoso 718e7a09590STomeu Vizoso&usbdrd3_1 { 719e7a09590STomeu Vizoso status = "okay"; 720e7a09590STomeu Vizoso}; 721e7a09590STomeu Vizoso 722e7a09590STomeu Vizoso&usbdrd_dwc3_0 { 723e7a09590STomeu Vizoso status = "okay"; 724e7a09590STomeu Vizoso}; 725e7a09590STomeu Vizoso 726e7a09590STomeu Vizoso&usbdrd_dwc3_1 { 727e7a09590STomeu Vizoso dr_mode = "host"; 728e7a09590STomeu Vizoso status = "okay"; 729e7a09590STomeu Vizoso}; 730e7a09590STomeu Vizoso 731e7a09590STomeu Vizoso&usb_host0_ehci { 732e7a09590STomeu Vizoso status = "okay"; 733e7a09590STomeu Vizoso}; 734e7a09590STomeu Vizoso 735e7a09590STomeu Vizoso&usb_host0_ohci { 736e7a09590STomeu Vizoso status = "okay"; 737e7a09590STomeu Vizoso}; 738e7a09590STomeu Vizoso 739e7a09590STomeu Vizoso&usb_host1_ehci { 740e7a09590STomeu Vizoso status = "okay"; 741e7a09590STomeu Vizoso}; 742e7a09590STomeu Vizoso 743e7a09590STomeu Vizoso&usb_host1_ohci { 744e7a09590STomeu Vizoso status = "okay"; 745e7a09590STomeu Vizoso}; 746e7a09590STomeu Vizoso 747e7a09590STomeu Vizoso&vopb { 748e7a09590STomeu Vizoso status = "okay"; 749e7a09590STomeu Vizoso}; 750e7a09590STomeu Vizoso 751e7a09590STomeu Vizoso&vopb_mmu { 752e7a09590STomeu Vizoso status = "okay"; 753e7a09590STomeu Vizoso}; 754e7a09590STomeu Vizoso 755e7a09590STomeu Vizoso&vopl { 756e7a09590STomeu Vizoso status = "okay"; 757e7a09590STomeu Vizoso}; 758e7a09590STomeu Vizoso 759e7a09590STomeu Vizoso&vopl_mmu { 760e7a09590STomeu Vizoso status = "okay"; 761e7a09590STomeu Vizoso}; 762