1e7a09590STomeu Vizoso// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2e7a09590STomeu Vizoso/*
3e7a09590STomeu Vizoso * RK3399-based FriendlyElec boards device tree source
4e7a09590STomeu Vizoso *
5e7a09590STomeu Vizoso * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
6e7a09590STomeu Vizoso *
7e7a09590STomeu Vizoso * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
8e7a09590STomeu Vizoso * (http://www.friendlyarm.com)
9e7a09590STomeu Vizoso *
10e7a09590STomeu Vizoso * Copyright (c) 2018 Collabora Ltd.
11e7a09590STomeu Vizoso * Copyright (c) 2019 Arm Ltd.
12e7a09590STomeu Vizoso */
13e7a09590STomeu Vizoso
14e7a09590STomeu Vizoso/dts-v1/;
15e7a09590STomeu Vizoso#include <dt-bindings/input/linux-event-codes.h>
16e7a09590STomeu Vizoso#include "rk3399.dtsi"
17e7a09590STomeu Vizoso#include "rk3399-opp.dtsi"
18e7a09590STomeu Vizoso
19e7a09590STomeu Vizoso/ {
20e7a09590STomeu Vizoso	chosen {
21e7a09590STomeu Vizoso		stdout-path = "serial2:1500000n8";
22e7a09590STomeu Vizoso	};
23e7a09590STomeu Vizoso
24e7a09590STomeu Vizoso	clkin_gmac: external-gmac-clock {
25e7a09590STomeu Vizoso		compatible = "fixed-clock";
26e7a09590STomeu Vizoso		clock-frequency = <125000000>;
27e7a09590STomeu Vizoso		clock-output-names = "clkin_gmac";
28e7a09590STomeu Vizoso		#clock-cells = <0>;
29e7a09590STomeu Vizoso	};
30e7a09590STomeu Vizoso
31e7a09590STomeu Vizoso	vcc3v3_sys: vcc3v3-sys {
32e7a09590STomeu Vizoso		compatible = "regulator-fixed";
33e7a09590STomeu Vizoso		regulator-always-on;
34e7a09590STomeu Vizoso		regulator-boot-on;
35e7a09590STomeu Vizoso		regulator-min-microvolt = <3300000>;
36e7a09590STomeu Vizoso		regulator-max-microvolt = <3300000>;
37e7a09590STomeu Vizoso		regulator-name = "vcc3v3_sys";
38e7a09590STomeu Vizoso	};
39e7a09590STomeu Vizoso
40e7a09590STomeu Vizoso	vcc5v0_sys: vcc5v0-sys {
41e7a09590STomeu Vizoso		compatible = "regulator-fixed";
42e7a09590STomeu Vizoso		regulator-always-on;
43e7a09590STomeu Vizoso		regulator-boot-on;
44e7a09590STomeu Vizoso		regulator-min-microvolt = <5000000>;
45e7a09590STomeu Vizoso		regulator-max-microvolt = <5000000>;
46e7a09590STomeu Vizoso		regulator-name = "vcc5v0_sys";
47e7a09590STomeu Vizoso		vin-supply = <&vdd_5v>;
48e7a09590STomeu Vizoso	};
49e7a09590STomeu Vizoso
50e7a09590STomeu Vizoso	/* switched by pmic_sleep */
51e7a09590STomeu Vizoso	vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
52e7a09590STomeu Vizoso		compatible = "regulator-fixed";
53e7a09590STomeu Vizoso		regulator-always-on;
54e7a09590STomeu Vizoso		regulator-boot-on;
55e7a09590STomeu Vizoso		regulator-min-microvolt = <1800000>;
56e7a09590STomeu Vizoso		regulator-max-microvolt = <1800000>;
57e7a09590STomeu Vizoso		regulator-name = "vcc1v8_s3";
58e7a09590STomeu Vizoso		vin-supply = <&vcc_1v8>;
59e7a09590STomeu Vizoso	};
60e7a09590STomeu Vizoso
61e7a09590STomeu Vizoso	vcc3v0_sd: vcc3v0-sd {
62e7a09590STomeu Vizoso		compatible = "regulator-fixed";
63e7a09590STomeu Vizoso		enable-active-high;
64e7a09590STomeu Vizoso		gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
65e7a09590STomeu Vizoso		pinctrl-names = "default";
66e7a09590STomeu Vizoso		pinctrl-0 = <&sdmmc0_pwr_h>;
67e7a09590STomeu Vizoso		regulator-always-on;
68e7a09590STomeu Vizoso		regulator-min-microvolt = <3000000>;
69e7a09590STomeu Vizoso		regulator-max-microvolt = <3000000>;
70e7a09590STomeu Vizoso		regulator-name = "vcc3v0_sd";
71e7a09590STomeu Vizoso		vin-supply = <&vcc3v3_sys>;
72e7a09590STomeu Vizoso	};
73e7a09590STomeu Vizoso
74e7a09590STomeu Vizoso	vbus_typec: vbus-typec {
75e7a09590STomeu Vizoso		compatible = "regulator-fixed";
76e7a09590STomeu Vizoso		regulator-min-microvolt = <5000000>;
77e7a09590STomeu Vizoso		regulator-max-microvolt = <5000000>;
78e7a09590STomeu Vizoso		regulator-name = "vbus_typec";
79e7a09590STomeu Vizoso	};
80e7a09590STomeu Vizoso
81e7a09590STomeu Vizoso	gpio-keys {
82e7a09590STomeu Vizoso		compatible = "gpio-keys";
83e7a09590STomeu Vizoso		autorepeat;
84e7a09590STomeu Vizoso		pinctrl-names = "default";
85e7a09590STomeu Vizoso		pinctrl-0 = <&power_key>;
86e7a09590STomeu Vizoso
87e7a09590STomeu Vizoso		power {
88e7a09590STomeu Vizoso			debounce-interval = <100>;
89e7a09590STomeu Vizoso			gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
90e7a09590STomeu Vizoso			label = "GPIO Key Power";
91e7a09590STomeu Vizoso			linux,code = <KEY_POWER>;
92e7a09590STomeu Vizoso			wakeup-source;
93e7a09590STomeu Vizoso		};
94e7a09590STomeu Vizoso	};
95e7a09590STomeu Vizoso
96e7a09590STomeu Vizoso	leds: gpio-leds {
97e7a09590STomeu Vizoso		compatible = "gpio-leds";
98e7a09590STomeu Vizoso		pinctrl-names = "default";
99e7a09590STomeu Vizoso		pinctrl-0 = <&leds_gpio>;
100e7a09590STomeu Vizoso
101e7a09590STomeu Vizoso		status {
102e7a09590STomeu Vizoso			gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
103e7a09590STomeu Vizoso			label = "status_led";
104e7a09590STomeu Vizoso			linux,default-trigger = "heartbeat";
105e7a09590STomeu Vizoso		};
106e7a09590STomeu Vizoso	};
107e7a09590STomeu Vizoso
108e7a09590STomeu Vizoso	sdio_pwrseq: sdio-pwrseq {
109e7a09590STomeu Vizoso		compatible = "mmc-pwrseq-simple";
110e7a09590STomeu Vizoso		clocks = <&rk808 1>;
111e7a09590STomeu Vizoso		clock-names = "ext_clock";
112e7a09590STomeu Vizoso		pinctrl-names = "default";
113e7a09590STomeu Vizoso		pinctrl-0 = <&wifi_reg_on_h>;
114e7a09590STomeu Vizoso		reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
115e7a09590STomeu Vizoso	};
116e7a09590STomeu Vizoso};
117e7a09590STomeu Vizoso
118e7a09590STomeu Vizoso&cpu_b0 {
119e7a09590STomeu Vizoso	cpu-supply = <&vdd_cpu_b>;
120e7a09590STomeu Vizoso};
121e7a09590STomeu Vizoso
122e7a09590STomeu Vizoso&cpu_b1 {
123e7a09590STomeu Vizoso	cpu-supply = <&vdd_cpu_b>;
124e7a09590STomeu Vizoso};
125e7a09590STomeu Vizoso
126e7a09590STomeu Vizoso&cpu_l0 {
127e7a09590STomeu Vizoso	cpu-supply = <&vdd_cpu_l>;
128e7a09590STomeu Vizoso};
129e7a09590STomeu Vizoso
130e7a09590STomeu Vizoso&cpu_l1 {
131e7a09590STomeu Vizoso	cpu-supply = <&vdd_cpu_l>;
132e7a09590STomeu Vizoso};
133e7a09590STomeu Vizoso
134e7a09590STomeu Vizoso&cpu_l2 {
135e7a09590STomeu Vizoso	cpu-supply = <&vdd_cpu_l>;
136e7a09590STomeu Vizoso};
137e7a09590STomeu Vizoso
138e7a09590STomeu Vizoso&cpu_l3 {
139e7a09590STomeu Vizoso	cpu-supply = <&vdd_cpu_l>;
140e7a09590STomeu Vizoso};
141e7a09590STomeu Vizoso
142e7a09590STomeu Vizoso&emmc_phy {
143e7a09590STomeu Vizoso	status = "okay";
144e7a09590STomeu Vizoso};
145e7a09590STomeu Vizoso
146e7a09590STomeu Vizoso&gmac {
147e7a09590STomeu Vizoso	assigned-clock-parents = <&clkin_gmac>;
148e7a09590STomeu Vizoso	assigned-clocks = <&cru SCLK_RMII_SRC>;
149e7a09590STomeu Vizoso	clock_in_out = "input";
150e7a09590STomeu Vizoso	pinctrl-names = "default";
1511a4e6203SRobin Murphy	pinctrl-0 = <&rgmii_pins>, <&phy_intb>, <&phy_rstb>;
1521a4e6203SRobin Murphy	phy-handle = <&rtl8211e>;
153e7a09590STomeu Vizoso	phy-mode = "rgmii";
154e7a09590STomeu Vizoso	phy-supply = <&vcc3v3_s3>;
155e7a09590STomeu Vizoso	snps,reset-active-low;
1561a4e6203SRobin Murphy	snps,reset-delays-us = <0 10000 30000>;
157e7a09590STomeu Vizoso	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
158e7a09590STomeu Vizoso	tx_delay = <0x28>;
159e7a09590STomeu Vizoso	rx_delay = <0x11>;
160e7a09590STomeu Vizoso	status = "okay";
1611a4e6203SRobin Murphy
1621a4e6203SRobin Murphy	mdio {
1631a4e6203SRobin Murphy		compatible = "snps,dwmac-mdio";
1641a4e6203SRobin Murphy		#address-cells = <1>;
1651a4e6203SRobin Murphy		#size-cells = <0>;
1661a4e6203SRobin Murphy
1671a4e6203SRobin Murphy		rtl8211e: phy@1 {
1681a4e6203SRobin Murphy			reg = <1>;
1691a4e6203SRobin Murphy			interrupt-parent = <&gpio3>;
1701a4e6203SRobin Murphy			interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
1711a4e6203SRobin Murphy		};
1721a4e6203SRobin Murphy	};
173e7a09590STomeu Vizoso};
174e7a09590STomeu Vizoso
175e7a09590STomeu Vizoso&gpu {
176e7a09590STomeu Vizoso	mali-supply = <&vdd_gpu>;
177e7a09590STomeu Vizoso	status = "okay";
178e7a09590STomeu Vizoso};
179e7a09590STomeu Vizoso
180e7a09590STomeu Vizoso&hdmi {
181e7a09590STomeu Vizoso	ddc-i2c-bus = <&i2c7>;
182e7a09590STomeu Vizoso	pinctrl-names = "default";
183e7a09590STomeu Vizoso	pinctrl-0 = <&hdmi_cec>;
184e7a09590STomeu Vizoso	status = "okay";
185e7a09590STomeu Vizoso};
186e7a09590STomeu Vizoso
187e7a09590STomeu Vizoso&i2c0 {
188e7a09590STomeu Vizoso	clock-frequency = <400000>;
189e7a09590STomeu Vizoso	i2c-scl-rising-time-ns = <160>;
190e7a09590STomeu Vizoso	i2c-scl-falling-time-ns = <30>;
191e7a09590STomeu Vizoso	status = "okay";
192e7a09590STomeu Vizoso
193e7a09590STomeu Vizoso	vdd_cpu_b: regulator@40 {
194e7a09590STomeu Vizoso		compatible = "silergy,syr827";
195e7a09590STomeu Vizoso		reg = <0x40>;
196e7a09590STomeu Vizoso		fcs,suspend-voltage-selector = <1>;
197e7a09590STomeu Vizoso		pinctrl-names = "default";
198e7a09590STomeu Vizoso		pinctrl-0 = <&cpu_b_sleep>;
199e7a09590STomeu Vizoso		regulator-always-on;
200e7a09590STomeu Vizoso		regulator-boot-on;
201e7a09590STomeu Vizoso		regulator-min-microvolt = <712500>;
202e7a09590STomeu Vizoso		regulator-max-microvolt = <1500000>;
203e7a09590STomeu Vizoso		regulator-name = "vdd_cpu_b";
204e7a09590STomeu Vizoso		regulator-ramp-delay = <1000>;
205e7a09590STomeu Vizoso		vin-supply = <&vcc3v3_sys>;
206e7a09590STomeu Vizoso
207e7a09590STomeu Vizoso		regulator-state-mem {
208e7a09590STomeu Vizoso			regulator-off-in-suspend;
209e7a09590STomeu Vizoso		};
210e7a09590STomeu Vizoso	};
211e7a09590STomeu Vizoso
212e7a09590STomeu Vizoso	vdd_gpu: regulator@41 {
213e7a09590STomeu Vizoso		compatible = "silergy,syr828";
214e7a09590STomeu Vizoso		reg = <0x41>;
215e7a09590STomeu Vizoso		fcs,suspend-voltage-selector = <1>;
216e7a09590STomeu Vizoso		pinctrl-names = "default";
217e7a09590STomeu Vizoso		pinctrl-0 = <&gpu_sleep>;
218e7a09590STomeu Vizoso		regulator-always-on;
219e7a09590STomeu Vizoso		regulator-boot-on;
220e7a09590STomeu Vizoso		regulator-min-microvolt = <712500>;
221e7a09590STomeu Vizoso		regulator-max-microvolt = <1500000>;
222e7a09590STomeu Vizoso		regulator-name = "vdd_gpu";
223e7a09590STomeu Vizoso		regulator-ramp-delay = <1000>;
224e7a09590STomeu Vizoso		vin-supply = <&vcc3v3_sys>;
225e7a09590STomeu Vizoso
226e7a09590STomeu Vizoso		regulator-state-mem {
227e7a09590STomeu Vizoso			regulator-off-in-suspend;
228e7a09590STomeu Vizoso		};
229e7a09590STomeu Vizoso	};
230e7a09590STomeu Vizoso
231e7a09590STomeu Vizoso	rk808: pmic@1b {
232e7a09590STomeu Vizoso		compatible = "rockchip,rk808";
233e7a09590STomeu Vizoso		reg = <0x1b>;
2343e2f0bb7SRobin Murphy		clock-output-names = "xin32k", "rtc_clko_wifi";
235e7a09590STomeu Vizoso		#clock-cells = <1>;
236e7a09590STomeu Vizoso		interrupt-parent = <&gpio1>;
237e7a09590STomeu Vizoso		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
238e7a09590STomeu Vizoso		pinctrl-names = "default";
239e7a09590STomeu Vizoso		pinctrl-0 = <&pmic_int_l>;
240e7a09590STomeu Vizoso		rockchip,system-power-controller;
241e7a09590STomeu Vizoso		wakeup-source;
242e7a09590STomeu Vizoso
243e7a09590STomeu Vizoso		vcc1-supply = <&vcc3v3_sys>;
244e7a09590STomeu Vizoso		vcc2-supply = <&vcc3v3_sys>;
245e7a09590STomeu Vizoso		vcc3-supply = <&vcc3v3_sys>;
246e7a09590STomeu Vizoso		vcc4-supply = <&vcc3v3_sys>;
247e7a09590STomeu Vizoso		vcc6-supply = <&vcc3v3_sys>;
248e7a09590STomeu Vizoso		vcc7-supply = <&vcc3v3_sys>;
249e7a09590STomeu Vizoso		vcc8-supply = <&vcc3v3_sys>;
250e7a09590STomeu Vizoso		vcc9-supply = <&vcc3v3_sys>;
251e7a09590STomeu Vizoso		vcc10-supply = <&vcc3v3_sys>;
252e7a09590STomeu Vizoso		vcc11-supply = <&vcc3v3_sys>;
253e7a09590STomeu Vizoso		vcc12-supply = <&vcc3v3_sys>;
254e7a09590STomeu Vizoso		vddio-supply = <&vcc_3v0>;
255e7a09590STomeu Vizoso
256e7a09590STomeu Vizoso		regulators {
257e7a09590STomeu Vizoso			vdd_center: DCDC_REG1 {
258e7a09590STomeu Vizoso				regulator-always-on;
259e7a09590STomeu Vizoso				regulator-boot-on;
260e7a09590STomeu Vizoso				regulator-min-microvolt = <750000>;
261e7a09590STomeu Vizoso				regulator-max-microvolt = <1350000>;
262e7a09590STomeu Vizoso				regulator-name = "vdd_center";
263e7a09590STomeu Vizoso				regulator-ramp-delay = <6001>;
264e7a09590STomeu Vizoso
265e7a09590STomeu Vizoso				regulator-state-mem {
266e7a09590STomeu Vizoso					regulator-off-in-suspend;
267e7a09590STomeu Vizoso				};
268e7a09590STomeu Vizoso			};
269e7a09590STomeu Vizoso
270e7a09590STomeu Vizoso			vdd_cpu_l: DCDC_REG2 {
271e7a09590STomeu Vizoso				regulator-always-on;
272e7a09590STomeu Vizoso				regulator-boot-on;
273e7a09590STomeu Vizoso				regulator-min-microvolt = <750000>;
274e7a09590STomeu Vizoso				regulator-max-microvolt = <1350000>;
275e7a09590STomeu Vizoso				regulator-name = "vdd_cpu_l";
276e7a09590STomeu Vizoso				regulator-ramp-delay = <6001>;
277e7a09590STomeu Vizoso
278e7a09590STomeu Vizoso				regulator-state-mem {
279e7a09590STomeu Vizoso					regulator-off-in-suspend;
280e7a09590STomeu Vizoso				};
281e7a09590STomeu Vizoso			};
282e7a09590STomeu Vizoso
283e7a09590STomeu Vizoso			vcc_ddr: DCDC_REG3 {
284e7a09590STomeu Vizoso				regulator-always-on;
285e7a09590STomeu Vizoso				regulator-boot-on;
286e7a09590STomeu Vizoso				regulator-name = "vcc_ddr";
287e7a09590STomeu Vizoso
288e7a09590STomeu Vizoso				regulator-state-mem {
289e7a09590STomeu Vizoso					regulator-on-in-suspend;
290e7a09590STomeu Vizoso				};
291e7a09590STomeu Vizoso			};
292e7a09590STomeu Vizoso
293e7a09590STomeu Vizoso			vcc_1v8: DCDC_REG4 {
294e7a09590STomeu Vizoso				regulator-always-on;
295e7a09590STomeu Vizoso				regulator-boot-on;
296e7a09590STomeu Vizoso				regulator-min-microvolt = <1800000>;
297e7a09590STomeu Vizoso				regulator-max-microvolt = <1800000>;
298e7a09590STomeu Vizoso				regulator-name = "vcc_1v8";
299e7a09590STomeu Vizoso
300e7a09590STomeu Vizoso				regulator-state-mem {
301e7a09590STomeu Vizoso					regulator-on-in-suspend;
302e7a09590STomeu Vizoso					regulator-suspend-microvolt = <1800000>;
303e7a09590STomeu Vizoso				};
304e7a09590STomeu Vizoso			};
305e7a09590STomeu Vizoso
306e7a09590STomeu Vizoso			vcc1v8_cam: LDO_REG1 {
307e7a09590STomeu Vizoso				regulator-always-on;
308e7a09590STomeu Vizoso				regulator-boot-on;
309e7a09590STomeu Vizoso				regulator-min-microvolt = <1800000>;
310e7a09590STomeu Vizoso				regulator-max-microvolt = <1800000>;
311e7a09590STomeu Vizoso				regulator-name = "vcc1v8_cam";
312e7a09590STomeu Vizoso
313e7a09590STomeu Vizoso				regulator-state-mem {
314e7a09590STomeu Vizoso					regulator-off-in-suspend;
315e7a09590STomeu Vizoso				};
316e7a09590STomeu Vizoso			};
317e7a09590STomeu Vizoso
318e7a09590STomeu Vizoso			vcc3v0_touch: LDO_REG2 {
319e7a09590STomeu Vizoso				regulator-always-on;
320e7a09590STomeu Vizoso				regulator-boot-on;
321e7a09590STomeu Vizoso				regulator-min-microvolt = <3000000>;
322e7a09590STomeu Vizoso				regulator-max-microvolt = <3000000>;
323e7a09590STomeu Vizoso				regulator-name = "vcc3v0_touch";
324e7a09590STomeu Vizoso
325e7a09590STomeu Vizoso				regulator-state-mem {
326e7a09590STomeu Vizoso					regulator-off-in-suspend;
327e7a09590STomeu Vizoso				};
328e7a09590STomeu Vizoso			};
329e7a09590STomeu Vizoso
330e7a09590STomeu Vizoso			vcc1v8_pmupll: LDO_REG3 {
331e7a09590STomeu Vizoso				regulator-always-on;
332e7a09590STomeu Vizoso				regulator-boot-on;
333e7a09590STomeu Vizoso				regulator-min-microvolt = <1800000>;
334e7a09590STomeu Vizoso				regulator-max-microvolt = <1800000>;
335e7a09590STomeu Vizoso				regulator-name = "vcc1v8_pmupll";
336e7a09590STomeu Vizoso
337e7a09590STomeu Vizoso				regulator-state-mem {
338e7a09590STomeu Vizoso					regulator-on-in-suspend;
339e7a09590STomeu Vizoso					regulator-suspend-microvolt = <1800000>;
340e7a09590STomeu Vizoso				};
341e7a09590STomeu Vizoso			};
342e7a09590STomeu Vizoso
343e7a09590STomeu Vizoso			vcc_sdio: LDO_REG4 {
344e7a09590STomeu Vizoso				regulator-always-on;
345e7a09590STomeu Vizoso				regulator-boot-on;
346e7a09590STomeu Vizoso				regulator-init-microvolt = <3000000>;
347e7a09590STomeu Vizoso				regulator-min-microvolt = <1800000>;
348e7a09590STomeu Vizoso				regulator-max-microvolt = <3300000>;
349e7a09590STomeu Vizoso				regulator-name = "vcc_sdio";
350e7a09590STomeu Vizoso
351e7a09590STomeu Vizoso				regulator-state-mem {
352e7a09590STomeu Vizoso					regulator-on-in-suspend;
353e7a09590STomeu Vizoso					regulator-suspend-microvolt = <3000000>;
354e7a09590STomeu Vizoso				};
355e7a09590STomeu Vizoso			};
356e7a09590STomeu Vizoso
357e7a09590STomeu Vizoso			vcca3v0_codec: LDO_REG5 {
358e7a09590STomeu Vizoso				regulator-always-on;
359e7a09590STomeu Vizoso				regulator-boot-on;
360e7a09590STomeu Vizoso				regulator-min-microvolt = <3000000>;
361e7a09590STomeu Vizoso				regulator-max-microvolt = <3000000>;
362e7a09590STomeu Vizoso				regulator-name = "vcca3v0_codec";
363e7a09590STomeu Vizoso
364e7a09590STomeu Vizoso				regulator-state-mem {
365e7a09590STomeu Vizoso					regulator-off-in-suspend;
366e7a09590STomeu Vizoso				};
367e7a09590STomeu Vizoso			};
368e7a09590STomeu Vizoso
369e7a09590STomeu Vizoso			vcc_1v5: LDO_REG6 {
370e7a09590STomeu Vizoso				regulator-always-on;
371e7a09590STomeu Vizoso				regulator-boot-on;
372e7a09590STomeu Vizoso				regulator-min-microvolt = <1500000>;
373e7a09590STomeu Vizoso				regulator-max-microvolt = <1500000>;
374e7a09590STomeu Vizoso				regulator-name = "vcc_1v5";
375e7a09590STomeu Vizoso
376e7a09590STomeu Vizoso				regulator-state-mem {
377e7a09590STomeu Vizoso					regulator-on-in-suspend;
378e7a09590STomeu Vizoso					regulator-suspend-microvolt = <1500000>;
379e7a09590STomeu Vizoso				};
380e7a09590STomeu Vizoso			};
381e7a09590STomeu Vizoso
382e7a09590STomeu Vizoso			vcca1v8_codec: LDO_REG7 {
383e7a09590STomeu Vizoso				regulator-always-on;
384e7a09590STomeu Vizoso				regulator-boot-on;
385e7a09590STomeu Vizoso				regulator-min-microvolt = <1800000>;
386e7a09590STomeu Vizoso				regulator-max-microvolt = <1800000>;
387e7a09590STomeu Vizoso				regulator-name = "vcca1v8_codec";
388e7a09590STomeu Vizoso
389e7a09590STomeu Vizoso				regulator-state-mem {
390e7a09590STomeu Vizoso					regulator-off-in-suspend;
391e7a09590STomeu Vizoso				};
392e7a09590STomeu Vizoso			};
393e7a09590STomeu Vizoso
394e7a09590STomeu Vizoso			vcc_3v0: LDO_REG8 {
395e7a09590STomeu Vizoso				regulator-always-on;
396e7a09590STomeu Vizoso				regulator-boot-on;
397e7a09590STomeu Vizoso				regulator-min-microvolt = <3000000>;
398e7a09590STomeu Vizoso				regulator-max-microvolt = <3000000>;
399e7a09590STomeu Vizoso				regulator-name = "vcc_3v0";
400e7a09590STomeu Vizoso
401e7a09590STomeu Vizoso				regulator-state-mem {
402e7a09590STomeu Vizoso					regulator-on-in-suspend;
403e7a09590STomeu Vizoso					regulator-suspend-microvolt = <3000000>;
404e7a09590STomeu Vizoso				};
405e7a09590STomeu Vizoso			};
406e7a09590STomeu Vizoso
407e7a09590STomeu Vizoso			vcc3v3_s3: SWITCH_REG1 {
408e7a09590STomeu Vizoso				regulator-always-on;
409e7a09590STomeu Vizoso				regulator-boot-on;
410e7a09590STomeu Vizoso				regulator-name = "vcc3v3_s3";
411e7a09590STomeu Vizoso
412e7a09590STomeu Vizoso				regulator-state-mem {
413e7a09590STomeu Vizoso					regulator-off-in-suspend;
414e7a09590STomeu Vizoso				};
415e7a09590STomeu Vizoso			};
416e7a09590STomeu Vizoso
417e7a09590STomeu Vizoso			vcc3v3_s0: SWITCH_REG2 {
418e7a09590STomeu Vizoso				regulator-always-on;
419e7a09590STomeu Vizoso				regulator-boot-on;
420e7a09590STomeu Vizoso				regulator-name = "vcc3v3_s0";
421e7a09590STomeu Vizoso
422e7a09590STomeu Vizoso				regulator-state-mem {
423e7a09590STomeu Vizoso					regulator-off-in-suspend;
424e7a09590STomeu Vizoso				};
425e7a09590STomeu Vizoso			};
426e7a09590STomeu Vizoso		};
427e7a09590STomeu Vizoso	};
428e7a09590STomeu Vizoso};
429e7a09590STomeu Vizoso
430e7a09590STomeu Vizoso&i2c1 {
431e7a09590STomeu Vizoso	clock-frequency = <200000>;
432e7a09590STomeu Vizoso	i2c-scl-rising-time-ns = <150>;
433e7a09590STomeu Vizoso	i2c-scl-falling-time-ns = <30>;
434e7a09590STomeu Vizoso	status = "okay";
435e7a09590STomeu Vizoso};
436e7a09590STomeu Vizoso
437e7a09590STomeu Vizoso&i2c2 {
438e7a09590STomeu Vizoso	status = "okay";
439e7a09590STomeu Vizoso};
440e7a09590STomeu Vizoso
441e7a09590STomeu Vizoso&i2c4 {
442e7a09590STomeu Vizoso	clock-frequency = <400000>;
443e7a09590STomeu Vizoso	i2c-scl-rising-time-ns = <160>;
444e7a09590STomeu Vizoso	i2c-scl-falling-time-ns = <30>;
445e7a09590STomeu Vizoso	status = "okay";
446e7a09590STomeu Vizoso
447e7a09590STomeu Vizoso	fusb0: typec-portc@22 {
448e7a09590STomeu Vizoso		compatible = "fcs,fusb302";
449e7a09590STomeu Vizoso		reg = <0x22>;
450e7a09590STomeu Vizoso		interrupt-parent = <&gpio1>;
451e7a09590STomeu Vizoso		interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
452e7a09590STomeu Vizoso		pinctrl-names = "default";
453e7a09590STomeu Vizoso		pinctrl-0 = <&fusb0_int>;
454e7a09590STomeu Vizoso		vbus-supply = <&vbus_typec>;
455e7a09590STomeu Vizoso	};
456e7a09590STomeu Vizoso};
457e7a09590STomeu Vizoso
458e7a09590STomeu Vizoso&i2c7 {
459e7a09590STomeu Vizoso	status = "okay";
460e7a09590STomeu Vizoso};
461e7a09590STomeu Vizoso
462e7a09590STomeu Vizoso&io_domains {
463e7a09590STomeu Vizoso	bt656-supply = <&vcc_1v8>;
464e7a09590STomeu Vizoso	audio-supply = <&vcca1v8_codec>;
465e7a09590STomeu Vizoso	sdmmc-supply = <&vcc_sdio>;
466e7a09590STomeu Vizoso	gpio1830-supply = <&vcc_3v0>;
467e7a09590STomeu Vizoso	status = "okay";
468e7a09590STomeu Vizoso};
469e7a09590STomeu Vizoso
470e7a09590STomeu Vizoso&pcie_phy {
471e7a09590STomeu Vizoso	assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
472e7a09590STomeu Vizoso	assigned-clock-rates = <100000000>;
473e7a09590STomeu Vizoso	assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
474e7a09590STomeu Vizoso	status = "okay";
475e7a09590STomeu Vizoso};
476e7a09590STomeu Vizoso
477e7a09590STomeu Vizoso&pcie0 {
478e7a09590STomeu Vizoso	ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
479e7a09590STomeu Vizoso	max-link-speed = <2>;
480e7a09590STomeu Vizoso	num-lanes = <4>;
481e7a09590STomeu Vizoso	status = "okay";
482e7a09590STomeu Vizoso};
483e7a09590STomeu Vizoso
484e7a09590STomeu Vizoso&pinctrl {
485e7a09590STomeu Vizoso	fusb30x {
486e7a09590STomeu Vizoso		fusb0_int: fusb0-int {
487e7a09590STomeu Vizoso			rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
488e7a09590STomeu Vizoso		};
489e7a09590STomeu Vizoso	};
490e7a09590STomeu Vizoso
491e7a09590STomeu Vizoso	gpio-leds {
492e7a09590STomeu Vizoso		leds_gpio: leds-gpio {
493e7a09590STomeu Vizoso			rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
494e7a09590STomeu Vizoso		};
495e7a09590STomeu Vizoso	};
496e7a09590STomeu Vizoso
4971a4e6203SRobin Murphy	phy {
4981a4e6203SRobin Murphy		phy_intb: phy-intb {
4991a4e6203SRobin Murphy			rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
5001a4e6203SRobin Murphy		};
5011a4e6203SRobin Murphy
5021a4e6203SRobin Murphy		phy_rstb: phy-rstb {
5031a4e6203SRobin Murphy			rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
5041a4e6203SRobin Murphy		};
5051a4e6203SRobin Murphy	};
5061a4e6203SRobin Murphy
507e7a09590STomeu Vizoso	pmic {
508e7a09590STomeu Vizoso		cpu_b_sleep: cpu-b-sleep {
509e7a09590STomeu Vizoso			rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
510e7a09590STomeu Vizoso		};
511e7a09590STomeu Vizoso
512e7a09590STomeu Vizoso		gpu_sleep: gpu-sleep {
513e7a09590STomeu Vizoso			rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
514e7a09590STomeu Vizoso		};
515e7a09590STomeu Vizoso
516e7a09590STomeu Vizoso		pmic_int_l: pmic-int-l {
517e7a09590STomeu Vizoso			rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
518e7a09590STomeu Vizoso		};
519e7a09590STomeu Vizoso	};
520e7a09590STomeu Vizoso
521e7a09590STomeu Vizoso	rockchip-key {
522e7a09590STomeu Vizoso		power_key: power-key {
523e7a09590STomeu Vizoso			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
524e7a09590STomeu Vizoso		};
525e7a09590STomeu Vizoso	};
526e7a09590STomeu Vizoso
5273e2f0bb7SRobin Murphy	sdio {
5283e2f0bb7SRobin Murphy		bt_host_wake_l: bt-host-wake-l {
5293e2f0bb7SRobin Murphy			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
5303e2f0bb7SRobin Murphy		};
5313e2f0bb7SRobin Murphy
5323e2f0bb7SRobin Murphy		bt_reg_on_h: bt-reg-on-h {
5333e2f0bb7SRobin Murphy			/* external pullup to VCC1V8_PMUPLL */
5343e2f0bb7SRobin Murphy			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
5353e2f0bb7SRobin Murphy		};
5363e2f0bb7SRobin Murphy
5373e2f0bb7SRobin Murphy		bt_wake_l: bt-wake-l {
5383e2f0bb7SRobin Murphy			rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
5393e2f0bb7SRobin Murphy		};
5403e2f0bb7SRobin Murphy
541e7a09590STomeu Vizoso		wifi_reg_on_h: wifi-reg_on-h {
542e7a09590STomeu Vizoso			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
543e7a09590STomeu Vizoso		};
544e7a09590STomeu Vizoso	};
54510f595eeSRobin Murphy
54610f595eeSRobin Murphy	sdmmc {
54710f595eeSRobin Murphy		sdmmc0_det_l: sdmmc0-det-l {
54810f595eeSRobin Murphy			rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
54910f595eeSRobin Murphy		};
55010f595eeSRobin Murphy
55110f595eeSRobin Murphy		sdmmc0_pwr_h: sdmmc0-pwr-h {
55210f595eeSRobin Murphy			rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
55310f595eeSRobin Murphy		};
55410f595eeSRobin Murphy	};
555e7a09590STomeu Vizoso};
556e7a09590STomeu Vizoso
557e7a09590STomeu Vizoso&pmu_io_domains {
558e7a09590STomeu Vizoso	pmu1830-supply = <&vcc_3v0>;
559e7a09590STomeu Vizoso	status = "okay";
560e7a09590STomeu Vizoso};
561e7a09590STomeu Vizoso
562e7a09590STomeu Vizoso&pwm0 {
563e7a09590STomeu Vizoso	status = "okay";
564e7a09590STomeu Vizoso};
565e7a09590STomeu Vizoso
566e7a09590STomeu Vizoso&pwm1 {
567e7a09590STomeu Vizoso	status = "okay";
568e7a09590STomeu Vizoso};
569e7a09590STomeu Vizoso
570e7a09590STomeu Vizoso&pwm2 {
571e7a09590STomeu Vizoso	pinctrl-names = "active";
572e7a09590STomeu Vizoso	pinctrl-0 = <&pwm2_pin_pull_down>;
573e7a09590STomeu Vizoso	status = "okay";
574e7a09590STomeu Vizoso};
575e7a09590STomeu Vizoso
576e7a09590STomeu Vizoso&saradc {
577e7a09590STomeu Vizoso	vref-supply = <&vcca1v8_s3>;
578e7a09590STomeu Vizoso	status = "okay";
579e7a09590STomeu Vizoso};
580e7a09590STomeu Vizoso
581e7a09590STomeu Vizoso&sdhci {
582e7a09590STomeu Vizoso	bus-width = <8>;
583c62ffaf5SRobin Murphy	mmc-hs200-1_8v;
584e7a09590STomeu Vizoso	non-removable;
585e7a09590STomeu Vizoso	status = "okay";
586e7a09590STomeu Vizoso};
587e7a09590STomeu Vizoso
588e7a09590STomeu Vizoso&sdio0 {
589e7a09590STomeu Vizoso	bus-width = <4>;
590e7a09590STomeu Vizoso	cap-sd-highspeed;
591e7a09590STomeu Vizoso	cap-sdio-irq;
592e7a09590STomeu Vizoso	keep-power-in-suspend;
593e7a09590STomeu Vizoso	mmc-pwrseq = <&sdio_pwrseq>;
594e7a09590STomeu Vizoso	non-removable;
595e7a09590STomeu Vizoso	pinctrl-names = "default";
596e7a09590STomeu Vizoso	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
597e7a09590STomeu Vizoso	sd-uhs-sdr104;
598e7a09590STomeu Vizoso	status = "okay";
599e7a09590STomeu Vizoso};
600e7a09590STomeu Vizoso
601e7a09590STomeu Vizoso&sdmmc {
602e7a09590STomeu Vizoso	bus-width = <4>;
603e7a09590STomeu Vizoso	cap-sd-highspeed;
604e7a09590STomeu Vizoso	cap-mmc-highspeed;
60510f595eeSRobin Murphy	cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
606e7a09590STomeu Vizoso	disable-wp;
607e7a09590STomeu Vizoso	pinctrl-names = "default";
60810f595eeSRobin Murphy	pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc0_det_l>;
609e7a09590STomeu Vizoso	sd-uhs-sdr104;
610e7a09590STomeu Vizoso	vmmc-supply = <&vcc3v0_sd>;
611e7a09590STomeu Vizoso	vqmmc-supply = <&vcc_sdio>;
612e7a09590STomeu Vizoso	status = "okay";
613e7a09590STomeu Vizoso};
614e7a09590STomeu Vizoso
615e7a09590STomeu Vizoso&tcphy0 {
616e7a09590STomeu Vizoso	status = "okay";
617e7a09590STomeu Vizoso};
618e7a09590STomeu Vizoso
619e7a09590STomeu Vizoso&tcphy1 {
620e7a09590STomeu Vizoso	status = "okay";
621e7a09590STomeu Vizoso};
622e7a09590STomeu Vizoso
623e7a09590STomeu Vizoso&tsadc {
624e7a09590STomeu Vizoso	/* tshut mode 0:CRU 1:GPIO */
625e7a09590STomeu Vizoso	rockchip,hw-tshut-mode = <1>;
626e7a09590STomeu Vizoso	/* tshut polarity 0:LOW 1:HIGH */
627e7a09590STomeu Vizoso	rockchip,hw-tshut-polarity = <1>;
628e7a09590STomeu Vizoso	status = "okay";
629e7a09590STomeu Vizoso};
630e7a09590STomeu Vizoso
631e7a09590STomeu Vizoso&u2phy0 {
632e7a09590STomeu Vizoso	status = "okay";
633e7a09590STomeu Vizoso};
634e7a09590STomeu Vizoso
635e7a09590STomeu Vizoso&u2phy0_host {
636e7a09590STomeu Vizoso	status = "okay";
637e7a09590STomeu Vizoso};
638e7a09590STomeu Vizoso
639e7a09590STomeu Vizoso&u2phy0_otg {
640e7a09590STomeu Vizoso	status = "okay";
641e7a09590STomeu Vizoso};
642e7a09590STomeu Vizoso
643e7a09590STomeu Vizoso&u2phy1 {
644e7a09590STomeu Vizoso	status = "okay";
645e7a09590STomeu Vizoso};
646e7a09590STomeu Vizoso
647e7a09590STomeu Vizoso&u2phy1_host {
648e7a09590STomeu Vizoso	status = "okay";
649e7a09590STomeu Vizoso};
650e7a09590STomeu Vizoso
651e7a09590STomeu Vizoso&u2phy1_otg {
652e7a09590STomeu Vizoso	status = "okay";
653e7a09590STomeu Vizoso};
654e7a09590STomeu Vizoso
655e7a09590STomeu Vizoso&uart0 {
656e7a09590STomeu Vizoso	pinctrl-names = "default";
657e7a09590STomeu Vizoso	pinctrl-0 = <&uart0_xfer &uart0_rts &uart0_cts>;
658e7a09590STomeu Vizoso	status = "okay";
6593e2f0bb7SRobin Murphy
6603e2f0bb7SRobin Murphy	bluetooth {
6613e2f0bb7SRobin Murphy		compatible = "brcm,bcm43438-bt";
6623e2f0bb7SRobin Murphy		clocks = <&rk808 1>;
6633e2f0bb7SRobin Murphy		clock-names = "lpo";
6643e2f0bb7SRobin Murphy		device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
6653e2f0bb7SRobin Murphy		host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
6663e2f0bb7SRobin Murphy		shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
6673e2f0bb7SRobin Murphy		max-speed = <4000000>;
6683e2f0bb7SRobin Murphy		pinctrl-names = "default";
6693e2f0bb7SRobin Murphy		pinctrl-0 = <&bt_reg_on_h &bt_host_wake_l &bt_wake_l>;
6703e2f0bb7SRobin Murphy		vbat-supply = <&vcc3v3_sys>;
6713e2f0bb7SRobin Murphy		vddio-supply = <&vcc_1v8>;
6723e2f0bb7SRobin Murphy	};
673e7a09590STomeu Vizoso};
674e7a09590STomeu Vizoso
675e7a09590STomeu Vizoso&uart2 {
676e7a09590STomeu Vizoso	status = "okay";
677e7a09590STomeu Vizoso};
678e7a09590STomeu Vizoso
679e7a09590STomeu Vizoso&usbdrd3_0 {
680e7a09590STomeu Vizoso	status = "okay";
681e7a09590STomeu Vizoso};
682e7a09590STomeu Vizoso
683e7a09590STomeu Vizoso&usbdrd3_1 {
684e7a09590STomeu Vizoso	status = "okay";
685e7a09590STomeu Vizoso};
686e7a09590STomeu Vizoso
687e7a09590STomeu Vizoso&usbdrd_dwc3_0 {
688e7a09590STomeu Vizoso	status = "okay";
689e7a09590STomeu Vizoso};
690e7a09590STomeu Vizoso
691e7a09590STomeu Vizoso&usbdrd_dwc3_1 {
692e7a09590STomeu Vizoso	dr_mode = "host";
693e7a09590STomeu Vizoso	status = "okay";
694e7a09590STomeu Vizoso};
695e7a09590STomeu Vizoso
696e7a09590STomeu Vizoso&usb_host0_ehci {
697e7a09590STomeu Vizoso	status = "okay";
698e7a09590STomeu Vizoso};
699e7a09590STomeu Vizoso
700e7a09590STomeu Vizoso&usb_host0_ohci {
701e7a09590STomeu Vizoso	status = "okay";
702e7a09590STomeu Vizoso};
703e7a09590STomeu Vizoso
704e7a09590STomeu Vizoso&usb_host1_ehci {
705e7a09590STomeu Vizoso	status = "okay";
706e7a09590STomeu Vizoso};
707e7a09590STomeu Vizoso
708e7a09590STomeu Vizoso&usb_host1_ohci {
709e7a09590STomeu Vizoso	status = "okay";
710e7a09590STomeu Vizoso};
711e7a09590STomeu Vizoso
712e7a09590STomeu Vizoso&vopb {
713e7a09590STomeu Vizoso	status = "okay";
714e7a09590STomeu Vizoso};
715e7a09590STomeu Vizoso
716e7a09590STomeu Vizoso&vopb_mmu {
717e7a09590STomeu Vizoso	status = "okay";
718e7a09590STomeu Vizoso};
719e7a09590STomeu Vizoso
720e7a09590STomeu Vizoso&vopl {
721e7a09590STomeu Vizoso	status = "okay";
722e7a09590STomeu Vizoso};
723e7a09590STomeu Vizoso
724e7a09590STomeu Vizoso&vopl_mmu {
725e7a09590STomeu Vizoso	status = "okay";
726e7a09590STomeu Vizoso};
727