1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Google Gru-Chromebook shared properties 4 * 5 * Copyright 2018 Google, Inc 6 */ 7 8#include "rk3399-gru.dtsi" 9 10/ { 11 pp900_ap: pp900-ap { 12 compatible = "regulator-fixed"; 13 regulator-name = "pp900_ap"; 14 15 /* EC turns on w/ pp900_ap_en; always on for AP */ 16 regulator-always-on; 17 regulator-boot-on; 18 regulator-min-microvolt = <900000>; 19 regulator-max-microvolt = <900000>; 20 21 vin-supply = <&ppvar_sys>; 22 }; 23 24 /* EC turns on w/ pp900_usb_en */ 25 pp900_usb: pp900-ap { 26 }; 27 28 /* EC turns on w/ pp900_pcie_en */ 29 pp900_pcie: pp900-ap { 30 }; 31 32 pp3000: pp3000 { 33 compatible = "regulator-fixed"; 34 regulator-name = "pp3000"; 35 pinctrl-names = "default"; 36 pinctrl-0 = <&pp3000_en>; 37 38 enable-active-high; 39 gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>; 40 41 regulator-always-on; 42 regulator-boot-on; 43 regulator-min-microvolt = <3000000>; 44 regulator-max-microvolt = <3000000>; 45 46 vin-supply = <&ppvar_sys>; 47 }; 48 49 ppvar_centerlogic_pwm: ppvar-centerlogic-pwm { 50 compatible = "pwm-regulator"; 51 regulator-name = "ppvar_centerlogic_pwm"; 52 53 pwms = <&pwm3 0 3337 0>; 54 pwm-supply = <&ppvar_sys>; 55 pwm-dutycycle-range = <100 0>; 56 pwm-dutycycle-unit = <100>; 57 58 /* EC turns on w/ ppvar_centerlogic_en; always on for AP */ 59 regulator-always-on; 60 regulator-boot-on; 61 regulator-min-microvolt = <799434>; 62 regulator-max-microvolt = <1049925>; 63 }; 64 65 ppvar_centerlogic: ppvar-centerlogic { 66 compatible = "vctrl-regulator"; 67 regulator-name = "ppvar_centerlogic"; 68 69 regulator-min-microvolt = <799434>; 70 regulator-max-microvolt = <1049925>; 71 72 ctrl-supply = <&ppvar_centerlogic_pwm>; 73 ctrl-voltage-range = <799434 1049925>; 74 75 regulator-settling-time-up-us = <378>; 76 min-slew-down-rate = <225>; 77 ovp-threshold-percent = <16>; 78 }; 79 80 /* Schematics call this PPVAR even though it's fixed */ 81 ppvar_logic: ppvar-logic { 82 compatible = "regulator-fixed"; 83 regulator-name = "ppvar_logic"; 84 85 /* EC turns on w/ ppvar_logic_en; always on for AP */ 86 regulator-always-on; 87 regulator-boot-on; 88 regulator-min-microvolt = <900000>; 89 regulator-max-microvolt = <900000>; 90 91 vin-supply = <&ppvar_sys>; 92 }; 93 94 pp1800_audio: pp1800-audio { 95 compatible = "regulator-fixed"; 96 regulator-name = "pp1800_audio"; 97 pinctrl-names = "default"; 98 pinctrl-0 = <&pp1800_audio_en>; 99 100 enable-active-high; 101 gpio = <&gpio0 2 GPIO_ACTIVE_HIGH>; 102 103 regulator-always-on; 104 regulator-boot-on; 105 106 vin-supply = <&pp1800>; 107 }; 108 109 /* gpio is shared with pp3300_wifi_bt */ 110 pp1800_pcie: pp1800-pcie { 111 compatible = "regulator-fixed"; 112 regulator-name = "pp1800_pcie"; 113 pinctrl-names = "default"; 114 pinctrl-0 = <&wlan_module_pd_l>; 115 116 enable-active-high; 117 gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>; 118 119 /* 120 * Need to wait 1ms + ramp-up time before we can power on WiFi. 121 * This has been approximated as 8ms total. 122 */ 123 regulator-enable-ramp-delay = <8000>; 124 125 vin-supply = <&pp1800>; 126 }; 127 128 /* Always on; plain and simple */ 129 pp3000_ap: pp3000_emmc: pp3000 { 130 }; 131 132 pp1500_ap_io: pp1500-ap-io { 133 compatible = "regulator-fixed"; 134 regulator-name = "pp1500_ap_io"; 135 pinctrl-names = "default"; 136 pinctrl-0 = <&pp1500_en>; 137 138 enable-active-high; 139 gpio = <&gpio0 10 GPIO_ACTIVE_HIGH>; 140 141 regulator-always-on; 142 regulator-boot-on; 143 regulator-min-microvolt = <1500000>; 144 regulator-max-microvolt = <1500000>; 145 146 vin-supply = <&pp1800>; 147 }; 148 149 pp3300_disp: pp3300-disp { 150 compatible = "regulator-fixed"; 151 regulator-name = "pp3300_disp"; 152 pinctrl-names = "default"; 153 pinctrl-0 = <&pp3300_disp_en>; 154 155 enable-active-high; 156 gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>; 157 158 startup-delay-us = <2000>; 159 vin-supply = <&pp3300>; 160 }; 161 162 /* EC turns on w/ pp3300_usb_en_l */ 163 pp3300_usb: pp3300 { 164 }; 165 166 /* gpio is shared with pp1800_pcie and pinctrl is set there */ 167 pp3300_wifi_bt: pp3300-wifi-bt { 168 compatible = "regulator-fixed"; 169 regulator-name = "pp3300_wifi_bt"; 170 171 enable-active-high; 172 gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>; 173 174 vin-supply = <&pp3300>; 175 }; 176 177 /* 178 * This is a bit of a hack. The WiFi module should be reset at least 179 * 1ms after its regulators have ramped up (max rampup time is ~7ms). 180 * With some stretching of the imagination, we can call the 1.8V 181 * regulator a supply. 182 */ 183 wlan_pd_n: wlan-pd-n { 184 compatible = "regulator-fixed"; 185 regulator-name = "wlan_pd_n"; 186 pinctrl-names = "default"; 187 pinctrl-0 = <&wlan_module_reset_l>; 188 189 enable-active-high; 190 gpio = <&gpio1 11 GPIO_ACTIVE_HIGH>; 191 192 vin-supply = <&pp1800_pcie>; 193 }; 194 195 backlight: backlight { 196 compatible = "pwm-backlight"; 197 enable-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; 198 power-supply = <&pp3300_disp>; 199 pinctrl-names = "default"; 200 pinctrl-0 = <&bl_en>; 201 pwm-delay-us = <10000>; 202 }; 203 204 gpio_keys: gpio-keys { 205 compatible = "gpio-keys"; 206 pinctrl-names = "default"; 207 pinctrl-0 = <&bt_host_wake_l>; 208 209 wake_on_bt: wake-on-bt { 210 label = "Wake-on-Bluetooth"; 211 gpios = <&gpio0 3 GPIO_ACTIVE_LOW>; 212 linux,code = <KEY_WAKEUP>; 213 wakeup-source; 214 }; 215 }; 216}; 217 218&ppvar_bigcpu { 219 min-slew-down-rate = <225>; 220 ovp-threshold-percent = <16>; 221}; 222 223&ppvar_litcpu { 224 min-slew-down-rate = <225>; 225 ovp-threshold-percent = <16>; 226}; 227 228&ppvar_gpu { 229 min-slew-down-rate = <225>; 230 ovp-threshold-percent = <16>; 231}; 232 233&cdn_dp { 234 extcon = <&usbc_extcon0>, <&usbc_extcon1>; 235}; 236 237&dmc { 238 center-supply = <&ppvar_centerlogic>; 239 rockchip,pd-idle-dis-freq-hz = <800000000>; 240 rockchip,sr-idle-dis-freq-hz = <800000000>; 241 rockchip,sr-mc-gate-idle-dis-freq-hz = <800000000>; 242}; 243 244&edp { 245 status = "okay"; 246 247 ports { 248 edp_out: port@1 { 249 reg = <1>; 250 #address-cells = <1>; 251 #size-cells = <0>; 252 253 edp_out_panel: endpoint@0 { 254 reg = <0>; 255 remote-endpoint = <&panel_in_edp>; 256 }; 257 }; 258 }; 259}; 260 261&gpio0 { 262 gpio-line-names = /* GPIO0 A 0-7 */ 263 "AP_RTC_CLK_IN", 264 "EC_AP_INT_L", 265 "PP1800_AUDIO_EN", 266 "BT_HOST_WAKE_L", 267 "WLAN_MODULE_PD_L", 268 "H1_INT_OD_L", 269 "CENTERLOGIC_DVS_PWM", 270 "", 271 272 /* GPIO0 B 0-4 */ 273 "WIFI_HOST_WAKE_L", 274 "PMUIO2_33_18_L", 275 "PP1500_EN", 276 "AP_EC_WARM_RESET_REQ", 277 "PP3000_EN"; 278}; 279 280&gpio1 { 281 gpio-line-names = /* GPIO1 A 0-7 */ 282 "", 283 "", 284 "SPK_PA_EN", 285 "", 286 "TRACKPAD_INT_L", 287 "AP_EC_S3_S0_L", 288 "AP_EC_OVERTEMP", 289 "AP_SPI_FLASH_MISO", 290 291 /* GPIO1 B 0-7 */ 292 "AP_SPI_FLASH_MOSI_R", 293 "AP_SPI_FLASH_CLK_R", 294 "AP_SPI_FLASH_CS_L_R", 295 "WLAN_MODULE_RESET_L", 296 "WIFI_DISABLE_L", 297 "MIC_INT", 298 "", 299 "AP_I2C_DVS_SDA", 300 301 /* GPIO1 C 0-7 */ 302 "AP_I2C_DVS_SCL", 303 "AP_BL_EN", 304 /* 305 * AP_FLASH_WP is crossystem ABI. Schematics call it 306 * AP_FW_WP or CPU1_FW_WP, depending on the variant. 307 */ 308 "AP_FLASH_WP", 309 "LITCPU_DVS_PWM", 310 "AP_I2C_AUDIO_SDA", 311 "AP_I2C_AUDIO_SCL", 312 "", 313 "HEADSET_INT_L"; 314}; 315 316&gpio2 { 317 gpio-line-names = /* GPIO2 A 0-7 */ 318 "", 319 "", 320 "SD_IO_PWR_EN", 321 "", 322 "", 323 "", 324 "", 325 "", 326 327 /* GPIO2 B 0-7 */ 328 "", 329 "", 330 "", 331 "", 332 "", 333 "", 334 "", 335 "", 336 337 /* GPIO2 C 0-7 */ 338 "", 339 "", 340 "", 341 "", 342 "AP_SPI_EC_MISO", 343 "AP_SPI_EC_MOSI", 344 "AP_SPI_EC_CLK", 345 "AP_SPI_EC_CS_L", 346 347 /* GPIO2 D 0-4 */ 348 "BT_DEV_WAKE_L", 349 "", 350 "WIFI_PCIE_CLKREQ_L", 351 "WIFI_PERST_L", 352 "SD_PWR_3000_1800_L"; 353}; 354 355&gpio3 { 356 gpio-line-names = /* GPIO3 A 0-7 */ 357 "", 358 "", 359 "", 360 "", 361 "AP_SPI_TPM_MISO", 362 "AP_SPI_TPM_MOSI_R", 363 "AP_SPI_TPM_CLK_R", 364 "AP_SPI_TPM_CS_L_R", 365 366 /* GPIO3 B 0-7 */ 367 "EC_IN_RW", 368 "", 369 "AP_I2C_TP_SDA", 370 "AP_I2C_TP_SCL", 371 "AP_I2C_TP_PU_EN", 372 "TOUCH_INT_L", 373 "", 374 "", 375 376 /* GPIO3 C 0-7 */ 377 "", 378 "", 379 "", 380 "", 381 "", 382 "", 383 "", 384 "", 385 386 /* GPIO3 D 0-7 */ 387 "I2S0_SCLK", 388 "I2S0_LRCK_RX", 389 "I2S0_LRCK_TX", 390 "I2S0_SDI_0", 391 "I2S0_SDI_1", 392 "", 393 "I2S0_SDO_1", 394 "I2S0_SDO_0"; 395}; 396 397&gpio4 { 398 gpio-line-names = /* GPIO4 A 0-7 */ 399 "I2S_MCLK", 400 "AP_I2C_MIC_SDA", 401 "AP_I2C_MIC_SCL", 402 "", 403 "", 404 "", 405 "", 406 "", 407 408 /* GPIO4 B 0-7 */ 409 "", 410 "", 411 "", 412 "", 413 "", 414 "", 415 "", 416 "", 417 418 /* GPIO4 C 0-7 */ 419 "AP_I2C_TS_SDA", 420 "AP_I2C_TS_SCL", 421 "GPU_DVS_PWM", 422 "UART_DBG_TX_AP_RX", 423 "UART_AP_TX_DBG_RX", 424 "", 425 "BIGCPU_DVS_PWM", 426 "EDP_HPD_3V0", 427 428 /* GPIO4 D 0-5 */ 429 "SD_CARD_DET_L", 430 "USB_DP_HPD", 431 "TOUCH_RESET_L", 432 "PP3300_DISP_EN", 433 "", 434 "SD_SLOT_PWR_EN"; 435}; 436 437ap_i2c_mic: &i2c1 { 438 status = "okay"; 439 440 clock-frequency = <400000>; 441 442 /* These are relatively safe rise/fall times */ 443 i2c-scl-falling-time-ns = <50>; 444 i2c-scl-rising-time-ns = <300>; 445 446 headsetcodec: rt5514@57 { 447 compatible = "realtek,rt5514"; 448 reg = <0x57>; 449 realtek,dmic-init-delay-ms = <20>; 450 }; 451}; 452 453ap_i2c_tp: &i2c5 { 454 status = "okay"; 455 456 clock-frequency = <400000>; 457 458 /* These are relatively safe rise/fall times */ 459 i2c-scl-falling-time-ns = <50>; 460 i2c-scl-rising-time-ns = <300>; 461 462 /* 463 * Note strange pullup enable. Apparently this avoids leakage but 464 * still allows us to get nice 4.7K pullups for high speed i2c 465 * transfers. Basically we want the pullup on whenever the ap is 466 * alive, so the "en" pin just gets set to output high. 467 */ 468 pinctrl-0 = <&i2c5_xfer &ap_i2c_tp_pu_en>; 469}; 470 471&cros_ec { 472 cros_ec_pwm: pwm { 473 compatible = "google,cros-ec-pwm"; 474 #pwm-cells = <1>; 475 }; 476 477 usbc_extcon1: extcon1 { 478 compatible = "google,extcon-usbc-cros-ec"; 479 google,usb-port-id = <1>; 480 }; 481}; 482 483&sound { 484 rockchip,codec = <&max98357a &headsetcodec 485 &codec &wacky_spi_audio &cdn_dp>; 486}; 487 488&spi2 { 489 wacky_spi_audio: spi2@0 { 490 compatible = "realtek,rt5514"; 491 reg = <0>; 492 interrupt-parent = <&gpio1>; 493 interrupts = <13 IRQ_TYPE_LEVEL_HIGH>; 494 pinctrl-names = "default"; 495 pinctrl-0 = <&mic_int>; 496 /* May run faster once verified. */ 497 spi-max-frequency = <10000000>; 498 wakeup-source; 499 }; 500}; 501 502&pci_rootport { 503 mvl_wifi: wifi@0,0 { 504 compatible = "pci1b4b,2b42"; 505 reg = <0x83010000 0x0 0x00000000 0x0 0x00100000 506 0x83010000 0x0 0x00100000 0x0 0x00100000>; 507 interrupt-parent = <&gpio0>; 508 interrupts = <8 IRQ_TYPE_LEVEL_LOW>; 509 pinctrl-names = "default"; 510 pinctrl-0 = <&wlan_host_wake_l>; 511 wakeup-source; 512 }; 513}; 514 515&tcphy1 { 516 status = "okay"; 517 extcon = <&usbc_extcon1>; 518}; 519 520&u2phy1 { 521 status = "okay"; 522}; 523 524&usb_host0_ehci { 525 status = "okay"; 526}; 527 528&usb_host1_ehci { 529 status = "okay"; 530}; 531 532&usb_host1_ohci { 533 status = "okay"; 534}; 535 536&usbdrd3_1 { 537 status = "okay"; 538 extcon = <&usbc_extcon1>; 539}; 540 541&usbdrd_dwc3_1 { 542 status = "okay"; 543 dr_mode = "host"; 544}; 545 546&pinctrl { 547 discrete-regulators { 548 pp1500_en: pp1500-en { 549 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO 550 &pcfg_pull_none>; 551 }; 552 553 pp1800_audio_en: pp1800-audio-en { 554 rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO 555 &pcfg_pull_down>; 556 }; 557 558 pp3000_en: pp3000-en { 559 rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO 560 &pcfg_pull_none>; 561 }; 562 563 pp3300_disp_en: pp3300-disp-en { 564 rockchip,pins = <4 RK_PD3 RK_FUNC_GPIO 565 &pcfg_pull_none>; 566 }; 567 568 wlan_module_pd_l: wlan-module-pd-l { 569 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO 570 &pcfg_pull_down>; 571 }; 572 }; 573}; 574 575&wifi { 576 wifi_perst_l: wifi-perst-l { 577 rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; 578 }; 579 580 wlan_host_wake_l: wlan-host-wake-l { 581 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 582 }; 583}; 584