1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2015 Heiko Stuebner <heiko@sntech.de>
4 */
5
6/dts-v1/;
7#include "rk3368.dtsi"
8#include <dt-bindings/input/input.h>
9
10/ {
11	model = "Rockchip R88";
12	compatible = "rockchip,r88", "rockchip,rk3368";
13
14	chosen {
15		stdout-path = "serial2:115200n8";
16	};
17
18	memory {
19		device_type = "memory";
20		reg = <0x0 0x0 0x0 0x40000000>;
21	};
22
23	emmc_pwrseq: emmc-pwrseq {
24		compatible = "mmc-pwrseq-emmc";
25		pinctrl-0 = <&emmc_reset>;
26		pinctrl-names = "default";
27		reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
28	};
29
30	keys: gpio-keys {
31		compatible = "gpio-keys";
32		pinctrl-names = "default";
33		pinctrl-0 = <&pwr_key>;
34
35		power {
36			wakeup-source;
37			gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
38			label = "GPIO Power";
39			linux,code = <KEY_POWER>;
40		};
41	};
42
43	leds: gpio-leds {
44		compatible = "gpio-leds";
45
46		work_led: led-0 {
47			gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
48			label = "r88:green:led";
49			pinctrl-names = "default";
50			pinctrl-0 = <&led_ctl>;
51		};
52	};
53
54	ir: ir-receiver {
55		compatible = "gpio-ir-receiver";
56		gpios = <&gpio3 RK_PD6 GPIO_ACTIVE_LOW>;
57		pinctrl-names = "default";
58		pinctrl-0 = <&ir_int>;
59	};
60
61	sdio_pwrseq: sdio-pwrseq {
62		compatible = "mmc-pwrseq-simple";
63		clocks = <&hym8563>;
64		clock-names = "ext_clock";
65		pinctrl-names = "default";
66		pinctrl-0 = <&bt_rst>, <&wifi_reg_on>;
67
68		reset-gpios =
69			/* BT_RST_N */
70			<&gpio3 RK_PA5 GPIO_ACTIVE_LOW>,
71
72			/* WL_REG_ON */
73			<&gpio3 RK_PA4 GPIO_ACTIVE_LOW>;
74	};
75
76	vcc_18: vcc18-regulator {
77		compatible = "regulator-fixed";
78		regulator-name = "vcc_18";
79		regulator-min-microvolt = <1800000>;
80		regulator-max-microvolt = <1800000>;
81		regulator-always-on;
82		regulator-boot-on;
83		vin-supply = <&vcc_sys>;
84	};
85
86	/* supplies both host and otg */
87	vcc_host: vcc-host-regulator {
88		compatible = "regulator-fixed";
89		enable-active-high;
90		gpio = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
91		pinctrl-names = "default";
92		pinctrl-0 = <&host_vbus_drv>;
93		regulator-name = "vcc_host";
94		regulator-always-on;
95		regulator-boot-on;
96		vin-supply = <&vcc_sys>;
97	};
98
99	vcc_io: vcc-io-regulator {
100		compatible = "regulator-fixed";
101		regulator-name = "vcc_io";
102		regulator-min-microvolt = <3300000>;
103		regulator-max-microvolt = <3300000>;
104		regulator-always-on;
105		regulator-boot-on;
106		vin-supply = <&vcc_sys>;
107	};
108
109	vcc_lan: vcc-lan-regulator {
110		compatible = "regulator-fixed";
111		regulator-name = "vcc_lan";
112		regulator-min-microvolt = <3300000>;
113		regulator-max-microvolt = <3300000>;
114		regulator-always-on;
115		regulator-boot-on;
116		vin-supply = <&vcc_io>;
117	};
118
119	vcc_sys: vcc-sys-regulator {
120		compatible = "regulator-fixed";
121		regulator-name = "vcc_sys";
122		regulator-min-microvolt = <5000000>;
123		regulator-max-microvolt = <5000000>;
124		regulator-always-on;
125		regulator-boot-on;
126	};
127
128	vccio_wl: vccio-wl-regulator {
129		compatible = "regulator-fixed";
130		regulator-name = "vccio_wl";
131		regulator-min-microvolt = <3300000>;
132		regulator-max-microvolt = <3300000>;
133		regulator-always-on;
134		regulator-boot-on;
135		vin-supply = <&vcc_io>;
136	};
137
138	vdd_10: vdd-10-regulator {
139		compatible = "regulator-fixed";
140		regulator-name = "vdd_10";
141		regulator-min-microvolt = <1000000>;
142		regulator-max-microvolt = <1000000>;
143		regulator-always-on;
144		regulator-boot-on;
145		vin-supply = <&vcc_sys>;
146	};
147};
148
149&emmc {
150	bus-width = <8>;
151	cap-mmc-highspeed;
152	mmc-pwrseq = <&emmc_pwrseq>;
153	non-removable;
154	pinctrl-names = "default";
155	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
156	status = "okay";
157};
158
159&gmac {
160	phy-supply = <&vcc_lan>;
161	phy-mode = "rmii";
162	clock_in_out = "output";
163	snps,reset-gpio = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>;
164	snps,reset-active-low;
165	snps,reset-delays-us = <0 10000 1000000>;
166	pinctrl-names = "default";
167	pinctrl-0 = <&rmii_pins>;
168	tx_delay = <0x30>;
169	rx_delay = <0x10>;
170	status = "ok";
171};
172
173&i2c0 {
174	status = "okay";
175
176	vdd_cpu: syr827@40 {
177		compatible = "silergy,syr827";
178		reg = <0x40>;
179		fcs,suspend-voltage-selector = <1>;
180		regulator-name = "vdd_cpu";
181		regulator-enable-ramp-delay = <300>;
182		regulator-min-microvolt = <712500>;
183		regulator-max-microvolt = <1500000>;
184		regulator-ramp-delay = <8000>;
185		regulator-always-on;
186		regulator-boot-on;
187		vin-supply = <&vcc_sys>;
188	};
189
190	hym8563: hym8563@51 {
191		compatible = "haoyu,hym8563";
192		reg = <0x51>;
193		#clock-cells = <0>;
194		clock-frequency = <32768>;
195		clock-output-names = "xin32k";
196		/* rtc_int is not connected */
197	};
198};
199
200&io_domains {
201	status = "ok";
202
203	audio-supply = <&vcc_io>;
204	gpio30-supply = <&vcc_io>;
205	gpio1830-supply = <&vcc_io>;
206	wifi-supply = <&vccio_wl>;
207};
208
209&sdio0 {
210	assigned-clocks = <&cru SCLK_SDIO0>;
211	assigned-clock-parents = <&cru PLL_CPLL>;
212	bus-width = <4>;
213	cap-sd-highspeed;
214	cap-sdio-irq;
215	keep-power-in-suspend;
216	mmc-pwrseq = <&sdio_pwrseq>;
217	non-removable;
218	pinctrl-names = "default";
219	pinctrl-0 = <&sdio0_clk &sdio0_cmd &sdio0_bus4>;
220	vmmc-supply = <&vcc_io>;
221	vqmmc-supply = <&vccio_wl>;
222	status = "okay";
223};
224
225&pinctrl {
226	pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
227		bias-disable;
228		drive-strength = <8>;
229	};
230
231	pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
232		bias-pull-up;
233		drive-strength = <8>;
234	};
235
236	emmc {
237		emmc_bus8: emmc-bus8 {
238			rockchip,pins = <1 RK_PC2 2 &pcfg_pull_up_drv_8ma>,
239					<1 RK_PC3 2 &pcfg_pull_up_drv_8ma>,
240					<1 RK_PC4 2 &pcfg_pull_up_drv_8ma>,
241					<1 RK_PC5 2 &pcfg_pull_up_drv_8ma>,
242					<1 RK_PC6 2 &pcfg_pull_up_drv_8ma>,
243					<1 RK_PC7 2 &pcfg_pull_up_drv_8ma>,
244					<1 RK_PD0 2 &pcfg_pull_up_drv_8ma>,
245					<1 RK_PD1 2 &pcfg_pull_up_drv_8ma>;
246		};
247
248		emmc-clk {
249			rockchip,pins = <2 RK_PA4 2 &pcfg_pull_none_drv_8ma>;
250		};
251
252		emmc-cmd {
253			rockchip,pins = <1 RK_PD2 2 &pcfg_pull_up_drv_8ma>;
254		};
255
256		emmc_reset: emmc-reset {
257			rockchip,pins = <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
258		};
259	};
260
261	ir {
262		ir_int: ir-int {
263			rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
264		};
265	};
266
267	keys {
268		pwr_key: pwr-key {
269			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
270		};
271	};
272
273	leds {
274		stby_pwren: stby-pwren {
275			rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
276		};
277
278		led_ctl: led-ctl {
279			rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
280		};
281	};
282
283	sdio {
284		wifi_reg_on: wifi-reg-on {
285			rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
286		};
287
288		bt_rst: bt-rst {
289			rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
290		};
291	};
292
293	usb {
294		host_vbus_drv: host-vbus-drv {
295			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
296		};
297	};
298};
299
300&pmu_io_domains {
301	status = "okay";
302
303	pmu-supply = <&vcc_io>;
304	vop-supply = <&vcc_io>;
305};
306
307&saradc {
308	vref-supply = <&vcc_18>;
309	status = "okay";
310};
311
312&tsadc {
313	rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
314	rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
315	status = "okay";
316};
317
318&uart2 {
319	status = "okay";
320};
321
322&usb_host0_ehci {
323	status = "okay";
324};
325
326&usb_otg {
327	dr_mode = "host";
328	status = "okay";
329};
330
331&wdt {
332	status = "okay";
333};
334