xref: /openbmc/linux/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts (revision 22fc4c4c9fd60427bcda00878cee94e7622cfa7a)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2017 PINE64
4 */
5
6/dts-v1/;
7#include "rk3328.dtsi"
8
9/ {
10	model = "Pine64 Rock64";
11	compatible = "pine64,rock64", "rockchip,rk3328";
12
13	chosen {
14		stdout-path = "serial2:1500000n8";
15	};
16
17	gmac_clkin: external-gmac-clock {
18		compatible = "fixed-clock";
19		clock-frequency = <125000000>;
20		clock-output-names = "gmac_clkin";
21		#clock-cells = <0>;
22	};
23
24	vcc_sd: sdmmc-regulator {
25		compatible = "regulator-fixed";
26		gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
27		pinctrl-names = "default";
28		pinctrl-0 = <&sdmmc0m1_gpio>;
29		regulator-name = "vcc_sd";
30		regulator-min-microvolt = <3300000>;
31		regulator-max-microvolt = <3300000>;
32		vin-supply = <&vcc_io>;
33	};
34
35	vcc_host_5v: vcc-host-5v-regulator {
36		compatible = "regulator-fixed";
37		enable-active-high;
38		gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
39		pinctrl-names = "default";
40		pinctrl-0 = <&usb30_host_drv>;
41		regulator-name = "vcc_host_5v";
42		regulator-always-on;
43		vin-supply = <&vcc_sys>;
44	};
45
46	vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator {
47		compatible = "regulator-fixed";
48		enable-active-high;
49		gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
50		pinctrl-names = "default";
51		pinctrl-0 = <&usb20_host_drv>;
52		regulator-name = "vcc_host1_5v";
53		regulator-always-on;
54		vin-supply = <&vcc_sys>;
55	};
56
57	vcc_sys: vcc-sys {
58		compatible = "regulator-fixed";
59		regulator-name = "vcc_sys";
60		regulator-always-on;
61		regulator-boot-on;
62		regulator-min-microvolt = <5000000>;
63		regulator-max-microvolt = <5000000>;
64	};
65
66	sound {
67		compatible = "audio-graph-card";
68		label = "rockchip,rk3328";
69		dais = <&spdif_p0>;
70	};
71
72	spdif-dit {
73		compatible = "linux,spdif-dit";
74		#sound-dai-cells = <0>;
75
76		port {
77			dit_p0_0: endpoint {
78				remote-endpoint = <&spdif_p0_0>;
79			};
80		};
81	};
82};
83
84&cpu0 {
85	cpu-supply = <&vdd_arm>;
86};
87
88&cpu1 {
89	cpu-supply = <&vdd_arm>;
90};
91
92&cpu2 {
93	cpu-supply = <&vdd_arm>;
94};
95
96&cpu3 {
97	cpu-supply = <&vdd_arm>;
98};
99
100&emmc {
101	bus-width = <8>;
102	cap-mmc-highspeed;
103	mmc-hs200-1_8v;
104	non-removable;
105	pinctrl-names = "default";
106	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
107	vmmc-supply = <&vcc_io>;
108	vqmmc-supply = <&vcc18_emmc>;
109	status = "okay";
110};
111
112&gmac2io {
113	assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
114	assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
115	clock_in_out = "input";
116	phy-supply = <&vcc_io>;
117	phy-mode = "rgmii";
118	pinctrl-names = "default";
119	pinctrl-0 = <&rgmiim1_pins>;
120	snps,force_thresh_dma_mode;
121	snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
122	snps,reset-active-low;
123	snps,reset-delays-us = <0 10000 50000>;
124	tx_delay = <0x24>;
125	rx_delay = <0x18>;
126	status = "okay";
127};
128
129&hdmi {
130	status = "okay";
131};
132
133&hdmiphy {
134	status = "okay";
135};
136
137&i2c1 {
138	status = "okay";
139
140	rk805: rk805@18 {
141		compatible = "rockchip,rk805";
142		reg = <0x18>;
143		interrupt-parent = <&gpio2>;
144		interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
145		#clock-cells = <1>;
146		clock-output-names = "xin32k", "rk805-clkout2";
147		pinctrl-names = "default";
148		pinctrl-0 = <&pmic_int_l>;
149		rockchip,system-power-controller;
150		wakeup-source;
151
152		vcc1-supply = <&vcc_sys>;
153		vcc2-supply = <&vcc_sys>;
154		vcc3-supply = <&vcc_sys>;
155		vcc4-supply = <&vcc_sys>;
156		vcc5-supply = <&vcc_io>;
157		vcc6-supply = <&vcc_sys>;
158
159		regulators {
160			vdd_logic: DCDC_REG1 {
161				regulator-name = "vdd_logic";
162				regulator-min-microvolt = <712500>;
163				regulator-max-microvolt = <1450000>;
164				regulator-ramp-delay = <12500>;
165				regulator-always-on;
166				regulator-boot-on;
167				regulator-state-mem {
168					regulator-on-in-suspend;
169					regulator-suspend-microvolt = <1000000>;
170				};
171			};
172
173			vdd_arm: DCDC_REG2 {
174				regulator-name = "vdd_arm";
175				regulator-min-microvolt = <712500>;
176				regulator-max-microvolt = <1450000>;
177				regulator-ramp-delay = <12500>;
178				regulator-always-on;
179				regulator-boot-on;
180				regulator-state-mem {
181					regulator-on-in-suspend;
182					regulator-suspend-microvolt = <950000>;
183				};
184			};
185
186			vcc_ddr: DCDC_REG3 {
187				regulator-name = "vcc_ddr";
188				regulator-always-on;
189				regulator-boot-on;
190				regulator-state-mem {
191					regulator-on-in-suspend;
192				};
193			};
194
195			vcc_io: DCDC_REG4 {
196				regulator-name = "vcc_io";
197				regulator-min-microvolt = <3300000>;
198				regulator-max-microvolt = <3300000>;
199				regulator-always-on;
200				regulator-boot-on;
201				regulator-state-mem {
202					regulator-on-in-suspend;
203					regulator-suspend-microvolt = <3300000>;
204				};
205			};
206
207			vcc_18: LDO_REG1 {
208				regulator-name = "vdd_18";
209				regulator-min-microvolt = <1800000>;
210				regulator-max-microvolt = <1800000>;
211				regulator-always-on;
212				regulator-boot-on;
213				regulator-state-mem {
214					regulator-on-in-suspend;
215					regulator-suspend-microvolt = <1800000>;
216				};
217			};
218
219			vcc18_emmc: LDO_REG2 {
220				regulator-name = "vcc_18emmc";
221				regulator-min-microvolt = <1800000>;
222				regulator-max-microvolt = <1800000>;
223				regulator-always-on;
224				regulator-boot-on;
225				regulator-state-mem {
226					regulator-on-in-suspend;
227					regulator-suspend-microvolt = <1800000>;
228				};
229			};
230
231			vdd_10: LDO_REG3 {
232				regulator-name = "vdd_10";
233				regulator-min-microvolt = <1000000>;
234				regulator-max-microvolt = <1000000>;
235				regulator-always-on;
236				regulator-boot-on;
237				regulator-state-mem {
238					regulator-on-in-suspend;
239					regulator-suspend-microvolt = <1000000>;
240				};
241			};
242		};
243	};
244};
245
246&io_domains {
247	status = "okay";
248
249	vccio1-supply = <&vcc_io>;
250	vccio2-supply = <&vcc18_emmc>;
251	vccio3-supply = <&vcc_io>;
252	vccio4-supply = <&vcc_18>;
253	vccio5-supply = <&vcc_io>;
254	vccio6-supply = <&vcc_io>;
255	pmuio-supply = <&vcc_io>;
256};
257
258&pinctrl {
259	pmic {
260		pmic_int_l: pmic-int-l {
261			rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
262		};
263	};
264
265	usb2 {
266		usb20_host_drv: usb20-host-drv {
267			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
268		};
269	};
270
271	usb3 {
272		usb30_host_drv: usb30-host-drv {
273			rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
274		};
275	};
276};
277
278&sdmmc {
279	bus-width = <4>;
280	cap-mmc-highspeed;
281	cap-sd-highspeed;
282	disable-wp;
283	max-frequency = <150000000>;
284	pinctrl-names = "default";
285	pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
286	vmmc-supply = <&vcc_sd>;
287	status = "okay";
288};
289
290&spdif {
291	pinctrl-0 = <&spdifm0_tx>;
292	status = "okay";
293	#sound-dai-cells = <0>;
294
295	spdif_p0: port {
296		spdif_p0_0: endpoint {
297			remote-endpoint = <&dit_p0_0>;
298		};
299	};
300};
301
302&spi0 {
303	status = "okay";
304
305	spiflash@0 {
306		compatible = "jedec,spi-nor";
307		reg = <0>;
308
309		/* maximum speed for Rockchip SPI */
310		spi-max-frequency = <50000000>;
311	};
312};
313
314&tsadc {
315	rockchip,hw-tshut-mode = <0>;
316	rockchip,hw-tshut-polarity = <0>;
317	status = "okay";
318};
319
320&uart2 {
321	status = "okay";
322};
323
324&u2phy {
325	status = "okay";
326
327	u2phy_host: host-port {
328		status = "okay";
329	};
330
331	u2phy_otg: otg-port {
332		status = "okay";
333	};
334};
335
336&usb20_otg {
337	dr_mode = "host";
338	status = "okay";
339};
340
341&usb_host0_ehci {
342	status = "okay";
343};
344
345&usb_host0_ohci {
346	status = "okay";
347};
348
349&vop {
350	status = "okay";
351};
352
353&vop_mmu {
354	status = "okay";
355};
356